From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33959) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y0X3W-00021m-70 for qemu-devel@nongnu.org; Mon, 15 Dec 2014 09:55:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Y0X3Q-0005rH-PM for qemu-devel@nongnu.org; Mon, 15 Dec 2014 09:55:26 -0500 Message-ID: <548EF657.4040300@suse.de> Date: Mon, 15 Dec 2014 15:55:19 +0100 From: Alexander Graf MIME-Version: 1.0 References: <1418377089-17331-1-git-send-email-aik@ozlabs.ru> <548B6C72.7020601@ozlabs.ru> In-Reply-To: <548B6C72.7020601@ozlabs.ru> Content-Type: text/plain; charset=koi8-r Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2] spapr-pci: Enable huge BARs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexey Kardashevskiy , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org On 12.12.14 23:30, Alexey Kardashevskiy wrote: > On 12/12/2014 08:38 PM, Alexey Kardashevskiy wrote: >> At the moment sPAPR only supports 512MB window for MMIO BARs. However >> modern devices might want bigger 64bit BARs. >> >> This extends MMIO window from 512MB to 62GB (aligned to >> SPAPR_PCI_WINDOW_SPACING) and advertises it in 2 records in >> the PHB's "ranges" property. 32bit has all the space from >> SPAPR_PCI_MEM_WIN_BUS_OFFSET till the end of 4GB, 64bit has the rest >> of the window. >> >> Suggested-by: Benjamin Herrenschmidt >> Signed-off-by: Alexey Kardashevskiy >> --- >> Changes: >> v2: >> * do not change existing memory layout >> * do not create another mmio window >> --- >> hw/ppc/spapr_pci.c | 8 +++++++- >> include/hw/pci-host/spapr.h | 7 ++++--- >> 2 files changed, 11 insertions(+), 4 deletions(-) >> >> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c >> index 21b95b3..3641f87 100644 >> --- a/hw/ppc/spapr_pci.c >> +++ b/hw/ppc/spapr_pci.c >> @@ -862,6 +862,7 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb, >> int bus_off, i, j; >> char nodename[256]; >> uint32_t bus_range[] = { cpu_to_be32(0), cpu_to_be32(0xff) }; >> + const uint32_t win32size = (1ULL << 32) - SPAPR_PCI_MEM_WIN_BUS_OFFSET; >> struct { >> uint32_t hi; >> uint64_t child; >> @@ -876,7 +877,12 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb, >> { >> cpu_to_be32(b_ss(2)), cpu_to_be64(SPAPR_PCI_MEM_WIN_BUS_OFFSET), >> cpu_to_be64(phb->mem_win_addr), >> - cpu_to_be64(memory_region_size(&phb->memwindow)), >> + cpu_to_be64(win32size), >> + }, >> + { >> + cpu_to_be32(b_ss(3)), cpu_to_be64(1ULL << 32), >> + cpu_to_be64(phb->mem_win_addr + win32size), >> + cpu_to_be64(memory_region_size(&phb->memwindow) - win32size) This also changes the device tree compared to older versions. I also don't see any compat code that makes older machine types stay at the smaller window? Alex