From: Richard Henderson <rth@twiddle.net>
To: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 3/8] target-tricore: Add instructions of RR opcode format, that have 0xf as the first opcode
Date: Wed, 17 Dec 2014 09:48:49 -0600 [thread overview]
Message-ID: <5491A5E1.5070504@twiddle.net> (raw)
In-Reply-To: <1418831961-27658-4-git-send-email-kbastian@mail.uni-paderborn.de>
On 12/17/2014 09:59 AM, Bastian Koppelmann wrote:
> Add instructions of RR opcode format, that have 0xf as the first opcode.
> Add helper functions:
> * clo/z/s: Counts leading ones/zeros/signs.
> * clo/z/s_h: Count leading ones/zeros/signs in two haflwords.
> * sh/_h: Shifts one/two word/hwords.
> * sha/_h: Shifts one/two word/hwords arithmeticly.
>
> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> ---
> v1 -> v2:
> - Use TCG_CALL_NO_RWG_SE for all helpers not using globals.
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
next prev parent reply other threads:[~2014-12-17 15:50 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-17 15:59 [Qemu-devel] [PATCH v2 0/8] TriCore add instructions of RR and RR1 opcode format Bastian Koppelmann
2014-12-17 15:59 ` [Qemu-devel] [PATCH v2 1/8] target-tricore: Change SSOV/SUOV makro name to SSOV32/SUOV32 Bastian Koppelmann
2014-12-17 15:42 ` Richard Henderson
2014-12-17 15:59 ` [Qemu-devel] [PATCH v2 2/8] target-tricore: Add instructions of RR opcode format, that have 0xb as the first opcode Bastian Koppelmann
2014-12-17 15:47 ` Richard Henderson
2014-12-17 15:59 ` [Qemu-devel] [PATCH v2 3/8] target-tricore: Add instructions of RR opcode format, that have 0xf " Bastian Koppelmann
2014-12-17 15:48 ` Richard Henderson [this message]
2014-12-17 15:59 ` [Qemu-devel] [PATCH v2 4/8] target-tricore: Add instructions of RR opcode format, that have 0x1 " Bastian Koppelmann
2014-12-17 15:59 ` [Qemu-devel] [PATCH v2 5/8] target-tricore: Add instructions of RR opcode format, that have 0x4b " Bastian Koppelmann
2014-12-17 15:51 ` Richard Henderson
2014-12-17 15:59 ` [Qemu-devel] [PATCH v2 6/8] target-tricore: Add missing 1.6 insn of BOL opcode format Bastian Koppelmann
2014-12-17 15:59 ` [Qemu-devel] [PATCH v2 7/8] target-tricore: Fix MFCR/MTCR insn and B format offset Bastian Koppelmann
2014-12-17 15:59 ` [Qemu-devel] [PATCH v2 8/8] target-tricore: Add instructions of RR1 opcode format, that have 0xb3 as first opcode Bastian Koppelmann
2014-12-17 16:08 ` Richard Henderson
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