From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45948) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y1b85-0006HR-DM for qemu-devel@nongnu.org; Thu, 18 Dec 2014 08:28:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Y1b7w-00071y-Bk for qemu-devel@nongnu.org; Thu, 18 Dec 2014 08:28:33 -0500 Received: from mail-wi0-x232.google.com ([2a00:1450:400c:c05::232]:37297) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y1b7w-00071j-40 for qemu-devel@nongnu.org; Thu, 18 Dec 2014 08:28:24 -0500 Received: by mail-wi0-f178.google.com with SMTP id em10so1779601wid.17 for ; Thu, 18 Dec 2014 05:28:22 -0800 (PST) Sender: Paolo Bonzini Message-ID: <5492D672.2040602@redhat.com> Date: Thu, 18 Dec 2014 14:28:18 +0100 From: Paolo Bonzini MIME-Version: 1.0 References: <1418721234-9588-1-git-send-email-fred.konrad@greensocs.com> <54915A76.3000408@greensocs.com> <54915AE8.3010809@suse.de> <54915EC6.2050708@suse.de> <8B6B4BF9-3400-4125-8571-F4EF9F12AA89@greensocs.com> <5491666A.7060001@suse.de> <54916829.3020200@redhat.com> <60A11491-8466-4EBC-9877-22E341688DD9@greensocs.com> <6B541656-15EA-47CB-8043-AE3B18FC60D4@greensocs.com> <5492C798.8070503@suse.de> In-Reply-To: <5492C798.8070503@suse.de> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC PATCH] target-arm: protect cpu_exclusive_*. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf , Mark Burton , Peter Maydell Cc: mttcg@listserver.greensocs.com, =?UTF-8?B?S09OUkFEIEZyw6lkw6lyaWM=?= , =?UTF-8?B?TGx1w61zIFZpbGFub3Zh?= , QEMU Developers On 18/12/2014 13:24, Alexander Graf wrote: > That's the nice thing about transactions - they guarantee that no other > CPU accesses the same cache line at the same time. So you're safe > against other vcpus even without blocking them manually. > > For the non-transactional implementation we probably would need an "IPI > others and halt them until we're done with the critical section" > approach. But I really wouldn't concentrate on making things fast on old > CPUs. The non-transactional implementation can use softmmu to trap access to the page from other VCPUs. This makes it possible to implement (at the cost of speed) the same semantics on all hosts. Paolo