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From: Alexander Graf <agraf@suse.de>
To: Amit Tomar <Amit.Tomar@freescale.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"qemu-ppc@nongnu.org" <qemu-ppc@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH] PPC: e500: Fix GPIO controller interrupt number
Date: Fri, 19 Dec 2014 18:29:11 +0100	[thread overview]
Message-ID: <54946067.5060401@suse.de> (raw)
In-Reply-To: <BL2PR03MB44998353E70A7C26E96777D836B0@BL2PR03MB449.namprd03.prod.outlook.com>



On 19.12.14 15:20, Amit Tomar wrote:
> This patch sets the GPIO controller interrupt number to 47,not 43 (and the Device tree agrees).
> 
> 
> Signed-off-by: Amit Singh Tomar <amit.tomar@freescale.com>

Thanks, applied to ppc-next with modified commit message. Let's try to
improve the patch description next time ;).


Alex

Subject: [PATCH] PPC: e500: Fix GPIO controller interrupt number

The GPIO controller lives at IRQ 47, not 43 on real hardware. This is a
problem
because IRQ 43 is occupied by the I2C controller which we want to implement
next, so we'd have a conflict on that IRQ number.

Move the GPIO controller to IRQ 47 where it belongs.

Signed-off-by: Amit Singh Tomar <amit.tomar@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>

      reply	other threads:[~2014-12-19 17:29 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-19 14:20 [Qemu-devel] [PATCH] PPC: e500: Fix GPIO controller interrupt number Amit Tomar
2014-12-19 17:29 ` Alexander Graf [this message]

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