From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35046) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAeZD-00042H-1o for qemu-devel@nongnu.org; Mon, 12 Jan 2015 07:57:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YAeZ9-0002YO-SV for qemu-devel@nongnu.org; Mon, 12 Jan 2015 07:57:58 -0500 Received: from mx1.redhat.com ([209.132.183.28]:42558) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAeZ9-0002Wr-DV for qemu-devel@nongnu.org; Mon, 12 Jan 2015 07:57:55 -0500 Message-ID: <54B3C4C6.2000703@redhat.com> Date: Mon, 12 Jan 2015 13:57:42 +0100 From: Paolo Bonzini MIME-Version: 1.0 References: <1420948672-50103-1-git-send-email-sfeldma@gmail.com> <1420948672-50103-7-git-send-email-sfeldma@gmail.com> In-Reply-To: <1420948672-50103-7-git-send-email-sfeldma@gmail.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v3 6/9] rocker: add new rocker switch device List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: sfeldma@gmail.com, qemu-devel@nongnu.org, jiri@resnulli.us, roopa@cumulusnetworks.com, john.fastabend@gmail.com, eblake@redhat.com, stefanha@gmail.com On 11/01/2015 04:57, sfeldma@gmail.com wrote: > +static const MemoryRegionOps rocker_mmio_ops = { > + .read = rocker_mmio_read, > + .write = rocker_mmio_write, > + .endianness = DEVICE_LITTLE_ENDIAN, > + .valid = { > + .min_access_size = 4, > + .max_access_size = 8, > + }, > + .impl = { > + .min_access_size = 4, > + .max_access_size = 8, > + }, > +}; I suggest that you only use 32-bit registers in the internal implementation, where writing to the low part of a 64-bit register only writes to a latch. You can then use .impl.max_access_size == 4 but keep .valid.max_access_size == 8. QEMU will then take care of passing 64-bit writes down as two 32-bit writes, in increasing address. Paolo