From: Alexander Graf <agraf@suse.de>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Rob Herring <rob.herring@linaro.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Claudio Fontana <claudio.fontana@huawei.com>,
"stuart.yoder@freescale.com" <stuart.yoder@freescale.com>,
alvise rigo <a.rigo@virtualopensystems.com>
Subject: Re: [Qemu-devel] [PATCH 2/4] pci: Add generic PCIe host bridge
Date: Tue, 13 Jan 2015 01:13:38 +0100 [thread overview]
Message-ID: <54B46332.5090706@suse.de> (raw)
In-Reply-To: <CAFEAcA8xQSj+jCX7UJYLTWajJ2x1gTNL492G9nOuP7=GSBaryw@mail.gmail.com>
On 12.01.15 22:20, Peter Maydell wrote:
> On 12 January 2015 at 21:06, Alexander Graf <agraf@suse.de> wrote:
>>
>>
>> On 12.01.15 21:08, Peter Maydell wrote:
>>> On 12 January 2015 at 17:38, Alexander Graf <agraf@suse.de> wrote:
>>>> I'd prefer to keep things as easy as we humanly can for now. Then add
>>>> MSI. And if we then realize that we still need 4 rather than 1 shared
>>>> interrupt lines we can still change it :)
>>>
>>> Except that that would be a breaking change, so I would prefer
>>> to think ahead where possible; at some point there will come
>>> a time when we really can't make breaking changes to this
>>> board any more...
>>
>> Works for me, then we stay at a single interrupt line. The only reason
>> we have 4 in PCI is that back in the day you could have non-sharing PCI
>> devices that were essentially ISA ones.
>
> Well, also your typical small system probably doesn't have more
> than 4 PCI slots and so 4 IRQs is enough to give them each one.
> Most small VMs probably won't have more than four PCI devices
> either...
My main problem with multiple IRQs is that we'd have to describe the
mapping. I'd rather not have a fixed number of PCI slots hardcoded
anywhere, especially not in the map. So the only chance we have to keep
it dynamic would be to mask some field of the devfn to PCI IRQ lines.
How about we map the slots with a simple, pretty generic mask on the
lower bitsto 4 host IRQ lines? Would that make everyone happy?
I still don't think it's worth the hassle, but I'd be happy to do it if
people insist.
Alex
next prev parent reply other threads:[~2015-01-13 0:13 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-06 16:03 [Qemu-devel] [PATCH 0/4] ARM: Add support for a generic PCI Express host bridge Alexander Graf
2015-01-06 16:03 ` [Qemu-devel] [PATCH 1/4] pci: Split pcie_host_mmcfg_map() Alexander Graf
2015-01-12 16:28 ` Claudio Fontana
2015-01-06 16:03 ` [Qemu-devel] [PATCH 2/4] pci: Add generic PCIe host bridge Alexander Graf
2015-01-12 16:29 ` Claudio Fontana
2015-01-12 17:36 ` alvise rigo
2015-01-12 17:38 ` Alexander Graf
2015-01-12 20:08 ` Peter Maydell
2015-01-12 21:06 ` Alexander Graf
2015-01-12 21:20 ` Peter Maydell
2015-01-13 0:13 ` Alexander Graf [this message]
2015-01-13 10:07 ` Peter Maydell
2015-01-13 9:09 ` Claudio Fontana
2015-01-06 16:03 ` [Qemu-devel] [PATCH 3/4] arm: Add PCIe host bridge in virt machine Alexander Graf
2015-01-07 15:52 ` Claudio Fontana
2015-01-07 21:47 ` Alexander Graf
2015-01-08 12:55 ` Claudio Fontana
2015-01-08 13:26 ` Alexander Graf
2015-01-08 15:01 ` Claudio Fontana
2015-01-12 16:23 ` Claudio Fontana
2015-01-12 16:35 ` Alexander Graf
2015-01-08 13:36 ` alvise rigo
2015-01-08 10:31 ` Peter Maydell
2015-01-08 12:30 ` Claudio Fontana
2015-01-12 16:20 ` Claudio Fontana
2015-01-12 16:36 ` Alexander Graf
2015-01-12 16:49 ` alvise rigo
2015-01-12 16:57 ` Alexander Graf
2015-01-06 16:03 ` [Qemu-devel] [PATCH 4/4] arm: enable Bochs PCI VGA Alexander Graf
2015-01-06 16:16 ` Peter Maydell
2015-01-06 21:08 ` Alexander Graf
2015-01-06 21:28 ` Peter Maydell
2015-01-06 21:42 ` Alexander Graf
2015-01-07 6:22 ` Paolo Bonzini
2015-01-07 13:52 ` [Qemu-devel] [PATCH 0/4] ARM: Add support for a generic PCI Express host bridge Claudio Fontana
2015-01-07 14:07 ` Alexander Graf
2015-01-07 14:26 ` Claudio Fontana
2015-01-07 14:36 ` Alexander Graf
2015-01-07 15:16 ` Claudio Fontana
2015-01-07 16:31 ` Peter Maydell
2015-01-12 16:24 ` Claudio Fontana
2015-01-21 12:59 ` Claudio Fontana
2015-01-21 13:01 ` Alexander Graf
2015-01-21 13:02 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=54B46332.5090706@suse.de \
--to=agraf@suse.de \
--cc=a.rigo@virtualopensystems.com \
--cc=ard.biesheuvel@linaro.org \
--cc=claudio.fontana@huawei.com \
--cc=mst@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=rob.herring@linaro.org \
--cc=stuart.yoder@freescale.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).