From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41265) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAxQc-0000Ev-BW for qemu-devel@nongnu.org; Tue, 13 Jan 2015 04:06:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YAxQb-0005xB-9z for qemu-devel@nongnu.org; Tue, 13 Jan 2015 04:06:22 -0500 Message-ID: <54B4DFF1.1030002@huawei.com> Date: Tue, 13 Jan 2015 10:05:53 +0100 From: Claudio Fontana MIME-Version: 1.0 References: <1419363216-26601-1-git-send-email-mdroth@linux.vnet.ibm.com> <20150112132406.22996.59621@loki> <20150113054655.GK3654@voom.BigPond> In-Reply-To: <20150113054655.GK3654@voom.BigPond> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 0/1] pci: allow 0 address for PCI IO/MEM regions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson , Michael Roth Cc: peter.maydell@linaro.org, mst@redhat.com, aik@ozlabs.ru, qemu-devel@nongnu.org, agraf@suse.de, qemu-ppc@nongnu.org, hw.claudio@gmail.com On 13.01.2015 06:46, David Gibson wrote: > On Mon, Jan 12, 2015 at 07:24:06AM -0600, Michael Roth wrote: >> Quoting Michael Roth (2014-12-23 13:33:35) >>> This patch enables the programming of address 0 for IO/MMIO BARs for >>> PCI devices. >>> >>> It was originally included as part of a series implementing PCI >>> hotplug for pseries guests, where it is needed due to the fact >>> that pseries guests access IO space via MMIO, and that IO >>> space is dedicated to PCI devices, with RTAS calls being used in >>> place of common/legacy IO ports such as config-data/config-address. >>> >>> Thus, the entire range is unhindered by legacy IO ports, and >>> pseries guest kernels may attempt to program an IO BAR to address 0 >>> as a result. >>> >>> This has led to a conflict with the existing PCI config space >>> emulation code, where it has been assumed that 0 address are always >>> invalid. >>> >>> Some background from discussions can be viewed here: >>> >>> https://lists.nongnu.org/archive/html/qemu-devel/2014-08/msg03063.html >>> >>> The general summary from that discussion seems to be that 0-addresses are >>> not (at least, are no longer) prohibited by current versions of the PCI >>> spec, and that the same should apply for MMIO addresses (where allowing >>> 0-addresses are also needed for some ARM-based PCI controllers). >>> >>> This patch includes support for 0-address MMIO BARs based on that >>> discussion. >>> >>> One still-lingering concern is whether this change will impact >>> compatibility with guests where 0-addresses are invalid. There was >>> some discussion on whether this issue could be addressed using >>> memory region priorities, but I think that's still an open question >>> that we can hopefully address here. >> >> Ping > > Sorry, I just got back from vacation. > > It looks same to me. > > Reviewed-by: David Gibson > Can you guys take a look also at this: http://lists.nongnu.org/archive/html/qemu-devel/2015-01/msg01048.html I really think we should give diagnostics under PCI_DEBUG when trying to set new BAR addresses fails for any reason. Ciao, Claudio