Re: [Qemu-devel] target-tricore: Possible bug in get_mtcr()

[Bastian Koppelmann <kbastian@mail.uni-paderborn.de>]

Hi Markus,
On 01/20/2015 09:23 AM, Markus Armbruster wrote:
> Coverity[*] points out:
>
>      *** CID 1264337:  Logically dead code  (DEADCODE)
>      /target-tricore/translate.c: 348 in gen_mtcr()
>      342     #define E(ADDRESS, REG, FEATURE) A(ADDRESS, REG, FEATURE)
>      343 static inline void gen_mtcr(CPUTriCoreState *env, DisasContext
>      *ctx, TCGv r1,
>      344                                 int32_t offset)
>      345     {
>      346         if (ctx->hflags & TRICORE_HFLAG_SM) {
>      347             /* since we're caching PSW make this a special case */
>      >>>     CID 1264337:  Logically dead code  (DEADCODE)
>      >>>     Execution cannot reach this statement: "if (offset == 65028) {
>        ge...".
>      348             if (offset == 0xfe04) {
>      349                 gen_helper_psw_write(cpu_env, r1);
>      350             } else {
>      351                 switch (offset) {
>      352     #include "csfr.def"
>      353                 }
>
> Correct, because TRICORE_HFLAG_SM is zero:
>
>      #define TRICORE_HFLAG_UM0     0x00002 /* user mode-0 flag          */
>      #define TRICORE_HFLAG_UM1     0x00001 /* user mode-1 flag          */
>      #define TRICORE_HFLAG_SM      0x00000 /* kernel mode flag          */
Good catch!
>
> Shouls this perhaps be (ctx->hflags & (1 << TRICORE_HFLAG_SM))?
Close. It should be:
#define TRICORE_HFLAG_KUU     0x3
...
((ctx->hflags & TRICORE_HFLAG_KUU) == TRICORE_HFLAG_SM)

I will send a patch for this.

Thanks,
Bastian
> [*] https://scan.coverity.com/projects/378
>