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Subject: Re: [Qemu-devel] [PATCH 2/4] target-tricore: Add instructions of
	RR2 opcode format
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To: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, qemu-devel@nongnu.org

On 01/21/2015 10:04 AM, Bastian Koppelmann wrote:
> +    case OPC2_32_RR2_MUL_32:
> +        gen_mul_i32s(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]);
> +        break;
> +    case OPC2_32_RR2_MUL_64:
> +        gen_mul_i64s(cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r1],
> +                     cpu_gpr_d[r2]);
> +        break;

What happend to flags computation?


r~