From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60140) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YFo8E-0007lP-H4 for qemu-devel@nongnu.org; Mon, 26 Jan 2015 13:11:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YFo8A-0003vX-Ar for qemu-devel@nongnu.org; Mon, 26 Jan 2015 13:11:26 -0500 Received: from mail-qa0-x22a.google.com ([2607:f8b0:400d:c00::22a]:41661) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YFo8A-0003vS-5p for qemu-devel@nongnu.org; Mon, 26 Jan 2015 13:11:22 -0500 Received: by mail-qa0-f42.google.com with SMTP id dc16so7932490qab.1 for ; Mon, 26 Jan 2015 10:11:21 -0800 (PST) Sender: Richard Henderson Message-ID: <54C68345.9040800@twiddle.net> Date: Mon, 26 Jan 2015 10:11:17 -0800 From: Richard Henderson MIME-Version: 1.0 References: <1422289800-22812-1-git-send-email-kbastian@mail.uni-paderborn.de> In-Reply-To: <1422289800-22812-1-git-send-email-kbastian@mail.uni-paderborn.de> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 0/4] TriCore add instructions of RR1, RR2, RRPW and RRR opcode format List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bastian Koppelmann , qemu-devel@nongnu.org On 01/26/2015 08:29 AM, Bastian Koppelmann wrote: > v1 -> v2: > - Add 3 helper functions (gen_mul_q, gen_mul_q_16, gen_mulr_q) to > remove repetition. > - gen_mul_q now uses 64 arithmetic instead of emulating it. > - MUL_Q now uses arithmetic shift, instead of normal shift + sign extend for arg > extraction. > - optimize OPC2_32_RRPW_EXTR by using only two shifts, instead of four. > - OPC1_32_RRPW_DEXTR now has r1 == r2 as a special case. > > Bastian Koppelmann (4): > target-tricore: target-tricore: Add instructions of RR1 opcode format, > that have 0x93 as first opcode > target-tricore: Add instructions of RR2 opcode format > target-tricore: Add instructions of RRPW opcode format > target-tricore: Add instructions of RRR opcode format > > target-tricore/helper.h | 8 + > target-tricore/op_helper.c | 160 ++++++++++++++ > target-tricore/translate.c | 439 +++++++++++++++++++++++++++++++++++++++ > target-tricore/tricore-opcodes.h | 2 +- > 4 files changed, 608 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson r~