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From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: qemu-devel@nongnu.org
Cc: rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH 0/6] TriCore: Add RRR1 and RRR2 instructions
Date: Wed, 11 Feb 2015 16:35:45 +0000	[thread overview]
Message-ID: <54DB84E1.6050409@mail.uni-paderborn.de> (raw)
In-Reply-To: <1423581545-22360-1-git-send-email-kbastian@mail.uni-paderborn.de>


On 02/10/2015 03:18 PM, Bastian Koppelmann wrote:
> Hi,
>
> the patchset fixes two minor bugs and takes care of all the packed/fixed point
> mac instructions. So far I only implemented all the multiply-add instructions,
> since the multiply-sub instructions are similar and I don't want the reviewers
> to find the same mistakes twice. Once these are reviewed I will send another
> patchset containing all the multiply-sub instructions.
> I do plan on mirroring the multiply-add instructions, which seems okay. However
> if there are ideas to make this more clean, let me know.
>
> Cheers,
> Bastian
>
> Bastian Koppelmann (6):
>    target-tricore: Fix RLC_ADDI, RLC_ADDIH using wrong microcode helper
>    target-tricore: fix msub32_suov return wrong results
>    target-tricore: Add instructions of RRR2 opcode format
>    target-tricore: Add instructions of RRR1 opcode format, which have
>      0x83 as first opcode
>    target-tricore: Add instructions of RRR1 opcode format, which have
>      0x43 as first opcode
>    target-tricore: Add instructions of RRR1 opcode format, which have
>      0xc3 as first opcode
>
>   target-tricore/helper.h          |    9 +
>   target-tricore/op_helper.c       |  374 +++++++++-
>   target-tricore/translate.c       | 1391 ++++++++++++++++++++++++++++++++++++--
>   target-tricore/tricore-opcodes.h |   10 +-
>   4 files changed, 1728 insertions(+), 56 deletions(-)
>
> --
> 2.3.0
>
>
Again I forgot to run checkpatch. I'm really sorry about that. I'll fix 
this and send a v2.

Cheers,
Bastian

      parent reply	other threads:[~2015-02-11 15:34 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-10 15:18 [Qemu-devel] [PATCH 0/6] TriCore: Add RRR1 and RRR2 instructions Bastian Koppelmann
2015-02-10 15:19 ` [Qemu-devel] [PATCH 1/6] target-tricore: Fix RLC_ADDI, RLC_ADDIH using wrong microcode helper Bastian Koppelmann
2015-02-10 15:19 ` [Qemu-devel] [PATCH 2/6] target-tricore: fix msub32_suov return wrong results Bastian Koppelmann
2015-02-10 15:19 ` [Qemu-devel] [PATCH 3/6] target-tricore: Add instructions of RRR2 opcode format Bastian Koppelmann
2015-02-10 15:19 ` [Qemu-devel] [PATCH 4/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x83 as first opcode Bastian Koppelmann
2015-02-10 15:19 ` [Qemu-devel] [PATCH 5/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x43 " Bastian Koppelmann
2015-02-10 15:19 ` [Qemu-devel] [PATCH 6/6] target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 " Bastian Koppelmann
2015-02-11 16:35 ` Bastian Koppelmann [this message]

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