* [Qemu-devel] [PATCH 01/16] Add a base IPMI interface
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 02/16] ipmi: Add a PC ISA type structure minyard
` (15 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Add the basic IPMI types and infrastructure to QEMU. Low-level
interfaces and simulation interfaces will register with this; it's
kind of the go-between to tie them together.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/Makefile.objs | 1 +
hw/ipmi/Makefile.objs | 1 +
hw/ipmi/ipmi.c | 135 +++++++++++++++++++++++
hw/ipmi/ipmi.h | 215 +++++++++++++++++++++++++++++++++++++
qemu-doc.texi | 2 +
7 files changed, 356 insertions(+)
create mode 100644 hw/ipmi/Makefile.objs
create mode 100644 hw/ipmi/ipmi.c
create mode 100644 hw/ipmi/ipmi.h
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index 8e08841..e7179a6 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -10,6 +10,7 @@ CONFIG_VGA_ISA=y
CONFIG_VGA_CIRRUS=y
CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
+CONFIG_IPMI=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 66557ac..d04705d 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -10,6 +10,7 @@ CONFIG_VGA_ISA=y
CONFIG_VGA_CIRRUS=y
CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
+CONFIG_IPMI=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 52a1464..16a0893 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -13,6 +13,7 @@ devices-dirs-$(CONFIG_SOFTMMU) += ide/
devices-dirs-$(CONFIG_SOFTMMU) += input/
devices-dirs-$(CONFIG_SOFTMMU) += intc/
devices-dirs-$(CONFIG_IPACK) += ipack/
+devices-dirs-$(CONFIG_SOFTMMU) += ipmi/
devices-dirs-$(CONFIG_SOFTMMU) += isa/
devices-dirs-$(CONFIG_SOFTMMU) += misc/
devices-dirs-$(CONFIG_SOFTMMU) += net/
diff --git a/hw/ipmi/Makefile.objs b/hw/ipmi/Makefile.objs
new file mode 100644
index 0000000..65bde11
--- /dev/null
+++ b/hw/ipmi/Makefile.objs
@@ -0,0 +1 @@
+common-obj-$(CONFIG_IPMI) += ipmi.o
diff --git a/hw/ipmi/ipmi.c b/hw/ipmi/ipmi.c
new file mode 100644
index 0000000..b046517
--- /dev/null
+++ b/hw/ipmi/ipmi.c
@@ -0,0 +1,135 @@
+/*
+ * QEMU IPMI emulation
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "hw/hw.h"
+#include "ipmi.h"
+#include "sysemu/sysemu.h"
+#include "qmp-commands.h"
+
+static int ipmi_do_hw_op(IPMIInterface *s, enum ipmi_op op, int checkonly)
+{
+ switch (op) {
+ case IPMI_RESET_CHASSIS:
+ if (checkonly) {
+ return 0;
+ }
+ qemu_system_reset_request();
+ return 0;
+
+ case IPMI_POWEROFF_CHASSIS:
+ if (checkonly) {
+ return 0;
+ }
+ qemu_system_powerdown_request();
+ return 0;
+
+ case IPMI_SEND_NMI:
+ if (checkonly) {
+ return 0;
+ }
+ qemu_mutex_lock_iothread();
+ qmp_inject_nmi(NULL);
+ qemu_mutex_unlock_iothread();
+ return 0;
+
+ case IPMI_POWERCYCLE_CHASSIS:
+ case IPMI_PULSE_DIAG_IRQ:
+ case IPMI_SHUTDOWN_VIA_ACPI_OVERTEMP:
+ case IPMI_POWERON_CHASSIS:
+ default:
+ return IPMI_CC_COMMAND_NOT_SUPPORTED;
+ }
+}
+
+static void ipmi_set_irq_enable(IPMIInterface *s, int val)
+{
+ s->irqs_enabled = val;
+}
+
+void ipmi_interface_reset(IPMIInterface *s)
+{
+ IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(s->bmc);
+
+ if (bk->handle_reset) {
+ bk->handle_reset(s->bmc);
+ }
+}
+
+void ipmi_interface_init(IPMIInterface *s, Error **errp)
+{
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+
+ if (k->init) {
+ k->init(s, errp);
+ if (*errp) {
+ return;
+ }
+ }
+
+ if (!s->slave_addr) {
+ s->slave_addr = 0x20;
+ }
+}
+
+static void ipmi_interface_class_init(ObjectClass *class, void *data)
+{
+ IPMIInterfaceClass *ik = IPMI_INTERFACE_CLASS(class);
+
+ ik->do_hw_op = ipmi_do_hw_op;
+ ik->set_irq_enable = ipmi_set_irq_enable;
+}
+
+static TypeInfo ipmi_interface_type_info = {
+ .name = TYPE_IPMI_INTERFACE,
+ .parent = TYPE_OBJECT,
+ .instance_size = sizeof(IPMIInterface),
+ .abstract = true,
+ .class_size = sizeof(IPMIInterfaceClass),
+ .class_init = ipmi_interface_class_init,
+};
+
+void ipmi_bmc_init(IPMIBmc *s, Error **errp)
+{
+ IPMIBmcClass *k = IPMI_BMC_GET_CLASS(s);
+
+ if (k->init) {
+ k->init(s, errp);
+ }
+}
+
+static TypeInfo ipmi_bmc_type_info = {
+ .name = TYPE_IPMI_BMC,
+ .parent = TYPE_OBJECT,
+ .instance_size = sizeof(IPMIBmc),
+ .abstract = true,
+ .class_size = sizeof(IPMIBmcClass),
+};
+
+static void ipmi_register_types(void)
+{
+ type_register_static(&ipmi_interface_type_info);
+ type_register_static(&ipmi_bmc_type_info);
+}
+
+type_init(ipmi_register_types)
diff --git a/hw/ipmi/ipmi.h b/hw/ipmi/ipmi.h
new file mode 100644
index 0000000..6b2a3e9
--- /dev/null
+++ b/hw/ipmi/ipmi.h
@@ -0,0 +1,215 @@
+/*
+ * IPMI base class
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef HW_IPMI_H
+#define HW_IPMI_H
+
+#include "exec/memory.h"
+#include "qemu-common.h"
+#include "hw/qdev.h"
+
+#define MAX_IPMI_MSG_SIZE 300
+
+enum ipmi_op {
+ IPMI_RESET_CHASSIS,
+ IPMI_POWEROFF_CHASSIS,
+ IPMI_POWERON_CHASSIS,
+ IPMI_POWERCYCLE_CHASSIS,
+ IPMI_PULSE_DIAG_IRQ,
+ IPMI_SHUTDOWN_VIA_ACPI_OVERTEMP,
+ IPMI_SEND_NMI
+};
+
+#define IPMI_CC_INVALID_CMD 0xc1
+#define IPMI_CC_COMMAND_INVALID_FOR_LUN 0xc2
+#define IPMI_CC_TIMEOUT 0xc3
+#define IPMI_CC_OUT_OF_SPACE 0xc4
+#define IPMI_CC_INVALID_RESERVATION 0xc5
+#define IPMI_CC_REQUEST_DATA_TRUNCATED 0xc6
+#define IPMI_CC_REQUEST_DATA_LENGTH_INVALID 0xc7
+#define IPMI_CC_PARM_OUT_OF_RANGE 0xc9
+#define IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES 0xca
+#define IPMI_CC_REQ_ENTRY_NOT_PRESENT 0xcb
+#define IPMI_CC_INVALID_DATA_FIELD 0xcc
+#define IPMI_CC_BMC_INIT_IN_PROGRESS 0xd2
+#define IPMI_CC_COMMAND_NOT_SUPPORTED 0xd5
+
+#define IPMI_NETFN_APP 0x06
+
+#define IPMI_DEBUG 1
+
+/* Specified in the SMBIOS spec. */
+#define IPMI_SMBIOS_KCS 0x01
+#define IPMI_SMBIOS_SMIC 0x02
+#define IPMI_SMBIOS_BT 0x03
+#define IPMI_SMBIOS_SSIF 0x04
+
+/* IPMI Interface types (KCS, SMIC, BT) are prefixed with this */
+#define TYPE_IPMI_INTERFACE_PREFIX "ipmi-interface-"
+
+typedef struct IPMIBmc IPMIBmc;
+
+/*
+ * An IPMI Interface, the interface for talking between the target
+ * and the BMC.
+ */
+#define TYPE_IPMI_INTERFACE "ipmi-interface"
+#define IPMI_INTERFACE(obj) \
+ OBJECT_CHECK(IPMIInterface, (obj), TYPE_IPMI_INTERFACE)
+#define IPMI_INTERFACE_CLASS(klass) \
+ OBJECT_CLASS_CHECK(IPMIInterfaceClass, (klass), TYPE_IPMI_INTERFACE)
+#define IPMI_INTERFACE_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(IPMIInterfaceClass, (obj), TYPE_IPMI_INTERFACE)
+
+typedef struct IPMIInterface {
+ Object parent_obj;
+
+ IPMIBmc *bmc;
+
+ bool do_wake;
+
+ qemu_irq irq;
+
+ unsigned long io_base;
+ unsigned long io_length;
+ MemoryRegion io;
+
+ unsigned char slave_addr;
+
+ bool obf_irq_set;
+ bool atn_irq_set;
+ bool use_irq;
+ bool irqs_enabled;
+
+ uint8_t outmsg[MAX_IPMI_MSG_SIZE];
+ uint32_t outpos;
+ uint32_t outlen;
+
+ uint8_t inmsg[MAX_IPMI_MSG_SIZE];
+ uint32_t inlen;
+ bool write_end;
+} IPMIInterface;
+
+typedef struct IPMIInterfaceClass {
+ ObjectClass parent_class;
+
+ unsigned int smbios_type;
+
+ void (*init)(struct IPMIInterface *s, Error **errp);
+
+ /*
+ * Perform various operations on the hardware. If checkonly is
+ * true, it will return if the operation can be performed, but it
+ * will not do the operation.
+ */
+ int (*do_hw_op)(struct IPMIInterface *s, enum ipmi_op op, int checkonly);
+
+ /*
+ * Enable/disable irqs on the interface when the BMC requests this.
+ */
+ void (*set_irq_enable)(struct IPMIInterface *s, int val);
+
+ /*
+ * Handle an event that occurred on the interface, generally the.
+ * target writing to a register.
+ */
+ void (*handle_if_event)(struct IPMIInterface *s);
+
+ /*
+ * The interfaces use this to perform certain ops
+ */
+ void (*set_atn)(struct IPMIInterface *s, int val, int irq);
+
+ /*
+ * Got an IPMI warm/cold reset.
+ */
+ void (*reset)(struct IPMIInterface *s, bool is_cold);
+
+ /*
+ * Handle a response from the bmc.
+ */
+ void (*handle_rsp)(struct IPMIInterface *s, uint8_t msg_id,
+ unsigned char *rsp, unsigned int rsp_len);
+} IPMIInterfaceClass;
+
+void ipmi_interface_init(IPMIInterface *s, Error **errp);
+void ipmi_interface_reset(IPMIInterface *s);
+
+/*
+ * Define a BMC simulator (or perhaps a connection to a real BMC)
+ */
+#define TYPE_IPMI_BMC "ipmi-bmc"
+#define IPMI_BMC(obj) \
+ OBJECT_CHECK(IPMIBmc, (obj), TYPE_IPMI_BMC)
+#define IPMI_BMC_CLASS(klass) \
+ OBJECT_CLASS_CHECK(IPMIBmcClass, (klass), TYPE_IPMI_BMC)
+#define IPMI_BMC_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(IPMIBmcClass, (obj), TYPE_IPMI_BMC)
+
+#define TYPE_IPMI_BMC_EXTERN "ipmi-bmc-extern"
+#define TYPE_IPMI_BMC_SIMULATOR "ipmi-bmc-sim"
+
+static inline void ipmi_signal(IPMIInterface *s)
+{
+ s->do_wake = 1;
+ while (s->do_wake) {
+ s->do_wake = 0;
+ (IPMI_INTERFACE_GET_CLASS(s))->handle_if_event(s);
+ }
+}
+
+struct IPMIBmc {
+ Object parent_obj;
+
+ IPMIInterface *intf;
+ CharDriverState *chr;
+};
+
+typedef struct IPMIBmcClass {
+ ObjectClass parent_class;
+
+ void (*init)(IPMIBmc *s, Error **errp);
+
+ /* Called when the system resets to report to the bmc. */
+ void (*handle_reset)(struct IPMIBmc *s);
+
+ /*
+ * Handle a command to the bmc.
+ */
+ void (*handle_command)(struct IPMIBmc *s,
+ uint8_t *cmd, unsigned int cmd_len,
+ unsigned int max_cmd_len,
+ uint8_t msg_id);
+} IPMIBmcClass;
+
+void ipmi_bmc_init(IPMIBmc *s, Error **errp);
+
+#ifdef IPMI_DEBUG
+#define ipmi_debug(fs, ...) \
+ fprintf(stderr, "IPMI (%s): " fs, __func__, ##__VA_ARGS__)
+#else
+#define ipmi_debug(fs, ...)
+#endif
+
+#endif
diff --git a/qemu-doc.texi b/qemu-doc.texi
index ad418f8..14ac004 100644
--- a/qemu-doc.texi
+++ b/qemu-doc.texi
@@ -195,6 +195,8 @@ PCI and ISA network adapters
@item
Serial ports
@item
+IPMI BMC, either and internal or external one
+@item
Creative SoundBlaster 16 sound card
@item
ENSONIQ AudioPCI ES1370 sound card
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 02/16] ipmi: Add a PC ISA type structure
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 01/16] Add a base IPMI interface minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 03/16] ipmi: Add a KCS low-level interface minyard
` (14 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This provides the base infrastructure to tie IPMI low-level
interfaces into a PC ISA bus.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/ipmi/Makefile.objs | 1 +
hw/ipmi/isa_ipmi.c | 144 +++++++++++++++++++++++++++++++++++++
include/hw/nvram/fw_cfg.h | 11 ++-
5 files changed, 157 insertions(+), 1 deletion(-)
create mode 100644 hw/ipmi/isa_ipmi.c
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index e7179a6..7ee1789 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -11,6 +11,7 @@ CONFIG_VGA_CIRRUS=y
CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
CONFIG_IPMI=y
+CONFIG_ISA_IPMI=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index d04705d..8003d91 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -11,6 +11,7 @@ CONFIG_VGA_CIRRUS=y
CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
CONFIG_IPMI=y
+CONFIG_ISA_IPMI=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/ipmi/Makefile.objs b/hw/ipmi/Makefile.objs
index 65bde11..3494b70 100644
--- a/hw/ipmi/Makefile.objs
+++ b/hw/ipmi/Makefile.objs
@@ -1 +1,2 @@
common-obj-$(CONFIG_IPMI) += ipmi.o
+common-obj-$(CONFIG_ISA_IPMI) += isa_ipmi.o
diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi.c
new file mode 100644
index 0000000..1c1ab8d
--- /dev/null
+++ b/hw/ipmi/isa_ipmi.c
@@ -0,0 +1,144 @@
+/*
+ * QEMU ISA IPMI emulation
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "hw/hw.h"
+#include "hw/isa/isa.h"
+#include "hw/i386/pc.h"
+#include "qemu/timer.h"
+#include "sysemu/char.h"
+#include "sysemu/sysemu.h"
+#include "ipmi.h"
+
+/* This is the type the user specifies on the -device command line */
+#define TYPE_ISA_IPMI "isa-ipmi"
+#define ISA_IPMI(obj) OBJECT_CHECK(ISAIPMIDevice, (obj), TYPE_ISA_IPMI)
+
+typedef struct ISAIPMIDevice {
+ ISADevice dev;
+ char *interface;
+ uint32_t iobase;
+ int32 isairq;
+ uint8_t slave_addr;
+ CharDriverState *chr;
+ IPMIInterface *intf;
+} ISAIPMIDevice;
+
+static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
+{
+ ISADevice *isadev = ISA_DEVICE(dev);
+ ISAIPMIDevice *ipmi = ISA_IPMI(dev);
+ char typename[20];
+ Object *intfobj;
+ IPMIInterface *intf;
+ Object *bmcobj;
+ IPMIBmc *bmc;
+
+ if (!ipmi->interface) {
+ ipmi->interface = g_strdup("kcs");
+ }
+
+ if (ipmi->chr) {
+ bmcobj = object_new(TYPE_IPMI_BMC_EXTERN);
+ } else {
+ bmcobj = object_new(TYPE_IPMI_BMC_SIMULATOR);
+ }
+ bmc = IPMI_BMC(bmcobj);
+ bmc->chr = ipmi->chr;
+ snprintf(typename, sizeof(typename),
+ TYPE_IPMI_INTERFACE_PREFIX "%s", ipmi->interface);
+ intfobj = object_new(typename);
+ intf = IPMI_INTERFACE(intfobj);
+ bmc->intf = intf;
+ intf->bmc = bmc;
+ intf->io_base = ipmi->iobase;
+ intf->slave_addr = ipmi->slave_addr;
+ ipmi_interface_init(intf, errp);
+ if (*errp) {
+ return;
+ }
+ ipmi_bmc_init(bmc, errp);
+ if (*errp) {
+ return;
+ }
+
+ /* These may be set by the interface. */
+ ipmi->iobase = intf->io_base;
+ ipmi->slave_addr = intf->slave_addr;
+
+ if (ipmi->isairq > 0) {
+ isa_init_irq(isadev, &intf->irq, ipmi->isairq);
+ intf->use_irq = 1;
+ }
+
+ ipmi->intf = intf;
+ object_property_add_child(OBJECT(isadev), "intf", OBJECT(intf), errp);
+ if (*errp) {
+ return;
+ }
+ object_property_add_child(OBJECT(isadev), "bmc", OBJECT(bmc), errp);
+ if (*errp) {
+ return;
+ }
+
+ qdev_set_legacy_instance_id(dev, intf->io_base, intf->io_length);
+
+ isa_register_ioport(isadev, &intf->io, intf->io_base);
+}
+
+static void ipmi_isa_reset(DeviceState *qdev)
+{
+ ISAIPMIDevice *isa = ISA_IPMI(qdev);
+
+ ipmi_interface_reset(isa->intf);
+}
+
+static Property ipmi_isa_properties[] = {
+ DEFINE_PROP_STRING("interface", ISAIPMIDevice, interface),
+ DEFINE_PROP_UINT32("iobase", ISAIPMIDevice, iobase, 0),
+ DEFINE_PROP_INT32("irq", ISAIPMIDevice, isairq, 5),
+ DEFINE_PROP_UINT8("slave_addr", ISAIPMIDevice, slave_addr, 0),
+ DEFINE_PROP_CHR("chardev", ISAIPMIDevice, chr),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ipmi_isa_class_initfn(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->realize = ipmi_isa_realizefn;
+ dc->reset = ipmi_isa_reset;
+ dc->props = ipmi_isa_properties;
+}
+
+static const TypeInfo ipmi_isa_info = {
+ .name = TYPE_ISA_IPMI,
+ .parent = TYPE_ISA_DEVICE,
+ .instance_size = sizeof(ISAIPMIDevice),
+ .class_init = ipmi_isa_class_initfn,
+};
+
+static void ipmi_register_types(void)
+{
+ type_register_static(&ipmi_isa_info);
+}
+
+type_init(ipmi_register_types)
diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h
index 56e1ed7..217d1e4 100644
--- a/include/hw/nvram/fw_cfg.h
+++ b/include/hw/nvram/fw_cfg.h
@@ -38,7 +38,16 @@
#define FW_CFG_FILE_FIRST 0x20
#define FW_CFG_FILE_SLOTS 0x10
-#define FW_CFG_MAX_ENTRY (FW_CFG_FILE_FIRST+FW_CFG_FILE_SLOTS)
+
+#define FW_CFG_IPMI_INTERFACE 0x30
+#define FW_CFG_IPMI_BASE_ADDR 0x31
+#define FW_CFG_IPMI_REG_SPACE 0x32
+#define FW_CFG_IPMI_REG_SPACING 0x33
+#define FW_CFG_IPMI_SLAVE_ADDR 0x34
+#define FW_CFG_IPMI_IRQ 0x35
+#define FW_CFG_IPMI_VERSION 0x36
+
+#define FW_CFG_MAX_ENTRY (FW_CFG_IPMI_VERSION + 1)
#define FW_CFG_WRITE_CHANNEL 0x4000
#define FW_CFG_ARCH_LOCAL 0x8000
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 03/16] ipmi: Add a KCS low-level interface
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 01/16] Add a base IPMI interface minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 02/16] ipmi: Add a PC ISA type structure minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 04/16] ipmi: Add a BT " minyard
` (13 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This provides the simulation of the KCS hardware interface.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/ipmi/Makefile.objs | 1 +
hw/ipmi/ipmi_kcs.c | 337 +++++++++++++++++++++++++++++++++++++
4 files changed, 340 insertions(+)
create mode 100644 hw/ipmi/ipmi_kcs.c
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index 7ee1789..4f28a4c 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -12,6 +12,7 @@ CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
+CONFIG_IPMI_KCS=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 8003d91..64bc16b 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -12,6 +12,7 @@ CONFIG_VMWARE_VGA=y
CONFIG_VMMOUSE=y
CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
+CONFIG_IPMI_KCS=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/ipmi/Makefile.objs b/hw/ipmi/Makefile.objs
index 3494b70..3c811ae 100644
--- a/hw/ipmi/Makefile.objs
+++ b/hw/ipmi/Makefile.objs
@@ -1,2 +1,3 @@
common-obj-$(CONFIG_IPMI) += ipmi.o
common-obj-$(CONFIG_ISA_IPMI) += isa_ipmi.o
+common-obj-$(CONFIG_IPMI_KCS) += ipmi_kcs.o
diff --git a/hw/ipmi/ipmi_kcs.c b/hw/ipmi/ipmi_kcs.c
new file mode 100644
index 0000000..411799e
--- /dev/null
+++ b/hw/ipmi/ipmi_kcs.c
@@ -0,0 +1,337 @@
+/*
+ * QEMU IPMI KCS emulation
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "hw/hw.h"
+#include "ipmi.h"
+
+#define TYPE_IPMI_INTERFACE_KCS TYPE_IPMI_INTERFACE_PREFIX "kcs"
+#define IPMI_INTERFACE_KCS(obj) OBJECT_CHECK(IPMIKcsInterface, (obj), \
+ TYPE_IPMI_INTERFACE_KCS)
+
+#define IPMI_KCS_OBF_BIT 0
+#define IPMI_KCS_IBF_BIT 1
+#define IPMI_KCS_SMS_ATN_BIT 2
+#define IPMI_KCS_CD_BIT 3
+
+#define IPMI_KCS_OBF_MASK (1 << IPMI_KCS_OBF_BIT)
+#define IPMI_KCS_GET_OBF(d) (((d) >> IPMI_KCS_OBF_BIT) & 0x1)
+#define IPMI_KCS_SET_OBF(d, v) (d) = (((d) & ~IPMI_KCS_OBF_MASK) | \
+ (((v) & 1) << IPMI_KCS_OBF_BIT))
+#define IPMI_KCS_IBF_MASK (1 << IPMI_KCS_IBF_BIT)
+#define IPMI_KCS_GET_IBF(d) (((d) >> IPMI_KCS_IBF_BIT) & 0x1)
+#define IPMI_KCS_SET_IBF(d, v) (d) = (((d) & ~IPMI_KCS_IBF_MASK) | \
+ (((v) & 1) << IPMI_KCS_IBF_BIT))
+#define IPMI_KCS_SMS_ATN_MASK (1 << IPMI_KCS_SMS_ATN_BIT)
+#define IPMI_KCS_GET_SMS_ATN(d) (((d) >> IPMI_KCS_SMS_ATN_BIT) & 0x1)
+#define IPMI_KCS_SET_SMS_ATN(d, v) (d) = (((d) & ~IPMI_KCS_SMS_ATN_MASK) | \
+ (((v) & 1) << IPMI_KCS_SMS_ATN_BIT))
+#define IPMI_KCS_CD_MASK (1 << IPMI_KCS_CD_BIT)
+#define IPMI_KCS_GET_CD(d) (((d) >> IPMI_KCS_CD_BIT) & 0x1)
+#define IPMI_KCS_SET_CD(d, v) (d) = (((d) & ~IPMI_KCS_CD_MASK) | \
+ (((v) & 1) << IPMI_KCS_CD_BIT))
+
+#define IPMI_KCS_IDLE_STATE 0
+#define IPMI_KCS_READ_STATE 1
+#define IPMI_KCS_WRITE_STATE 2
+#define IPMI_KCS_ERROR_STATE 3
+
+#define IPMI_KCS_GET_STATE(d) (((d) >> 6) & 0x3)
+#define IPMI_KCS_SET_STATE(d, v) ((d) = ((d) & ~0xc0) | (((v) & 0x3) << 6))
+
+#define IPMI_KCS_ABORT_STATUS_CMD 0x60
+#define IPMI_KCS_WRITE_START_CMD 0x61
+#define IPMI_KCS_WRITE_END_CMD 0x62
+#define IPMI_KCS_READ_CMD 0x68
+
+#define IPMI_KCS_STATUS_NO_ERR 0x00
+#define IPMI_KCS_STATUS_ABORTED_ERR 0x01
+#define IPMI_KCS_STATUS_BAD_CC_ERR 0x02
+#define IPMI_KCS_STATUS_LENGTH_ERR 0x06
+
+typedef struct IPMIKcsInterface {
+ IPMIInterface intf;
+
+ uint8_t status_reg;
+ uint8_t data_out_reg;
+
+ int16_t data_in_reg; /* -1 means not written */
+ int16_t cmd_reg;
+
+ /*
+ * This is a response number that we send with the command to make
+ * sure that the response matches the command.
+ */
+ uint8_t waiting_rsp;
+} IPMIKcsInterface;
+
+#define SET_OBF() \
+ do { \
+ IPMI_KCS_SET_OBF(kcs->status_reg, 1); \
+ if (s->use_irq && s->irqs_enabled && !s->obf_irq_set) { \
+ s->obf_irq_set = 1; \
+ if (!s->atn_irq_set) { \
+ qemu_irq_raise(s->irq); \
+ } \
+ } \
+ } while (0)
+
+static void ipmi_kcs_handle_event(IPMIInterface *s)
+{
+ IPMIKcsInterface *kcs = IPMI_INTERFACE_KCS(s);
+
+ if (kcs->cmd_reg == IPMI_KCS_ABORT_STATUS_CMD) {
+ if (IPMI_KCS_GET_STATE(kcs->status_reg) != IPMI_KCS_ERROR_STATE) {
+ kcs->waiting_rsp++; /* Invalidate the message */
+ s->outmsg[0] = IPMI_KCS_STATUS_ABORTED_ERR;
+ s->outlen = 1;
+ s->outpos = 0;
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_ERROR_STATE);
+ SET_OBF();
+ }
+ goto out;
+ }
+
+ switch (IPMI_KCS_GET_STATE(kcs->status_reg)) {
+ case IPMI_KCS_IDLE_STATE:
+ if (kcs->cmd_reg == IPMI_KCS_WRITE_START_CMD) {
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_WRITE_STATE);
+ kcs->cmd_reg = -1;
+ s->write_end = 0;
+ s->inlen = 0;
+ SET_OBF();
+ }
+ break;
+
+ case IPMI_KCS_READ_STATE:
+ handle_read:
+ if (s->outpos >= s->outlen) {
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_IDLE_STATE);
+ SET_OBF();
+ } else if (kcs->data_in_reg == IPMI_KCS_READ_CMD) {
+ kcs->data_out_reg = s->outmsg[s->outpos];
+ s->outpos++;
+ SET_OBF();
+ } else {
+ s->outmsg[0] = IPMI_KCS_STATUS_BAD_CC_ERR;
+ s->outlen = 1;
+ s->outpos = 0;
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_ERROR_STATE);
+ SET_OBF();
+ goto out;
+ }
+ break;
+
+ case IPMI_KCS_WRITE_STATE:
+ if (kcs->data_in_reg != -1) {
+ /*
+ * Don't worry about input overrun here, that will be
+ * handled in the BMC.
+ */
+ if (s->inlen < sizeof(s->inmsg)) {
+ s->inmsg[s->inlen] = kcs->data_in_reg;
+ }
+ s->inlen++;
+ }
+ if (s->write_end) {
+ IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(s->bmc);
+ s->outlen = 0;
+ s->write_end = 0;
+ s->outpos = 0;
+ bk->handle_command(s->bmc, s->inmsg, s->inlen, sizeof(s->inmsg),
+ kcs->waiting_rsp);
+ goto out_noibf;
+ } else if (kcs->cmd_reg == IPMI_KCS_WRITE_END_CMD) {
+ kcs->cmd_reg = -1;
+ s->write_end = 1;
+ }
+ SET_OBF();
+ break;
+
+ case IPMI_KCS_ERROR_STATE:
+ if (kcs->data_in_reg != -1) {
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_READ_STATE);
+ kcs->data_in_reg = IPMI_KCS_READ_CMD;
+ goto handle_read;
+ }
+ break;
+ }
+
+ if (kcs->cmd_reg != -1) {
+ /* Got an invalid command */
+ s->outmsg[0] = IPMI_KCS_STATUS_BAD_CC_ERR;
+ s->outlen = 1;
+ s->outpos = 0;
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_ERROR_STATE);
+ }
+
+ out:
+ kcs->cmd_reg = -1;
+ kcs->data_in_reg = -1;
+ IPMI_KCS_SET_IBF(kcs->status_reg, 0);
+ out_noibf:
+ return;
+}
+
+static void ipmi_kcs_handle_rsp(IPMIInterface *s, uint8_t msg_id,
+ unsigned char *rsp, unsigned int rsp_len)
+{
+ IPMIKcsInterface *kcs = IPMI_INTERFACE_KCS(s);
+
+ if (kcs->waiting_rsp == msg_id) {
+ kcs->waiting_rsp++;
+ if (rsp_len > sizeof(s->outmsg)) {
+ s->outmsg[0] = rsp[0];
+ s->outmsg[1] = rsp[1];
+ s->outmsg[2] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES;
+ s->outlen = 3;
+ } else {
+ memcpy(s->outmsg, rsp, rsp_len);
+ s->outlen = rsp_len;
+ }
+ IPMI_KCS_SET_STATE(kcs->status_reg, IPMI_KCS_READ_STATE);
+ kcs->data_in_reg = IPMI_KCS_READ_CMD;
+ ipmi_signal(&kcs->intf);
+ }
+}
+
+
+static uint64_t ipmi_kcs_ioport_read(void *opaque, hwaddr addr, unsigned size)
+{
+ IPMIKcsInterface *kcs = opaque;
+ uint32_t ret;
+
+ switch (addr & 1) {
+ case 0:
+ ret = kcs->data_out_reg;
+ IPMI_KCS_SET_OBF(kcs->status_reg, 0);
+ if (kcs->intf.obf_irq_set) {
+ kcs->intf.obf_irq_set = 0;
+ if (!kcs->intf.atn_irq_set) {
+ qemu_irq_lower(kcs->intf.irq);
+ }
+ }
+ break;
+ case 1:
+ ret = kcs->status_reg;
+ if (kcs->intf.atn_irq_set) {
+ kcs->intf.atn_irq_set = 0;
+ if (!kcs->intf.obf_irq_set) {
+ qemu_irq_lower(kcs->intf.irq);
+ }
+ }
+ break;
+ }
+ return ret;
+}
+
+static void ipmi_kcs_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size)
+{
+ IPMIKcsInterface *kcs = opaque;
+ IPMIInterface *s = &kcs->intf;
+
+ if (IPMI_KCS_GET_IBF(kcs->status_reg)) {
+ return;
+ }
+
+ switch (addr & 1) {
+ case 0:
+ kcs->data_in_reg = val;
+ break;
+
+ case 1:
+ kcs->cmd_reg = val;
+ break;
+ }
+ IPMI_KCS_SET_IBF(kcs->status_reg, 1);
+ ipmi_signal(s);
+}
+
+const MemoryRegionOps ipmi_kcs_io_ops = {
+ .read = ipmi_kcs_ioport_read,
+ .write = ipmi_kcs_ioport_write,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static void ipmi_kcs_set_atn(IPMIInterface *s, int val, int irq)
+{
+ IPMIKcsInterface *kcs = IPMI_INTERFACE_KCS(s);
+
+ IPMI_KCS_SET_SMS_ATN(kcs->status_reg, val);
+ if (val) {
+ if (irq && !s->atn_irq_set && s->use_irq && s->irqs_enabled) {
+ s->atn_irq_set = 1;
+ if (!s->obf_irq_set) {
+ qemu_irq_raise(s->irq);
+ }
+ }
+ } else {
+ if (s->atn_irq_set) {
+ s->atn_irq_set = 0;
+ if (!s->obf_irq_set) {
+ qemu_irq_lower(s->irq);
+ }
+ }
+ }
+}
+
+static void ipmi_kcs_init(IPMIInterface *s, Error **errp)
+{
+ IPMIKcsInterface *kcs = IPMI_INTERFACE_KCS(s);
+
+ if (!s->io_base) {
+ s->io_base = 0xca2;
+ }
+ s->io_length = 2;
+
+ memory_region_init_io(&s->io, NULL, &ipmi_kcs_io_ops, kcs, "ipmi-kcs", 2);
+}
+
+static void ipmi_kcs_class_init(ObjectClass *class, void *data)
+{
+ IPMIInterfaceClass *k = IPMI_INTERFACE_CLASS(class);
+
+ k->init = ipmi_kcs_init;
+ k->smbios_type = IPMI_SMBIOS_KCS;
+ k->set_atn = ipmi_kcs_set_atn;
+ k->handle_rsp = ipmi_kcs_handle_rsp;
+ k->handle_if_event = ipmi_kcs_handle_event;
+}
+
+static const TypeInfo ipmi_kcs_type = {
+ .name = TYPE_IPMI_INTERFACE_KCS,
+ .parent = TYPE_IPMI_INTERFACE,
+ .instance_size = sizeof(IPMIKcsInterface),
+ .class_init = ipmi_kcs_class_init,
+};
+
+static void ipmi_kcs_register_types(void)
+{
+ type_register_static(&ipmi_kcs_type);
+}
+
+type_init(ipmi_kcs_register_types)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 04/16] ipmi: Add a BT low-level interface
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (2 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 03/16] ipmi: Add a KCS low-level interface minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 05/16] ipmi: Add a local BMC simulation minyard
` (12 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This provides the simulation of the BT hardware interface for
IPMI.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/ipmi/Makefile.objs | 1 +
hw/ipmi/ipmi_bt.c | 374 +++++++++++++++++++++++++++++++++++++
4 files changed, 377 insertions(+)
create mode 100644 hw/ipmi/ipmi_bt.c
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index 4f28a4c..42dbdc8 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -13,6 +13,7 @@ CONFIG_VMMOUSE=y
CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
+CONFIG_IPMI_BT=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 64bc16b..1c02ce7 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -13,6 +13,7 @@ CONFIG_VMMOUSE=y
CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
+CONFIG_IPMI_BT=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/ipmi/Makefile.objs b/hw/ipmi/Makefile.objs
index 3c811ae..a8cd463 100644
--- a/hw/ipmi/Makefile.objs
+++ b/hw/ipmi/Makefile.objs
@@ -1,3 +1,4 @@
common-obj-$(CONFIG_IPMI) += ipmi.o
common-obj-$(CONFIG_ISA_IPMI) += isa_ipmi.o
common-obj-$(CONFIG_IPMI_KCS) += ipmi_kcs.o
+common-obj-$(CONFIG_IPMI_BT) += ipmi_bt.o
diff --git a/hw/ipmi/ipmi_bt.c b/hw/ipmi/ipmi_bt.c
new file mode 100644
index 0000000..95beb71
--- /dev/null
+++ b/hw/ipmi/ipmi_bt.c
@@ -0,0 +1,374 @@
+/*
+ * QEMU IPMI BT emulation
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "hw/hw.h"
+#include "ipmi.h"
+
+#define TYPE_IPMI_INTERFACE_BT TYPE_IPMI_INTERFACE_PREFIX "bt"
+#define IPMI_INTERFACE_BT(obj) OBJECT_CHECK(IPMIBtInterface, (obj), \
+ TYPE_IPMI_INTERFACE_BT)
+
+/* Control register */
+#define IPMI_BT_CLR_WR_BIT 0
+#define IPMI_BT_CLR_RD_BIT 1
+#define IPMI_BT_H2B_ATN_BIT 2
+#define IPMI_BT_B2H_ATN_BIT 3
+#define IPMI_BT_SMS_ATN_BIT 4
+#define IPMI_BT_HBUSY_BIT 6
+#define IPMI_BT_BBUSY_BIT 7
+
+#define IPMI_BT_CLR_WR_MASK (1 << IPMI_BT_CLR_WR_BIT)
+#define IPMI_BT_GET_CLR_WR(d) (((d) >> IPMI_BT_CLR_WR_BIT) & 0x1)
+#define IPMI_BT_SET_CLR_WR(d, v) (d) = (((d) & ~IPMI_BT_CLR_WR_MASK) | \
+ (((v & 1) << IPMI_BT_CLR_WR_BIT)))
+
+#define IPMI_BT_CLR_RD_MASK (1 << IPMI_BT_CLR_RD_BIT)
+#define IPMI_BT_GET_CLR_RD(d) (((d) >> IPMI_BT_CLR_RD_BIT) & 0x1)
+#define IPMI_BT_SET_CLR_RD(d, v) (d) = (((d) & ~IPMI_BT_CLR_RD_MASK) | \
+ (((v & 1) << IPMI_BT_CLR_RD_BIT)))
+
+#define IPMI_BT_H2B_ATN_MASK (1 << IPMI_BT_H2B_ATN_BIT)
+#define IPMI_BT_GET_H2B_ATN(d) (((d) >> IPMI_BT_H2B_ATN_BIT) & 0x1)
+#define IPMI_BT_SET_H2B_ATN(d, v) (d) = (((d) & ~IPMI_BT_H2B_ATN_MASK) | \
+ (((v & 1) << IPMI_BT_H2B_ATN_BIT)))
+
+#define IPMI_BT_B2H_ATN_MASK (1 << IPMI_BT_B2H_ATN_BIT)
+#define IPMI_BT_GET_B2H_ATN(d) (((d) >> IPMI_BT_B2H_ATN_BIT) & 0x1)
+#define IPMI_BT_SET_B2H_ATN(d, v) (d) = (((d) & ~IPMI_BT_B2H_ATN_MASK) | \
+ (((v & 1) << IPMI_BT_B2H_ATN_BIT)))
+
+#define IPMI_BT_SMS_ATN_MASK (1 << IPMI_BT_SMS_ATN_BIT)
+#define IPMI_BT_GET_SMS_ATN(d) (((d) >> IPMI_BT_SMS_ATN_BIT) & 0x1)
+#define IPMI_BT_SET_SMS_ATN(d, v) (d) = (((d) & ~IPMI_BT_SMS_ATN_MASK) | \
+ (((v & 1) << IPMI_BT_SMS_ATN_BIT)))
+
+#define IPMI_BT_HBUSY_MASK (1 << IPMI_BT_HBUSY_BIT)
+#define IPMI_BT_GET_HBUSY(d) (((d) >> IPMI_BT_HBUSY_BIT) & 0x1)
+#define IPMI_BT_SET_HBUSY(d, v) (d) = (((d) & ~IPMI_BT_HBUSY_MASK) | \
+ (((v & 1) << IPMI_BT_HBUSY_BIT)))
+
+#define IPMI_BT_BBUSY_MASK (1 << IPMI_BT_BBUSY_BIT)
+#define IPMI_BT_GET_BBUSY(d) (((d) >> IPMI_BT_BBUSY_BIT) & 0x1)
+#define IPMI_BT_SET_BBUSY(d, v) (d) = (((d) & ~IPMI_BT_BBUSY_MASK) | \
+ (((v & 1) << IPMI_BT_BBUSY_BIT)))
+
+
+/* Mask register */
+#define IPMI_BT_B2H_IRQ_EN_BIT 0
+#define IPMI_BT_B2H_IRQ_BIT 1
+
+#define IPMI_BT_B2H_IRQ_EN_MASK (1 << IPMI_BT_B2H_IRQ_EN_BIT)
+#define IPMI_BT_GET_B2H_IRQ_EN(d) (((d) >> IPMI_BT_B2H_IRQ_EN_BIT) & 0x1)
+#define IPMI_BT_SET_B2H_IRQ_EN(d, v) (d) = (((d) & ~IPMI_BT_B2H_IRQ_EN_MASK) | \
+ (((v & 1) << IPMI_BT_B2H_IRQ_EN_BIT)))
+
+#define IPMI_BT_B2H_IRQ_MASK (1 << IPMI_BT_B2H_IRQ_BIT)
+#define IPMI_BT_GET_B2H_IRQ(d) (((d) >> IPMI_BT_B2H_IRQ_BIT) & 0x1)
+#define IPMI_BT_SET_B2H_IRQ(d, v) (d) = (((d) & ~IPMI_BT_B2H_IRQ_MASK) | \
+ (((v & 1) << IPMI_BT_B2H_IRQ_BIT)))
+
+typedef struct IPMIBtInterface {
+ IPMIInterface intf;
+
+ uint8_t control_reg;
+ uint8_t mask_reg;
+
+ /*
+ * This is a response number that we send with the command to make
+ * sure that the response matches the command.
+ */
+ uint8_t waiting_rsp;
+ uint8_t waiting_seq;
+} IPMIBtInterface;
+
+#define IPMI_CMD_GET_BT_INTF_CAP 0x36
+
+static void ipmi_bt_handle_event(IPMIInterface *s)
+{
+ IPMIBtInterface *bt = IPMI_INTERFACE_BT(s);
+
+ if (s->inlen < 4) {
+ goto out;
+ }
+ /* Note that overruns are handled by handle_command */
+ if (s->inmsg[0] != (s->inlen - 1)) {
+ /* Length mismatch, just ignore. */
+ IPMI_BT_SET_BBUSY(bt->control_reg, 1);
+ s->inlen = 0;
+ goto out;
+ }
+ if ((s->inmsg[1] == (IPMI_NETFN_APP << 2)) &&
+ (s->inmsg[3] == IPMI_CMD_GET_BT_INTF_CAP)) {
+ /* We handle this one ourselves. */
+ s->outmsg[0] = 9;
+ s->outmsg[1] = s->inmsg[1] | 0x04;
+ s->outmsg[2] = s->inmsg[2];
+ s->outmsg[3] = s->inmsg[3];
+ s->outmsg[4] = 0;
+ s->outmsg[5] = 1; /* Only support 1 outstanding request. */
+ if (sizeof(s->inmsg) > 0xff) { /* Input buffer size */
+ s->outmsg[6] = 0xff;
+ } else {
+ s->outmsg[6] = (unsigned char) sizeof(s->inmsg);
+ }
+ if (sizeof(s->outmsg) > 0xff) { /* Output buffer size */
+ s->outmsg[7] = 0xff;
+ } else {
+ s->outmsg[7] = (unsigned char) sizeof(s->outmsg);
+ }
+ s->outmsg[8] = 10; /* Max request to response time */
+ s->outmsg[9] = 0; /* Don't recommend retries */
+ s->outlen = 10;
+ IPMI_BT_SET_BBUSY(bt->control_reg, 0);
+ IPMI_BT_SET_B2H_ATN(bt->control_reg, 1);
+ if (s->use_irq && s->irqs_enabled &&
+ !IPMI_BT_GET_B2H_IRQ(bt->mask_reg) &&
+ IPMI_BT_GET_B2H_IRQ_EN(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 1);
+ qemu_irq_raise(s->irq);
+ }
+ goto out;
+ }
+ bt->waiting_seq = s->inmsg[2];
+ s->inmsg[2] = s->inmsg[1];
+ {
+ IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(s->bmc);
+ bk->handle_command(s->bmc, s->inmsg + 2, s->inlen - 2, sizeof(s->inmsg),
+ bt->waiting_rsp);
+ }
+ out:
+ return;
+}
+
+static void ipmi_bt_handle_rsp(IPMIInterface *s, uint8_t msg_id,
+ unsigned char *rsp, unsigned int rsp_len)
+{
+ IPMIBtInterface *bt = IPMI_INTERFACE_BT(s);
+
+ if (bt->waiting_rsp == msg_id) {
+ bt->waiting_rsp++;
+ if (rsp_len > (sizeof(s->outmsg) - 2)) {
+ s->outmsg[0] = 4;
+ s->outmsg[1] = rsp[0];
+ s->outmsg[2] = bt->waiting_seq;
+ s->outmsg[3] = rsp[1];
+ s->outmsg[4] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES;
+ s->outlen = 5;
+ } else {
+ s->outmsg[0] = rsp_len + 1;
+ s->outmsg[1] = rsp[0];
+ s->outmsg[2] = bt->waiting_seq;
+ memcpy(s->outmsg + 3, rsp + 1, rsp_len - 1);
+ s->outlen = rsp_len + 2;
+ }
+ IPMI_BT_SET_BBUSY(bt->control_reg, 0);
+ IPMI_BT_SET_B2H_ATN(bt->control_reg, 1);
+ if (s->use_irq && s->irqs_enabled &&
+ !IPMI_BT_GET_B2H_IRQ(bt->mask_reg) &&
+ IPMI_BT_GET_B2H_IRQ_EN(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 1);
+ qemu_irq_raise(s->irq);
+ }
+ }
+}
+
+
+static uint64_t ipmi_bt_ioport_read(void *opaque, hwaddr addr, unsigned size)
+{
+ IPMIBtInterface *bt = opaque;
+ IPMIInterface *s = &bt->intf;
+ uint32_t ret = 0xff;
+
+ switch (addr & 3) {
+ case 0:
+ ret = bt->control_reg;
+ break;
+ case 1:
+ if (s->outpos < s->outlen) {
+ ret = s->outmsg[s->outpos];
+ s->outpos++;
+ if (s->outpos == s->outlen) {
+ s->outpos = 0;
+ s->outlen = 0;
+ }
+ } else {
+ ret = 0xff;
+ }
+ break;
+ case 2:
+ ret = bt->mask_reg;
+ break;
+ }
+ return ret;
+}
+
+static void ipmi_bt_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size)
+{
+ IPMIBtInterface *bt = opaque;
+ IPMIInterface *s = &bt->intf;
+
+ switch (addr & 3) {
+ case 0:
+ if (IPMI_BT_GET_CLR_WR(val)) {
+ s->inlen = 0;
+ }
+ if (IPMI_BT_GET_CLR_RD(val)) {
+ s->outpos = 0;
+ }
+ if (IPMI_BT_GET_B2H_ATN(val)) {
+ IPMI_BT_SET_B2H_ATN(bt->control_reg, 0);
+ }
+ if (IPMI_BT_GET_SMS_ATN(val)) {
+ IPMI_BT_SET_SMS_ATN(bt->control_reg, 0);
+ }
+ if (IPMI_BT_GET_HBUSY(val)) {
+ /* Toggle */
+ IPMI_BT_SET_HBUSY(bt->control_reg,
+ !IPMI_BT_GET_HBUSY(bt->control_reg));
+ }
+ if (IPMI_BT_GET_H2B_ATN(val)) {
+ IPMI_BT_SET_BBUSY(bt->control_reg, 1);
+ ipmi_signal(s);
+ }
+ break;
+
+ case 1:
+ if (s->inlen < sizeof(s->inmsg)) {
+ s->inmsg[s->inlen] = val;
+ }
+ s->inlen++;
+ break;
+
+ case 2:
+ if (IPMI_BT_GET_B2H_IRQ_EN(val) !=
+ IPMI_BT_GET_B2H_IRQ_EN(bt->mask_reg)) {
+ if (IPMI_BT_GET_B2H_IRQ_EN(val)) {
+ if (IPMI_BT_GET_B2H_ATN(bt->control_reg) ||
+ IPMI_BT_GET_SMS_ATN(bt->control_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 1);
+ qemu_irq_raise(s->irq);
+ }
+ IPMI_BT_SET_B2H_IRQ_EN(bt->mask_reg, 1);
+ } else {
+ if (IPMI_BT_GET_B2H_IRQ(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 0);
+ qemu_irq_lower(s->irq);
+ }
+ IPMI_BT_SET_B2H_IRQ_EN(bt->mask_reg, 0);
+ }
+ }
+ if (IPMI_BT_GET_B2H_IRQ(val) && IPMI_BT_GET_B2H_IRQ(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 0);
+ qemu_irq_lower(s->irq);
+ }
+ break;
+ }
+}
+
+static const MemoryRegionOps ipmi_bt_io_ops = {
+ .read = ipmi_bt_ioport_read,
+ .write = ipmi_bt_ioport_write,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static void ipmi_bt_set_atn(IPMIInterface *s, int val, int irq)
+{
+ IPMIBtInterface *bt = IPMI_INTERFACE_BT(s);
+
+ if (!!val == IPMI_BT_GET_SMS_ATN(bt->control_reg)) {
+ return;
+ }
+
+ IPMI_BT_SET_SMS_ATN(bt->control_reg, val);
+ if (val) {
+ if (irq && s->use_irq && s->irqs_enabled &&
+ !IPMI_BT_GET_B2H_ATN(bt->control_reg) &&
+ IPMI_BT_GET_B2H_IRQ_EN(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 1);
+ qemu_irq_raise(s->irq);
+ }
+ } else {
+ if (!IPMI_BT_GET_B2H_ATN(bt->control_reg) &&
+ IPMI_BT_GET_B2H_IRQ(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 0);
+ qemu_irq_lower(s->irq);
+ }
+ }
+}
+
+static void ipmi_bt_handle_reset(IPMIInterface *s, bool is_cold)
+{
+ IPMIBtInterface *bt = IPMI_INTERFACE_BT(s);
+
+ if (is_cold) {
+ /* Disable the BT interrupt on reset */
+ if (IPMI_BT_GET_B2H_IRQ(bt->mask_reg)) {
+ IPMI_BT_SET_B2H_IRQ(bt->mask_reg, 0);
+ qemu_irq_lower(s->irq);
+ }
+ IPMI_BT_SET_B2H_IRQ_EN(bt->mask_reg, 0);
+ }
+}
+
+static void ipmi_bt_init(IPMIInterface *s, Error **errp)
+{
+ IPMIBtInterface *bt = IPMI_INTERFACE_BT(s);
+
+ if (!s->io_base) {
+ s->io_base = 0xe4;
+ }
+ s->io_length = 3;
+
+ memory_region_init_io(&s->io, NULL, &ipmi_bt_io_ops, bt, "ipmi-bt", 3);
+}
+
+static void ipmi_bt_class_init(ObjectClass *klass, void *data)
+{
+ IPMIInterfaceClass *k = IPMI_INTERFACE_CLASS(klass);
+
+ k->init = ipmi_bt_init;
+ k->smbios_type = IPMI_SMBIOS_BT;
+ k->set_atn = ipmi_bt_set_atn;
+ k->handle_rsp = ipmi_bt_handle_rsp;
+ k->handle_if_event = ipmi_bt_handle_event;
+ k->reset = ipmi_bt_handle_reset;
+}
+
+static const TypeInfo ipmi_bt_type = {
+ .name = TYPE_IPMI_INTERFACE_BT,
+ .parent = TYPE_IPMI_INTERFACE,
+ .instance_size = sizeof(IPMIBtInterface),
+ .class_init = ipmi_bt_class_init,
+};
+
+static void ipmi_bt_register_types(void)
+{
+ type_register_static(&ipmi_bt_type);
+}
+
+type_init(ipmi_bt_register_types)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 05/16] ipmi: Add a local BMC simulation
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (3 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 04/16] ipmi: Add a BT " minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 06/16] ipmi: Add an external connection simulation interface minyard
` (11 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This provides a minimal local BMC, basically enough to comply with the
spec and provide a complete watchdog timer (including a sensor, SDR,
and event).
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/ipmi/Makefile.objs | 1 +
hw/ipmi/ipmi_sim.c | 1728 ++++++++++++++++++++++++++++++++++++
4 files changed, 1731 insertions(+)
create mode 100644 hw/ipmi/ipmi_sim.c
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index 42dbdc8..47a1b3b 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -14,6 +14,7 @@ CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
CONFIG_IPMI_BT=y
+CONFIG_IPMI_LOCAL=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 1c02ce7..9cda1d9 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -14,6 +14,7 @@ CONFIG_IPMI=y
CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
CONFIG_IPMI_BT=y
+CONFIG_IPMI_LOCAL=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/ipmi/Makefile.objs b/hw/ipmi/Makefile.objs
index a8cd463..2366160 100644
--- a/hw/ipmi/Makefile.objs
+++ b/hw/ipmi/Makefile.objs
@@ -2,3 +2,4 @@ common-obj-$(CONFIG_IPMI) += ipmi.o
common-obj-$(CONFIG_ISA_IPMI) += isa_ipmi.o
common-obj-$(CONFIG_IPMI_KCS) += ipmi_kcs.o
common-obj-$(CONFIG_IPMI_BT) += ipmi_bt.o
+common-obj-$(CONFIG_IPMI_LOCAL) += ipmi_sim.o
diff --git a/hw/ipmi/ipmi_sim.c b/hw/ipmi/ipmi_sim.c
new file mode 100644
index 0000000..8028f40
--- /dev/null
+++ b/hw/ipmi/ipmi_sim.c
@@ -0,0 +1,1728 @@
+/*
+ * IPMI BMC emulation
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdint.h>
+#include "qemu/timer.h"
+#include "ipmi.h"
+
+#define IPMI_NETFN_CHASSIS 0x00
+#define IPMI_NETFN_CHASSIS_MAXCMD 0x03
+
+#define IPMI_CMD_GET_CHASSIS_CAPABILITIES 0x00
+#define IPMI_CMD_GET_CHASSIS_STATUS 0x01
+#define IPMI_CMD_CHASSIS_CONTROL 0x02
+
+#define IPMI_NETFN_SENSOR_EVENT 0x04
+#define IPMI_NETFN_SENSOR_EVENT_MAXCMD 0x2e
+
+#define IPMI_CMD_SET_SENSOR_EVT_ENABLE 0x28
+#define IPMI_CMD_GET_SENSOR_EVT_ENABLE 0x29
+#define IPMI_CMD_REARM_SENSOR_EVTS 0x2a
+#define IPMI_CMD_GET_SENSOR_EVT_STATUS 0x2b
+#define IPMI_CMD_GET_SENSOR_READING 0x2d
+
+/* #define IPMI_NETFN_APP 0x06 In ipmi.h */
+#define IPMI_NETFN_APP_MAXCMD 0x36
+
+#define IPMI_CMD_GET_DEVICE_ID 0x01
+#define IPMI_CMD_COLD_RESET 0x02
+#define IPMI_CMD_WARM_RESET 0x03
+#define IPMI_CMD_RESET_WATCHDOG_TIMER 0x22
+#define IPMI_CMD_SET_WATCHDOG_TIMER 0x24
+#define IPMI_CMD_GET_WATCHDOG_TIMER 0x25
+#define IPMI_CMD_SET_BMC_GLOBAL_ENABLES 0x2e
+#define IPMI_CMD_GET_BMC_GLOBAL_ENABLES 0x2f
+#define IPMI_CMD_CLR_MSG_FLAGS 0x30
+#define IPMI_CMD_GET_MSG_FLAGS 0x31
+#define IPMI_CMD_GET_MSG 0x33
+#define IPMI_CMD_SEND_MSG 0x34
+#define IPMI_CMD_READ_EVT_MSG_BUF 0x35
+
+#define IPMI_NETFN_STORAGE 0x0a
+#define IPMI_NETFN_STORAGE_MAXCMD 0x4a
+
+#define IPMI_CMD_GET_SDR_REP_INFO 0x20
+#define IPMI_CMD_GET_SDR_REP_ALLOC_INFO 0x21
+#define IPMI_CMD_RESERVE_SDR_REP 0x22
+#define IPMI_CMD_GET_SDR 0x23
+#define IPMI_CMD_ADD_SDR 0x24
+#define IPMI_CMD_PARTIAL_ADD_SDR 0x25
+#define IPMI_CMD_DELETE_SDR 0x26
+#define IPMI_CMD_CLEAR_SDR_REP 0x27
+#define IPMI_CMD_GET_SDR_REP_TIME 0x28
+#define IPMI_CMD_SET_SDR_REP_TIME 0x29
+#define IPMI_CMD_ENTER_SDR_REP_UPD_MODE 0x2A
+#define IPMI_CMD_EXIT_SDR_REP_UPD_MODE 0x2B
+#define IPMI_CMD_RUN_INIT_AGENT 0x2C
+#define IPMI_CMD_GET_SEL_INFO 0x40
+#define IPMI_CMD_GET_SEL_ALLOC_INFO 0x41
+#define IPMI_CMD_RESERVE_SEL 0x42
+#define IPMI_CMD_GET_SEL_ENTRY 0x43
+#define IPMI_CMD_ADD_SEL_ENTRY 0x44
+#define IPMI_CMD_PARTIAL_ADD_SEL_ENTRY 0x45
+#define IPMI_CMD_DELETE_SEL_ENTRY 0x46
+#define IPMI_CMD_CLEAR_SEL 0x47
+#define IPMI_CMD_GET_SEL_TIME 0x48
+#define IPMI_CMD_SET_SEL_TIME 0x49
+
+
+/* Same as a timespec struct. */
+struct ipmi_time {
+ long tv_sec;
+ long tv_nsec;
+};
+
+#define MAX_SEL_SIZE 128
+
+typedef struct IPMISel {
+ uint8_t sel[MAX_SEL_SIZE][16];
+ unsigned int next_free;
+ long time_offset;
+ uint16_t reservation;
+ uint8_t last_addition[4];
+ uint8_t last_clear[4];
+ uint8_t overflow;
+} IPMISel;
+
+#define MAX_SDR_SIZE 16384
+
+typedef struct IPMISdr {
+ uint8_t sdr[MAX_SDR_SIZE];
+ unsigned int next_free;
+ uint16_t next_rec_id;
+ uint16_t reservation;
+ uint8_t last_addition[4];
+ uint8_t last_clear[4];
+ uint8_t overflow;
+} IPMISdr;
+
+typedef struct IPMISensor {
+ uint8_t status;
+ uint8_t reading;
+ uint16_t states_suppt;
+ uint16_t assert_suppt;
+ uint16_t deassert_suppt;
+ uint16_t states;
+ uint16_t assert_states;
+ uint16_t deassert_states;
+ uint16_t assert_enable;
+ uint16_t deassert_enable;
+ uint8_t sensor_type;
+ uint8_t evt_reading_type_code;
+} IPMISensor;
+#define IPMI_SENSOR_GET_PRESENT(s) ((s)->status & 0x01)
+#define IPMI_SENSOR_SET_PRESENT(s, v) ((s)->status = (s->status & ~0x01) | \
+ !!(v))
+#define IPMI_SENSOR_GET_SCAN_ON(s) ((s)->status & 0x40)
+#define IPMI_SENSOR_SET_SCAN_ON(s, v) ((s)->status = (s->status & ~0x40) | \
+ ((!!(v)) << 6))
+#define IPMI_SENSOR_GET_EVENTS_ON(s) ((s)->status & 0x80)
+#define IPMI_SENSOR_SET_EVENTS_ON(s, v) ((s)->status = (s->status & ~0x80) | \
+ ((!!(v)) << 7))
+#define IPMI_SENSOR_GET_RET_STATUS(s) ((s)->status & 0xc0)
+#define IPMI_SENSOR_SET_RET_STATUS(s, v) ((s)->status = (s->status & ~0xc0) | \
+ (v & 0xc0))
+#define IPMI_SENSOR_IS_DISCRETE(s) ((s)->evt_reading_type_code != 1)
+
+#define MAX_SENSORS 20
+#define IPMI_WATCHDOG_SENSOR 0
+
+typedef struct IPMISimBmc IPMISimBmc;
+
+#define MAX_NETFNS 64
+typedef void (*IPMICmdHandler)(IPMISimBmc *s,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len);
+typedef struct IPMINetfn {
+ unsigned int cmd_nums;
+ const IPMICmdHandler *cmd_handlers;
+} IPMINetfn;
+
+typedef struct IPMIRcvBufEntry {
+ QTAILQ_ENTRY(IPMIRcvBufEntry) entry;
+ uint8_t len;
+ uint8_t buf[MAX_IPMI_MSG_SIZE];
+} IPMIRcvBufEntry;
+
+#define IPMI_BMC_SIMULATOR(obj) OBJECT_CHECK(IPMISimBmc, (obj), \
+ TYPE_IPMI_BMC_SIMULATOR)
+struct IPMISimBmc {
+ IPMIBmc parent;
+
+ QEMUTimer *timer;
+
+ uint8_t bmc_global_enables;
+ uint8_t msg_flags;
+
+ bool watchdog_initialized;
+ uint8_t watchdog_use;
+ uint8_t watchdog_action;
+ uint8_t watchdog_pretimeout; /* In seconds */
+ bool watchdog_expired;
+ uint16_t watchdog_timeout; /* in 100's of milliseconds */
+
+ bool watchdog_running;
+ bool watchdog_preaction_ran;
+ int64_t watchdog_expiry;
+
+ uint8_t device_id;
+ uint8_t ipmi_version;
+ uint8_t device_rev;
+ uint8_t fwrev1;
+ uint8_t fwrev2;
+ uint8_t mfg_id[3];
+ uint8_t product_id[2];
+
+ IPMISel sel;
+ IPMISdr sdr;
+ IPMISensor sensors[MAX_SENSORS];
+
+ /* Odd netfns are for responses, so we only need the even ones. */
+ const IPMINetfn *netfns[MAX_NETFNS / 2];
+
+ /* We allow one event in the buffer */
+ uint8_t evtbuf[16];
+
+ QTAILQ_HEAD(, IPMIRcvBufEntry) rcvbufs;
+};
+
+#define IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK (1 << 3)
+#define IPMI_BMC_MSG_FLAG_EVT_BUF_FULL (1 << 1)
+#define IPMI_BMC_MSG_FLAG_RCV_MSG_QUEUE (1 << 0)
+#define IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK_SET(s) \
+ (IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK & (s)->msg_flags)
+#define IPMI_BMC_MSG_FLAG_EVT_BUF_FULL_SET(s) \
+ (IPMI_BMC_MSG_FLAG_EVT_BUF_FULL & (s)->msg_flags)
+#define IPMI_BMC_MSG_FLAG_RCV_MSG_QUEUE_SET(s) \
+ (IPMI_BMC_MSG_FLAG_RCV_MSG_QUEUE & (s)->msg_flags)
+
+#define IPMI_BMC_RCV_MSG_QUEUE_INT_BIT 0
+#define IPMI_BMC_EVBUF_FULL_INT_BIT 1
+#define IPMI_BMC_EVENT_MSG_BUF_BIT 2
+#define IPMI_BMC_EVENT_LOG_BIT 3
+#define IPMI_BMC_MSG_INTS_ON(s) ((s)->bmc_global_enables & \
+ (1 << IPMI_BMC_RCV_MSG_QUEUE_INT_BIT))
+#define IPMI_BMC_EVBUF_FULL_INT_ENABLED(s) ((s)->bmc_global_enables & \
+ (1 << IPMI_BMC_EVBUF_FULL_INT_BIT))
+#define IPMI_BMC_EVENT_LOG_ENABLED(s) ((s)->bmc_global_enables & \
+ (1 << IPMI_BMC_EVENT_LOG_BIT))
+#define IPMI_BMC_EVENT_MSG_BUF_ENABLED(s) ((s)->bmc_global_enables & \
+ (1 << IPMI_BMC_EVENT_MSG_BUF_BIT))
+
+#define IPMI_BMC_WATCHDOG_USE_MASK 0xc7
+#define IPMI_BMC_WATCHDOG_ACTION_MASK 0x77
+#define IPMI_BMC_WATCHDOG_GET_USE(s) ((s)->watchdog_use & 0x7)
+#define IPMI_BMC_WATCHDOG_GET_DONT_LOG(s) (((s)->watchdog_use >> 7) & 0x1)
+#define IPMI_BMC_WATCHDOG_GET_DONT_STOP(s) (((s)->watchdog_use >> 6) & 0x1)
+#define IPMI_BMC_WATCHDOG_GET_PRE_ACTION(s) (((s)->watchdog_action >> 4) & 0x7)
+#define IPMI_BMC_WATCHDOG_PRE_NONE 0
+#define IPMI_BMC_WATCHDOG_PRE_SMI 1
+#define IPMI_BMC_WATCHDOG_PRE_NMI 2
+#define IPMI_BMC_WATCHDOG_PRE_MSG_INT 3
+#define IPMI_BMC_WATCHDOG_GET_ACTION(s) ((s)->watchdog_action & 0x7)
+#define IPMI_BMC_WATCHDOG_ACTION_NONE 0
+#define IPMI_BMC_WATCHDOG_ACTION_RESET 1
+#define IPMI_BMC_WATCHDOG_ACTION_POWER_DOWN 2
+#define IPMI_BMC_WATCHDOG_ACTION_POWER_CYCLE 3
+
+
+/* Add a byte to the response. */
+#define IPMI_ADD_RSP_DATA(b) \
+ do { \
+ if (*rsp_len >= max_rsp_len) { \
+ rsp[2] = IPMI_CC_REQUEST_DATA_TRUNCATED; \
+ goto out; \
+ } \
+ rsp[(*rsp_len)++] = (b); \
+ } while (0)
+
+/* Verify that the received command is a certain length. */
+#define IPMI_CHECK_CMD_LEN(l) \
+ if (cmd_len < l) { \
+ rsp[2] = IPMI_CC_REQUEST_DATA_LENGTH_INVALID; \
+ goto out; \
+ }
+
+/* Check that the reservation in the command is valid. */
+#define IPMI_CHECK_RESERVATION(off, r) \
+ do { \
+ if ((cmd[off] | (cmd[off + 1] << 8)) != r) { \
+ rsp[2] = IPMI_CC_INVALID_RESERVATION; \
+ goto out; \
+ } \
+ } while (0)
+
+
+static void ipmi_sim_handle_timeout(IPMISimBmc *ss);
+
+static void ipmi_gettime(struct ipmi_time *time)
+{
+ int64_t stime;
+
+ stime = qemu_clock_get_ns(QEMU_CLOCK_HOST);
+ time->tv_sec = stime / 1000000000LL;
+ time->tv_nsec = stime % 1000000000LL;
+}
+
+static int64_t ipmi_getmonotime(void)
+{
+ return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
+}
+
+static void ipmi_timeout(void *opaque)
+{
+ IPMISimBmc *ss = opaque;
+
+ ipmi_sim_handle_timeout(ss);
+}
+
+static void set_timestamp(IPMISimBmc *ss, uint8_t *ts)
+{
+ unsigned int val;
+ struct ipmi_time now;
+
+ ipmi_gettime(&now);
+ val = now.tv_sec + ss->sel.time_offset;
+ ts[0] = val & 0xff;
+ ts[1] = (val >> 8) & 0xff;
+ ts[2] = (val >> 16) & 0xff;
+ ts[3] = (val >> 24) & 0xff;
+}
+
+static void sdr_inc_reservation(IPMISdr *sdr)
+{
+ sdr->reservation++;
+ if (sdr->reservation == 0) {
+ sdr->reservation = 1;
+ }
+}
+
+static int sdr_add_entry(IPMISimBmc *ss, const uint8_t *entry,
+ unsigned int len, uint16_t *recid)
+{
+ if ((len < 5) || (len > 255)) {
+ return 1;
+ }
+
+ if (entry[ss->sdr.next_free + 4] != len) {
+ return 1;
+ }
+
+ if (ss->sdr.next_free + len > MAX_SDR_SIZE) {
+ ss->sdr.overflow = 1;
+ return 1;
+ }
+
+ memcpy(ss->sdr.sdr + ss->sdr.next_free, entry, len);
+ ss->sdr.sdr[ss->sdr.next_free] = ss->sdr.next_rec_id & 0xff;
+ ss->sdr.sdr[ss->sdr.next_free+1] = (ss->sdr.next_rec_id >> 8) & 0xff;
+ ss->sdr.sdr[ss->sdr.next_free+2] = 0x51; /* Conform to IPMI 1.5 spec */
+
+ if (recid) {
+ *recid = ss->sdr.next_rec_id;
+ }
+ ss->sdr.next_rec_id++;
+ set_timestamp(ss, ss->sdr.last_addition);
+ ss->sdr.next_free += len;
+ sdr_inc_reservation(&ss->sdr);
+ return 0;
+}
+
+static int sdr_find_entry(IPMISdr *sdr, uint16_t recid,
+ unsigned int *retpos, uint16_t *nextrec)
+{
+ unsigned int pos = *retpos;
+
+ while (pos < sdr->next_free) {
+ uint16_t trec = sdr->sdr[pos] | (sdr->sdr[pos + 1] << 8);
+ unsigned int nextpos = pos + sdr->sdr[pos + 4];
+
+ if (trec == recid) {
+ if (nextrec) {
+ if (nextpos >= sdr->next_free) {
+ *nextrec = 0xffff;
+ } else {
+ *nextrec = (sdr->sdr[nextpos] |
+ (sdr->sdr[nextpos + 1] << 8));
+ }
+ }
+ *retpos = pos;
+ return 0;
+ }
+ pos = nextpos;
+ }
+ return 1;
+}
+
+static void sel_inc_reservation(IPMISel *sel)
+{
+ sel->reservation++;
+ if (sel->reservation == 0) {
+ sel->reservation = 1;
+ }
+}
+
+/* Returns 1 if the SEL is full and can't hold the event. */
+static int sel_add_event(IPMISimBmc *ss, uint8_t *event)
+{
+ event[0] = 0xff;
+ event[1] = 0xff;
+ set_timestamp(ss, event + 3);
+ if (ss->sel.next_free == MAX_SEL_SIZE) {
+ ss->sel.overflow = 1;
+ return 1;
+ }
+ event[0] = ss->sel.next_free & 0xff;
+ event[1] = (ss->sel.next_free >> 8) & 0xff;
+ memcpy(ss->sel.last_addition, event + 3, 4);
+ memcpy(ss->sel.sel[ss->sel.next_free], event, 16);
+ ss->sel.next_free++;
+ sel_inc_reservation(&ss->sel);
+ return 0;
+}
+
+static int attn_irq_enabled(IPMISimBmc *ss)
+{
+ return (IPMI_BMC_MSG_INTS_ON(ss) && IPMI_BMC_MSG_FLAG_RCV_MSG_QUEUE_SET(ss))
+ || (IPMI_BMC_EVBUF_FULL_INT_ENABLED(ss) &&
+ IPMI_BMC_MSG_FLAG_EVT_BUF_FULL_SET(ss))
+ || (IPMI_BMC_MSG_INTS_ON(ss) && !QTAILQ_EMPTY(&ss->rcvbufs));
+}
+
+static void gen_event(IPMISimBmc *ss, unsigned int sens_num, uint8_t deassert,
+ uint8_t evd1, uint8_t evd2, uint8_t evd3)
+{
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+ uint8_t evt[16];
+ IPMISensor *sens = ss->sensors + sens_num;
+
+ if (!IPMI_BMC_EVENT_MSG_BUF_ENABLED(ss)) {
+ return;
+ }
+ if (!IPMI_SENSOR_GET_EVENTS_ON(sens)) {
+ return;
+ }
+
+ evt[2] = 0x2; /* System event record */
+ evt[7] = s->slave_addr;
+ evt[8] = 0;
+ evt[9] = 0x04; /* Format version */
+ evt[10] = sens->sensor_type;
+ evt[11] = sens_num;
+ evt[12] = sens->evt_reading_type_code | (!!deassert << 7);
+ evt[13] = evd1;
+ evt[14] = evd2;
+ evt[15] = evd3;
+
+ if (IPMI_BMC_EVENT_LOG_ENABLED(ss)) {
+ sel_add_event(ss, evt);
+ }
+
+ if (ss->msg_flags & IPMI_BMC_MSG_FLAG_EVT_BUF_FULL) {
+ goto out;
+ }
+
+ ss->msg_flags |= IPMI_BMC_MSG_FLAG_EVT_BUF_FULL;
+ memcpy(ss->evtbuf, evt, 16);
+ if (k->set_atn &&
+ ~(ss->msg_flags & IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK)) {
+ k->set_atn(s, 1, attn_irq_enabled(ss));
+ }
+ out:
+ return;
+}
+
+static void sensor_set_discrete_bit(IPMISimBmc *ss, unsigned int sensor,
+ unsigned int bit, unsigned int val,
+ uint8_t evd1, uint8_t evd2, uint8_t evd3)
+{
+ IPMISensor *sens;
+ uint16_t mask;
+
+ if (sensor >= MAX_SENSORS) {
+ return;
+ }
+ if (bit >= 16) {
+ return;
+ }
+
+ mask = (1 << bit);
+ sens = ss->sensors + sensor;
+ if (val) {
+ sens->states |= mask & sens->states_suppt;
+ if (sens->assert_states & mask) {
+ return; /* Already asserted */
+ }
+ sens->assert_states |= mask & sens->assert_suppt;
+ if (sens->assert_enable & mask & sens->assert_states) {
+ /* Send an event on assert */
+ gen_event(ss, sensor, 0, evd1, evd2, evd3);
+ }
+ } else {
+ sens->states &= ~(mask & sens->states_suppt);
+ if (sens->deassert_states & mask) {
+ return; /* Already deasserted */
+ }
+ sens->deassert_states |= mask & sens->deassert_suppt;
+ if (sens->deassert_enable & mask & sens->deassert_states) {
+ /* Send an event on deassert */
+ gen_event(ss, sensor, 1, evd1, evd2, evd3);
+ }
+ }
+}
+
+static void ipmi_init_sensors_from_sdrs(IPMISimBmc *s)
+{
+ unsigned int i, pos;
+ IPMISensor *sens;
+
+ for (i = 0; i < MAX_SENSORS; i++) {
+ memset(s->sensors + i, 0, sizeof(*sens));
+ }
+
+ pos = 0;
+ for (i = 0; !sdr_find_entry(&s->sdr, i, &pos, NULL); i++) {
+ uint8_t *sdr = s->sdr.sdr + pos;
+ unsigned int len = sdr[4];
+
+ if (len < 20) {
+ continue;
+ }
+ if ((sdr[3] < 1) || (sdr[3] > 2)) {
+ continue; /* Not a sensor SDR we set from */
+ }
+
+ if (sdr[7] > MAX_SENSORS) {
+ continue;
+ }
+ sens = s->sensors + sdr[7];
+
+ IPMI_SENSOR_SET_PRESENT(sens, 1);
+ IPMI_SENSOR_SET_SCAN_ON(sens, (sdr[10] >> 6) & 1);
+ IPMI_SENSOR_SET_EVENTS_ON(sens, (sdr[10] >> 5) & 1);
+ sens->assert_suppt = sdr[14] | (sdr[15] << 8);
+ sens->deassert_suppt = sdr[16] | (sdr[17] << 8);
+ sens->states_suppt = sdr[18] | (sdr[19] << 8);
+ sens->sensor_type = sdr[12];
+ sens->evt_reading_type_code = sdr[13] & 0x7f;
+
+ /* Enable all the events that are supported. */
+ sens->assert_enable = sens->assert_suppt;
+ sens->deassert_enable = sens->deassert_suppt;
+ }
+}
+
+static int ipmi_register_netfn(IPMISimBmc *s, unsigned int netfn,
+ const IPMINetfn *netfnd)
+{
+ if ((netfn & 1) || (netfn > MAX_NETFNS) || (s->netfns[netfn / 2])) {
+ return -1;
+ }
+ s->netfns[netfn / 2] = netfnd;
+ return 0;
+}
+
+static void next_timeout(IPMISimBmc *ss)
+{
+ int64_t next;
+ if (ss->watchdog_running) {
+ next = ss->watchdog_expiry;
+ } else {
+ /* Wait a minute */
+ next = ipmi_getmonotime() + 60 * 1000000000LL;
+ }
+ timer_mod_ns(ss->timer, next);
+}
+
+static void ipmi_sim_handle_command(IPMIBmc *b,
+ uint8_t *cmd, unsigned int cmd_len,
+ unsigned int max_cmd_len,
+ uint8_t msg_id)
+{
+ IPMISimBmc *ss = IPMI_BMC_SIMULATOR(b);
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+ unsigned int netfn;
+ uint8_t rsp[MAX_IPMI_MSG_SIZE];
+ unsigned int rsp_len_holder = 0;
+ unsigned int *rsp_len = &rsp_len_holder;
+ unsigned int max_rsp_len = sizeof(rsp);
+
+ /* Set up the response, set the low bit of NETFN. */
+ /* Note that max_rsp_len must be at least 3 */
+ IPMI_ADD_RSP_DATA(cmd[0] | 0x04);
+ IPMI_ADD_RSP_DATA(cmd[1]);
+ IPMI_ADD_RSP_DATA(0); /* Assume success */
+
+ /* If it's too short or it was truncated, return an error. */
+ if (cmd_len < 2) {
+ rsp[2] = IPMI_CC_REQUEST_DATA_LENGTH_INVALID;
+ goto out;
+ }
+ if (cmd_len > max_cmd_len) {
+ rsp[2] = IPMI_CC_REQUEST_DATA_TRUNCATED;
+ goto out;
+ }
+
+ if ((cmd[0] & 0x03) != 0) {
+ /* Only have stuff on LUN 0 */
+ rsp[2] = IPMI_CC_COMMAND_INVALID_FOR_LUN;
+ goto out;
+ }
+
+ netfn = cmd[0] >> 2;
+
+ /* Odd netfns are not valid, make sure the command is registered */
+ if ((netfn & 1) || !ss->netfns[netfn / 2] ||
+ (cmd[1] >= ss->netfns[netfn / 2]->cmd_nums) ||
+ (!ss->netfns[netfn / 2]->cmd_handlers[cmd[1]])) {
+ rsp[2] = IPMI_CC_INVALID_CMD;
+ goto out;
+ }
+
+ ss->netfns[netfn / 2]->cmd_handlers[cmd[1]](ss, cmd, cmd_len, rsp, rsp_len,
+ max_rsp_len);
+
+ out:
+ k->handle_rsp(s, msg_id, rsp, *rsp_len);
+
+ next_timeout(ss);
+}
+
+static void ipmi_sim_handle_timeout(IPMISimBmc *ss)
+{
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+
+ if (!ss->watchdog_running) {
+ goto out;
+ }
+
+ if (!ss->watchdog_preaction_ran) {
+ switch (IPMI_BMC_WATCHDOG_GET_PRE_ACTION(ss)) {
+ case IPMI_BMC_WATCHDOG_PRE_NMI:
+ ss->msg_flags |= IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK;
+ k->do_hw_op(s, IPMI_SEND_NMI, 0);
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 8, 1,
+ 0xc8, (2 << 4) | 0xf, 0xff);
+ break;
+
+ case IPMI_BMC_WATCHDOG_PRE_MSG_INT:
+ ss->msg_flags |= IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK;
+ if (k->set_atn &&
+ !(ss->msg_flags & IPMI_BMC_MSG_FLAG_EVT_BUF_FULL)) {
+ k->set_atn(s, 1, attn_irq_enabled(ss));
+ }
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 8, 1,
+ 0xc8, (3 << 4) | 0xf, 0xff);
+ break;
+
+ default:
+ goto do_full_expiry;
+ }
+
+ ss->watchdog_preaction_ran = 1;
+ /* Issued the pretimeout, do the rest of the timeout now. */
+ ss->watchdog_expiry = ipmi_getmonotime();
+ ss->watchdog_expiry += ss->watchdog_pretimeout * 1000000000LL;
+ goto out;
+ }
+
+ do_full_expiry:
+ ss->watchdog_running = 0; /* Stop the watchdog on a timeout */
+ ss->watchdog_expired |= (1 << IPMI_BMC_WATCHDOG_GET_USE(ss));
+ switch (IPMI_BMC_WATCHDOG_GET_ACTION(ss)) {
+ case IPMI_BMC_WATCHDOG_ACTION_NONE:
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 0, 1,
+ 0xc0, ss->watchdog_use & 0xf, 0xff);
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_RESET:
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 1, 1,
+ 0xc1, ss->watchdog_use & 0xf, 0xff);
+ k->do_hw_op(s, IPMI_RESET_CHASSIS, 0);
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_POWER_DOWN:
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 2, 1,
+ 0xc2, ss->watchdog_use & 0xf, 0xff);
+ k->do_hw_op(s, IPMI_POWEROFF_CHASSIS, 0);
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_POWER_CYCLE:
+ sensor_set_discrete_bit(ss, IPMI_WATCHDOG_SENSOR, 2, 1,
+ 0xc3, ss->watchdog_use & 0xf, 0xff);
+ k->do_hw_op(s, IPMI_POWERCYCLE_CHASSIS, 0);
+ break;
+ }
+
+ out:
+ next_timeout(ss);
+}
+
+static void chassis_capabilities(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIInterface *s = ss->parent.intf;
+
+ IPMI_ADD_RSP_DATA(0);
+ IPMI_ADD_RSP_DATA(s->slave_addr);
+ IPMI_ADD_RSP_DATA(s->slave_addr);
+ IPMI_ADD_RSP_DATA(s->slave_addr);
+ IPMI_ADD_RSP_DATA(s->slave_addr);
+ out:
+ return;
+}
+
+static void chassis_status(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(0x61); /* Unknown power restore, power is on */
+ IPMI_ADD_RSP_DATA(0);
+ IPMI_ADD_RSP_DATA(0);
+ IPMI_ADD_RSP_DATA(0);
+ out:
+ return;
+}
+
+static void chassis_control(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+
+ IPMI_CHECK_CMD_LEN(3);
+ switch (cmd[2] & 0xf) {
+ case 0: /* power down */
+ rsp[2] = k->do_hw_op(s, IPMI_POWEROFF_CHASSIS, 0);
+ break;
+ case 1: /* power up */
+ rsp[2] = k->do_hw_op(s, IPMI_POWERON_CHASSIS, 0);
+ break;
+ case 2: /* power cycle */
+ rsp[2] = k->do_hw_op(s, IPMI_POWERCYCLE_CHASSIS, 0);
+ break;
+ case 3: /* hard reset */
+ rsp[2] = k->do_hw_op(s, IPMI_RESET_CHASSIS, 0);
+ break;
+ case 4: /* pulse diagnostic interrupt */
+ rsp[2] = k->do_hw_op(s, IPMI_PULSE_DIAG_IRQ, 0);
+ break;
+ case 5: /* soft shutdown via ACPI by overtemp emulation */
+ rsp[2] = k->do_hw_op(s,
+ IPMI_SHUTDOWN_VIA_ACPI_OVERTEMP, 0);
+ break;
+ default:
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ out:
+ return;
+}
+
+static void get_device_id(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->device_id);
+ IPMI_ADD_RSP_DATA(ss->device_rev & 0xf);
+ IPMI_ADD_RSP_DATA(ss->fwrev1 & 0x7f);
+ IPMI_ADD_RSP_DATA(ss->fwrev2);
+ IPMI_ADD_RSP_DATA(ss->ipmi_version);
+ IPMI_ADD_RSP_DATA(0x07); /* sensor, SDR, and SEL. */
+ IPMI_ADD_RSP_DATA(ss->mfg_id[0]);
+ IPMI_ADD_RSP_DATA(ss->mfg_id[1]);
+ IPMI_ADD_RSP_DATA(ss->mfg_id[2]);
+ IPMI_ADD_RSP_DATA(ss->product_id[0]);
+ IPMI_ADD_RSP_DATA(ss->product_id[1]);
+ out:
+ return;
+}
+
+static void set_global_enables(IPMISimBmc *ss, uint8_t val)
+{
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+ bool irqs_on;
+
+ ss->bmc_global_enables = val;
+
+ irqs_on = val & (IPMI_BMC_EVBUF_FULL_INT_BIT |
+ IPMI_BMC_RCV_MSG_QUEUE_INT_BIT);
+
+ k->set_irq_enable(s, irqs_on);
+}
+
+static void cold_reset(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+
+ /* Disable all interrupts */
+ set_global_enables(ss, 1 << IPMI_BMC_EVENT_LOG_BIT);
+
+ if (k->reset) {
+ k->reset(s, true);
+ }
+}
+
+static void warm_reset(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+
+ if (k->reset) {
+ k->reset(s, false);
+ }
+}
+
+static void set_bmc_global_enables(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_CHECK_CMD_LEN(3);
+ set_global_enables(ss, cmd[2]);
+ out:
+ return;
+}
+
+static void get_bmc_global_enables(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->bmc_global_enables);
+ out:
+ return;
+}
+
+static void clr_msg_flags(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+
+ IPMI_CHECK_CMD_LEN(3);
+ if (cmd[2] & IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK) {
+ if (k->set_atn &&
+ !(ss->msg_flags & IPMI_BMC_MSG_FLAG_EVT_BUF_FULL)) {
+ k->set_atn(s, 0, attn_irq_enabled(ss));
+ }
+ }
+ ss->msg_flags &= ~cmd[2];
+ out:
+ return;
+}
+
+static void get_msg_flags(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->msg_flags);
+ out:
+ return;
+}
+
+static void read_evt_msg_buf(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+ unsigned int i;
+
+ if (!(ss->msg_flags & IPMI_BMC_MSG_FLAG_EVT_BUF_FULL)) {
+ rsp[2] = 0x80;
+ goto out;
+ }
+ for (i = 0; i < 16; i++) {
+ IPMI_ADD_RSP_DATA(ss->evtbuf[i]);
+ }
+ ss->msg_flags &= ~IPMI_BMC_MSG_FLAG_EVT_BUF_FULL;
+ if (k->set_atn &&
+ ~(ss->msg_flags & IPMI_BMC_MSG_FLAG_WATCHDOG_TIMEOUT_MASK)) {
+ k->set_atn(s, 0, attn_irq_enabled(ss));
+ }
+ out:
+ return;
+}
+
+static void get_msg(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIRcvBufEntry *msg;
+
+ if (QTAILQ_EMPTY(&ss->rcvbufs)) {
+ rsp[2] = 0x80; /* Queue empty */
+ goto out;
+ }
+ rsp[3] = 0; /* Channel 0 */
+ *rsp_len += 1;
+ msg = QTAILQ_FIRST(&ss->rcvbufs);
+ memcpy(rsp + 4, msg->buf, msg->len);
+ *rsp_len += msg->len;
+ QTAILQ_REMOVE(&ss->rcvbufs, msg, entry);
+ g_free(msg);
+
+ if (QTAILQ_EMPTY(&ss->rcvbufs)) {
+ ss->msg_flags &= ~IPMI_BMC_MSG_FLAG_RCV_MSG_QUEUE;
+ }
+
+ out:
+ return;
+}
+
+static unsigned char
+ipmb_checksum(unsigned char *data, int size, unsigned char csum)
+{
+ for (; size > 0; size--, data++) {
+ csum += *data;
+ }
+
+ return -csum;
+}
+
+static void send_msg(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+ IPMIRcvBufEntry *msg;
+ uint8_t *buf;
+ uint8_t netfn, rqLun, rsLun, rqSeq;
+
+ IPMI_CHECK_CMD_LEN(3);
+
+ if (cmd[2] != 0) {
+ /* We only handle channel 0 with no options */
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+
+ IPMI_CHECK_CMD_LEN(10);
+ if (cmd[3] != 0x40) {
+ /* We only emulate a MC at address 0x40. */
+ rsp[2] = 0x83; /* NAK on write */
+ goto out;
+ }
+
+ cmd += 3; /* Skip the header. */
+ cmd_len -= 3;
+
+ /*
+ * At this point we "send" the message successfully. Any error will
+ * be returned in the response.
+ */
+ if (ipmb_checksum(cmd, cmd_len, 0) != 0 ||
+ cmd[3] != 0x20) { /* Improper response address */
+ goto out; /* No response */
+ }
+
+ netfn = cmd[1] >> 2;
+ rqLun = cmd[4] & 0x3;
+ rsLun = cmd[1] & 0x3;
+ rqSeq = cmd[4] >> 2;
+
+ if (rqLun != 2) {
+ /* We only support LUN 2 coming back to us. */
+ goto out;
+ }
+
+ msg = g_malloc(sizeof(*msg));
+ msg->buf[0] = ((netfn | 1) << 2) | rqLun; /* NetFN, and make a response */
+ msg->buf[1] = ipmb_checksum(msg->buf, 1, 0);
+ msg->buf[2] = cmd[0]; /* rsSA */
+ msg->buf[3] = (rqSeq << 2) | rsLun;
+ msg->buf[4] = cmd[5]; /* Cmd */
+ msg->buf[5] = 0; /* Completion Code */
+ msg->len = 6;
+
+ if ((cmd[1] >> 2) != IPMI_NETFN_APP || cmd[5] != IPMI_CMD_GET_DEVICE_ID) {
+ /* Not a command we handle. */
+ msg->buf[5] = IPMI_CC_INVALID_CMD;
+ goto end_msg;
+ }
+
+ buf = msg->buf + msg->len; /* After the CC */
+ buf[0] = 0;
+ buf[1] = 0;
+ buf[2] = 0;
+ buf[3] = 0;
+ buf[4] = 0x51;
+ buf[5] = 0;
+ buf[6] = 0;
+ buf[7] = 0;
+ buf[8] = 0;
+ buf[9] = 0;
+ buf[10] = 0;
+ msg->len += 11;
+
+ end_msg:
+ msg->buf[msg->len] = ipmb_checksum(msg->buf, msg->len, 0);
+ msg->len++;
+ QTAILQ_INSERT_TAIL(&ss->rcvbufs, msg, entry);
+ ss->msg_flags |= IPMI_BMC_MSG_FLAG_RCV_MSG_QUEUE;
+ k->set_atn(s, 1, attn_irq_enabled(ss));
+
+ out:
+ return;
+}
+
+static void do_watchdog_reset(IPMISimBmc *ss)
+{
+ if (IPMI_BMC_WATCHDOG_GET_ACTION(ss) ==
+ IPMI_BMC_WATCHDOG_ACTION_NONE) {
+ ss->watchdog_running = 0;
+ return;
+ }
+ ss->watchdog_preaction_ran = 0;
+
+
+ /* Timeout is in tenths of a second, offset is in seconds */
+ ss->watchdog_expiry = ipmi_getmonotime();
+ ss->watchdog_expiry += ss->watchdog_timeout * 100000000LL;
+ if (IPMI_BMC_WATCHDOG_GET_PRE_ACTION(ss) != IPMI_BMC_WATCHDOG_PRE_NONE) {
+ ss->watchdog_expiry -= ss->watchdog_pretimeout * 1000000000LL;
+ }
+ ss->watchdog_running = 1;
+}
+
+static void reset_watchdog_timer(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ if (!ss->watchdog_initialized) {
+ rsp[2] = 0x80;
+ goto out;
+ }
+ do_watchdog_reset(ss);
+ out:
+ return;
+}
+
+static void set_watchdog_timer(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMIInterface *s = ss->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+ unsigned int val;
+
+ IPMI_CHECK_CMD_LEN(8);
+ val = cmd[2] & 0x7; /* Validate use */
+ if (val == 0 || val > 5) {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ val = cmd[3] & 0x7; /* Validate action */
+ switch (val) {
+ case IPMI_BMC_WATCHDOG_ACTION_NONE:
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_RESET:
+ rsp[2] = k->do_hw_op(s, IPMI_RESET_CHASSIS, 1);
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_POWER_DOWN:
+ rsp[2] = k->do_hw_op(s, IPMI_POWEROFF_CHASSIS, 1);
+ break;
+
+ case IPMI_BMC_WATCHDOG_ACTION_POWER_CYCLE:
+ rsp[2] = k->do_hw_op(s, IPMI_POWERCYCLE_CHASSIS, 1);
+ break;
+
+ default:
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ }
+ if (rsp[2]) {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+
+ val = (cmd[3] >> 4) & 0x7; /* Validate preaction */
+ switch (val) {
+ case IPMI_BMC_WATCHDOG_PRE_MSG_INT:
+ case IPMI_BMC_WATCHDOG_PRE_NONE:
+ break;
+
+ case IPMI_BMC_WATCHDOG_PRE_NMI:
+ if (!k->do_hw_op(s, IPMI_SEND_NMI, 1)) {
+ /* NMI not supported. */
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ default:
+ /* We don't support PRE_SMI */
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+
+ ss->watchdog_initialized = 1;
+ ss->watchdog_use = cmd[2] & IPMI_BMC_WATCHDOG_USE_MASK;
+ ss->watchdog_action = cmd[3] & IPMI_BMC_WATCHDOG_ACTION_MASK;
+ ss->watchdog_pretimeout = cmd[4];
+ ss->watchdog_expired &= ~cmd[5];
+ ss->watchdog_timeout = cmd[6] | (((uint16_t) cmd[7]) << 8);
+ if (ss->watchdog_running & IPMI_BMC_WATCHDOG_GET_DONT_STOP(ss)) {
+ do_watchdog_reset(ss);
+ } else {
+ ss->watchdog_running = 0;
+ }
+ out:
+ return;
+}
+
+static void get_watchdog_timer(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->watchdog_use);
+ IPMI_ADD_RSP_DATA(ss->watchdog_action);
+ IPMI_ADD_RSP_DATA(ss->watchdog_pretimeout);
+ IPMI_ADD_RSP_DATA(ss->watchdog_expired);
+ if (ss->watchdog_running) {
+ long timeout;
+ timeout = ((ss->watchdog_expiry - ipmi_getmonotime() + 50000000)
+ / 100000000);
+ IPMI_ADD_RSP_DATA(timeout & 0xff);
+ IPMI_ADD_RSP_DATA((timeout >> 8) & 0xff);
+ } else {
+ IPMI_ADD_RSP_DATA(0);
+ IPMI_ADD_RSP_DATA(0);
+ }
+ out:
+ return;
+}
+
+static void get_sdr_rep_info(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ unsigned int i;
+
+ IPMI_ADD_RSP_DATA(0x51); /* Conform to IPMI 1.5 spec */
+ IPMI_ADD_RSP_DATA(ss->sdr.next_rec_id & 0xff);
+ IPMI_ADD_RSP_DATA((ss->sdr.next_rec_id >> 8) & 0xff);
+ IPMI_ADD_RSP_DATA((MAX_SDR_SIZE - ss->sdr.next_free) & 0xff);
+ IPMI_ADD_RSP_DATA(((MAX_SDR_SIZE - ss->sdr.next_free) >> 8) & 0xff);
+ for (i = 0; i < 4; i++) {
+ IPMI_ADD_RSP_DATA(ss->sdr.last_addition[i]);
+ }
+ for (i = 0; i < 4; i++) {
+ IPMI_ADD_RSP_DATA(ss->sdr.last_clear[i]);
+ }
+ /* Only modal support, reserve supported */
+ IPMI_ADD_RSP_DATA((ss->sdr.overflow << 7) | 0x22);
+ out:
+ return;
+}
+
+static void reserve_sdr_rep(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->sdr.reservation & 0xff);
+ IPMI_ADD_RSP_DATA((ss->sdr.reservation >> 8) & 0xff);
+ out:
+ return;
+}
+
+static void get_sdr(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ unsigned int pos;
+ uint16_t nextrec;
+
+ IPMI_CHECK_CMD_LEN(8);
+ if (cmd[6]) {
+ IPMI_CHECK_RESERVATION(2, ss->sdr.reservation);
+ }
+ pos = 0;
+ if (sdr_find_entry(&ss->sdr, cmd[4] | (cmd[5] << 8),
+ &pos, &nextrec)) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ if (cmd[6] > (ss->sdr.sdr[pos + 4])) {
+ rsp[2] = IPMI_CC_PARM_OUT_OF_RANGE;
+ goto out;
+ }
+
+ IPMI_ADD_RSP_DATA(nextrec & 0xff);
+ IPMI_ADD_RSP_DATA((nextrec >> 8) & 0xff);
+
+ if (cmd[7] == 0xff) {
+ cmd[7] = ss->sdr.sdr[pos + 4] - cmd[6];
+ }
+
+ if ((cmd[7] + *rsp_len) > max_rsp_len) {
+ rsp[2] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES;
+ goto out;
+ }
+ memcpy(rsp + *rsp_len, ss->sdr.sdr + pos + cmd[6], cmd[7]);
+ *rsp_len += cmd[7];
+ out:
+ return;
+}
+
+static void add_sdr(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ uint16_t recid;
+
+ if (sdr_add_entry(ss, cmd + 2, cmd_len - 2, &recid)) {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ IPMI_ADD_RSP_DATA(recid & 0xff);
+ IPMI_ADD_RSP_DATA((recid >> 8) & 0xff);
+ out:
+ return;
+}
+
+static void clear_sdr_rep(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_CHECK_CMD_LEN(8);
+ IPMI_CHECK_RESERVATION(2, ss->sdr.reservation);
+ if (cmd[4] != 'C' || cmd[5] != 'L' || cmd[6] != 'R') {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ if (cmd[7] == 0xaa) {
+ ss->sdr.next_free = 0;
+ ss->sdr.overflow = 0;
+ set_timestamp(ss, ss->sdr.last_clear);
+ IPMI_ADD_RSP_DATA(1); /* Erasure complete */
+ sdr_inc_reservation(&ss->sdr);
+ } else if (cmd[7] == 0) {
+ IPMI_ADD_RSP_DATA(1); /* Erasure complete */
+ } else {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ out:
+ return;
+}
+
+static void get_sel_info(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ unsigned int i, val;
+
+ IPMI_ADD_RSP_DATA(0x51); /* Conform to IPMI 1.5 */
+ IPMI_ADD_RSP_DATA(ss->sel.next_free & 0xff);
+ IPMI_ADD_RSP_DATA((ss->sel.next_free >> 8) & 0xff);
+ val = (MAX_SEL_SIZE - ss->sel.next_free) * 16;
+ IPMI_ADD_RSP_DATA(val & 0xff);
+ IPMI_ADD_RSP_DATA((val >> 8) & 0xff);
+ for (i = 0; i < 4; i++) {
+ IPMI_ADD_RSP_DATA(ss->sel.last_addition[i]);
+ }
+ for (i = 0; i < 4; i++) {
+ IPMI_ADD_RSP_DATA(ss->sel.last_clear[i]);
+ }
+ /* Only support Reserve SEL */
+ IPMI_ADD_RSP_DATA((ss->sel.overflow << 7) | 0x02);
+ out:
+ return;
+}
+
+static void reserve_sel(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_ADD_RSP_DATA(ss->sel.reservation & 0xff);
+ IPMI_ADD_RSP_DATA((ss->sel.reservation >> 8) & 0xff);
+ out:
+ return;
+}
+
+static void get_sel_entry(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ unsigned int val;
+
+ IPMI_CHECK_CMD_LEN(8);
+ if (cmd[6]) {
+ IPMI_CHECK_RESERVATION(2, ss->sel.reservation);
+ }
+ if (ss->sel.next_free == 0) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ if (cmd[6] > 15) {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ if (cmd[7] == 0xff) {
+ cmd[7] = 16;
+ } else if ((cmd[7] + cmd[6]) > 16) {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ } else {
+ cmd[7] += cmd[6];
+ }
+
+ val = cmd[4] | (cmd[5] << 8);
+ if (val == 0xffff) {
+ val = ss->sel.next_free - 1;
+ } else if (val >= ss->sel.next_free) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ if ((val + 1) == ss->sel.next_free) {
+ IPMI_ADD_RSP_DATA(0xff);
+ IPMI_ADD_RSP_DATA(0xff);
+ } else {
+ IPMI_ADD_RSP_DATA((val + 1) & 0xff);
+ IPMI_ADD_RSP_DATA(((val + 1) >> 8) & 0xff);
+ }
+ for (; cmd[6] < cmd[7]; cmd[6]++) {
+ IPMI_ADD_RSP_DATA(ss->sel.sel[val][cmd[6]]);
+ }
+ out:
+ return;
+}
+
+static void add_sel_entry(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_CHECK_CMD_LEN(18);
+ if (sel_add_event(ss, cmd + 2)) {
+ rsp[2] = IPMI_CC_OUT_OF_SPACE;
+ goto out;
+ }
+ /* sel_add_event fills in the record number. */
+ IPMI_ADD_RSP_DATA(cmd[2]);
+ IPMI_ADD_RSP_DATA(cmd[3]);
+ out:
+ return;
+}
+
+static void clear_sel(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMI_CHECK_CMD_LEN(8);
+ IPMI_CHECK_RESERVATION(2, ss->sel.reservation);
+ if (cmd[4] != 'C' || cmd[5] != 'L' || cmd[6] != 'R') {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ if (cmd[7] == 0xaa) {
+ ss->sel.next_free = 0;
+ ss->sel.overflow = 0;
+ set_timestamp(ss, ss->sdr.last_clear);
+ IPMI_ADD_RSP_DATA(1); /* Erasure complete */
+ sel_inc_reservation(&ss->sel);
+ } else if (cmd[7] == 0) {
+ IPMI_ADD_RSP_DATA(1); /* Erasure complete */
+ } else {
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ out:
+ return;
+}
+
+static void get_sel_time(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ uint32_t val;
+ struct ipmi_time now;
+
+ ipmi_gettime(&now);
+ val = now.tv_sec + ss->sel.time_offset;
+ IPMI_ADD_RSP_DATA(val & 0xff);
+ IPMI_ADD_RSP_DATA((val >> 8) & 0xff);
+ IPMI_ADD_RSP_DATA((val >> 16) & 0xff);
+ IPMI_ADD_RSP_DATA((val >> 24) & 0xff);
+ out:
+ return;
+}
+
+static void set_sel_time(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ uint32_t val;
+ struct ipmi_time now;
+
+ IPMI_CHECK_CMD_LEN(6);
+ val = cmd[2] | (cmd[3] << 8) | (cmd[4] << 16) | (cmd[5] << 24);
+ ipmi_gettime(&now);
+ ss->sel.time_offset = now.tv_sec - ((long) val);
+ out:
+ return;
+}
+
+static void set_sensor_evt_enable(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMISensor *sens;
+
+ IPMI_CHECK_CMD_LEN(4);
+ if ((cmd[2] > MAX_SENSORS) ||
+ !IPMI_SENSOR_GET_PRESENT(ss->sensors + cmd[2])) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ sens = ss->sensors + cmd[2];
+ switch ((cmd[3] >> 4) & 0x3) {
+ case 0: /* Do not change */
+ break;
+ case 1: /* Enable bits */
+ if (cmd_len > 4) {
+ sens->assert_enable |= cmd[4];
+ }
+ if (cmd_len > 5) {
+ sens->assert_enable |= cmd[5] << 8;
+ }
+ if (cmd_len > 6) {
+ sens->deassert_enable |= cmd[6];
+ }
+ if (cmd_len > 7) {
+ sens->deassert_enable |= cmd[7] << 8;
+ }
+ break;
+ case 2: /* Disable bits */
+ if (cmd_len > 4) {
+ sens->assert_enable &= ~cmd[4];
+ }
+ if (cmd_len > 5) {
+ sens->assert_enable &= ~(cmd[5] << 8);
+ }
+ if (cmd_len > 6) {
+ sens->deassert_enable &= ~cmd[6];
+ }
+ if (cmd_len > 7) {
+ sens->deassert_enable &= ~(cmd[7] << 8);
+ }
+ break;
+ case 3:
+ rsp[2] = IPMI_CC_INVALID_DATA_FIELD;
+ goto out;
+ }
+ IPMI_SENSOR_SET_RET_STATUS(sens, cmd[3]);
+ out:
+ return;
+}
+
+static void get_sensor_evt_enable(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMISensor *sens;
+
+ IPMI_CHECK_CMD_LEN(3);
+ if ((cmd[2] > MAX_SENSORS) ||
+ !IPMI_SENSOR_GET_PRESENT(ss->sensors + cmd[2])) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ sens = ss->sensors + cmd[2];
+ IPMI_ADD_RSP_DATA(IPMI_SENSOR_GET_RET_STATUS(sens));
+ IPMI_ADD_RSP_DATA(sens->assert_enable & 0xff);
+ IPMI_ADD_RSP_DATA((sens->assert_enable >> 8) & 0xff);
+ IPMI_ADD_RSP_DATA(sens->deassert_enable & 0xff);
+ IPMI_ADD_RSP_DATA((sens->deassert_enable >> 8) & 0xff);
+ out:
+ return;
+}
+
+static void rearm_sensor_evts(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMISensor *sens;
+
+ IPMI_CHECK_CMD_LEN(4);
+ if ((cmd[2] > MAX_SENSORS) ||
+ !IPMI_SENSOR_GET_PRESENT(ss->sensors + cmd[2])) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ sens = ss->sensors + cmd[2];
+
+ if ((cmd[3] & 0x80) == 0) {
+ /* Just clear everything */
+ sens->states = 0;
+ goto out;
+ }
+ out:
+ return;
+}
+
+static void get_sensor_evt_status(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMISensor *sens;
+
+ IPMI_CHECK_CMD_LEN(3);
+ if ((cmd[2] > MAX_SENSORS) ||
+ !IPMI_SENSOR_GET_PRESENT(ss->sensors + cmd[2])) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ sens = ss->sensors + cmd[2];
+ IPMI_ADD_RSP_DATA(sens->reading);
+ IPMI_ADD_RSP_DATA(IPMI_SENSOR_GET_RET_STATUS(sens));
+ IPMI_ADD_RSP_DATA(sens->assert_states & 0xff);
+ IPMI_ADD_RSP_DATA((sens->assert_states >> 8) & 0xff);
+ IPMI_ADD_RSP_DATA(sens->deassert_states & 0xff);
+ IPMI_ADD_RSP_DATA((sens->deassert_states >> 8) & 0xff);
+ out:
+ return;
+}
+
+static void get_sensor_reading(IPMISimBmc *ss,
+ uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len,
+ unsigned int max_rsp_len)
+{
+ IPMISensor *sens;
+
+ IPMI_CHECK_CMD_LEN(3);
+ if ((cmd[2] > MAX_SENSORS) ||
+ !IPMI_SENSOR_GET_PRESENT(ss->sensors + cmd[2])) {
+ rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT;
+ goto out;
+ }
+ sens = ss->sensors + cmd[2];
+ IPMI_ADD_RSP_DATA(sens->reading);
+ IPMI_ADD_RSP_DATA(IPMI_SENSOR_GET_RET_STATUS(sens));
+ IPMI_ADD_RSP_DATA(sens->states & 0xff);
+ if (IPMI_SENSOR_IS_DISCRETE(sens)) {
+ IPMI_ADD_RSP_DATA((sens->states >> 8) & 0xff);
+ }
+ out:
+ return;
+}
+
+static const IPMICmdHandler chassis_cmds[IPMI_NETFN_CHASSIS_MAXCMD] = {
+ [IPMI_CMD_GET_CHASSIS_CAPABILITIES] = chassis_capabilities,
+ [IPMI_CMD_GET_CHASSIS_STATUS] = chassis_status,
+ [IPMI_CMD_CHASSIS_CONTROL] = chassis_control
+};
+static const IPMINetfn chassis_netfn = {
+ .cmd_nums = IPMI_NETFN_CHASSIS_MAXCMD,
+ .cmd_handlers = chassis_cmds
+};
+
+static const IPMICmdHandler
+sensor_event_cmds[IPMI_NETFN_SENSOR_EVENT_MAXCMD] = {
+ [IPMI_CMD_SET_SENSOR_EVT_ENABLE] = set_sensor_evt_enable,
+ [IPMI_CMD_GET_SENSOR_EVT_ENABLE] = get_sensor_evt_enable,
+ [IPMI_CMD_REARM_SENSOR_EVTS] = rearm_sensor_evts,
+ [IPMI_CMD_GET_SENSOR_EVT_STATUS] = get_sensor_evt_status,
+ [IPMI_CMD_GET_SENSOR_READING] = get_sensor_reading
+};
+static const IPMINetfn sensor_event_netfn = {
+ .cmd_nums = IPMI_NETFN_SENSOR_EVENT_MAXCMD,
+ .cmd_handlers = sensor_event_cmds
+};
+
+static const IPMICmdHandler app_cmds[IPMI_NETFN_APP_MAXCMD] = {
+ [IPMI_CMD_GET_DEVICE_ID] = get_device_id,
+ [IPMI_CMD_COLD_RESET] = cold_reset,
+ [IPMI_CMD_WARM_RESET] = warm_reset,
+ [IPMI_CMD_SET_BMC_GLOBAL_ENABLES] = set_bmc_global_enables,
+ [IPMI_CMD_GET_BMC_GLOBAL_ENABLES] = get_bmc_global_enables,
+ [IPMI_CMD_CLR_MSG_FLAGS] = clr_msg_flags,
+ [IPMI_CMD_GET_MSG_FLAGS] = get_msg_flags,
+ [IPMI_CMD_GET_MSG] = get_msg,
+ [IPMI_CMD_SEND_MSG] = send_msg,
+ [IPMI_CMD_READ_EVT_MSG_BUF] = read_evt_msg_buf,
+ [IPMI_CMD_RESET_WATCHDOG_TIMER] = reset_watchdog_timer,
+ [IPMI_CMD_SET_WATCHDOG_TIMER] = set_watchdog_timer,
+ [IPMI_CMD_GET_WATCHDOG_TIMER] = get_watchdog_timer,
+};
+static const IPMINetfn app_netfn = {
+ .cmd_nums = IPMI_NETFN_APP_MAXCMD,
+ .cmd_handlers = app_cmds
+};
+
+static const IPMICmdHandler storage_cmds[IPMI_NETFN_STORAGE_MAXCMD] = {
+ [IPMI_CMD_GET_SDR_REP_INFO] = get_sdr_rep_info,
+ [IPMI_CMD_RESERVE_SDR_REP] = reserve_sdr_rep,
+ [IPMI_CMD_GET_SDR] = get_sdr,
+ [IPMI_CMD_ADD_SDR] = add_sdr,
+ [IPMI_CMD_CLEAR_SDR_REP] = clear_sdr_rep,
+ [IPMI_CMD_GET_SEL_INFO] = get_sel_info,
+ [IPMI_CMD_RESERVE_SEL] = reserve_sel,
+ [IPMI_CMD_GET_SEL_ENTRY] = get_sel_entry,
+ [IPMI_CMD_ADD_SEL_ENTRY] = add_sel_entry,
+ [IPMI_CMD_CLEAR_SEL] = clear_sel,
+ [IPMI_CMD_GET_SEL_TIME] = get_sel_time,
+ [IPMI_CMD_SET_SEL_TIME] = set_sel_time,
+};
+
+static const IPMINetfn storage_netfn = {
+ .cmd_nums = IPMI_NETFN_STORAGE_MAXCMD,
+ .cmd_handlers = storage_cmds
+};
+
+static void register_cmds(IPMISimBmc *s)
+{
+ ipmi_register_netfn(s, IPMI_NETFN_CHASSIS, &chassis_netfn);
+ ipmi_register_netfn(s, IPMI_NETFN_SENSOR_EVENT, &sensor_event_netfn);
+ ipmi_register_netfn(s, IPMI_NETFN_APP, &app_netfn);
+ ipmi_register_netfn(s, IPMI_NETFN_STORAGE, &storage_netfn);
+}
+
+static const uint8_t init_sdrs[] = {
+ /* Watchdog device */
+ 0x00, 0x00, 0x51, 0x02, 40, 0x20, 0x00, 0x00,
+ 0x23, 0x01, 0x63, 0x00, 0x23, 0x6f, 0x0f, 0x01,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc8,
+ 'W', 'a', 't', 'c', 'h', 'd', 'o', 'g',
+ /* End */
+ 0xff, 0xff, 0x00, 0x00, 0x00
+};
+
+static void ipmi_sim_init(IPMIBmc *b, Error **errp)
+{
+ unsigned int i;
+ unsigned int next_recid, recid;
+ IPMISimBmc *ss = IPMI_BMC_SIMULATOR(b);
+
+ QTAILQ_INIT(&ss->rcvbufs);
+
+ ss->bmc_global_enables = (1 << IPMI_BMC_EVENT_LOG_BIT);
+ ss->device_id = 0x20;
+ ss->ipmi_version = 0x02; /* IPMI 2.0 */
+ for (i = 0; i < 4; i++) {
+ ss->sel.last_addition[i] = 0xff;
+ ss->sel.last_clear[i] = 0xff;
+ ss->sdr.last_addition[i] = 0xff;
+ ss->sdr.last_clear[i] = 0xff;
+ }
+
+ next_recid = 0;
+ for (i = 0;;) {
+ int len;
+ if ((i + 5) > sizeof(init_sdrs)) {
+ error_setg(errp, "Problem with recid 0x%4.4x\n", i);
+ return;
+ }
+ len = init_sdrs[i + 4];
+ recid = init_sdrs[i] | (init_sdrs[i + 1] << 8);
+ if (recid == 0xffff) {
+ break;
+ }
+ if ((i + len) > sizeof(init_sdrs)) {
+ error_setg(errp, "Problem with recid 0x%4.4x\n", i);
+ return;
+ }
+ if (recid != next_recid) {
+ error_setg(errp, "Problem with recid 0x%4.4x\n", i);
+ return;
+ }
+ sdr_add_entry(ss, init_sdrs + i, len, NULL);
+ i += len;
+ }
+
+ ipmi_init_sensors_from_sdrs(ss);
+ register_cmds(ss);
+
+ ss->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ipmi_timeout, ss);
+}
+
+static void ipmi_sim_class_init(ObjectClass *klass, void *data)
+{
+ IPMIBmcClass *bk = IPMI_BMC_CLASS(klass);
+
+ bk->init = ipmi_sim_init;
+ bk->handle_command = ipmi_sim_handle_command;
+}
+
+static const TypeInfo ipmi_sim_type = {
+ .name = TYPE_IPMI_BMC_SIMULATOR,
+ .parent = TYPE_IPMI_BMC,
+ .instance_size = sizeof(IPMISimBmc),
+ .class_init = ipmi_sim_class_init,
+};
+
+static void ipmi_sim_register_types(void)
+{
+ type_register_static(&ipmi_sim_type);
+}
+
+type_init(ipmi_sim_register_types)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 06/16] ipmi: Add an external connection simulation interface
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (4 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 05/16] ipmi: Add a local BMC simulation minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 07/16] ipmi: Add tests minyard
` (10 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
This adds an interface for IPMI that connects to a remote
BMC over a chardev (generally a TCP socket). The OpenIPMI
lanserv simulator describes this interface, see that for
interface details.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/ipmi/Makefile.objs | 1 +
hw/ipmi/ipmi_extern.c | 457 +++++++++++++++++++++++++++++++++++++
4 files changed, 460 insertions(+)
create mode 100644 hw/ipmi/ipmi_extern.c
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index 47a1b3b..4fb0456 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -15,6 +15,7 @@ CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
CONFIG_IPMI_BT=y
CONFIG_IPMI_LOCAL=y
+CONFIG_IPMI_EXTERN=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 9cda1d9..623c328 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -15,6 +15,7 @@ CONFIG_ISA_IPMI=y
CONFIG_IPMI_KCS=y
CONFIG_IPMI_BT=y
CONFIG_IPMI_LOCAL=y
+CONFIG_IPMI_EXTERN=y
CONFIG_SERIAL=y
CONFIG_PARALLEL=y
CONFIG_I8254=y
diff --git a/hw/ipmi/Makefile.objs b/hw/ipmi/Makefile.objs
index 2366160..9dd05a8 100644
--- a/hw/ipmi/Makefile.objs
+++ b/hw/ipmi/Makefile.objs
@@ -3,3 +3,4 @@ common-obj-$(CONFIG_ISA_IPMI) += isa_ipmi.o
common-obj-$(CONFIG_IPMI_KCS) += ipmi_kcs.o
common-obj-$(CONFIG_IPMI_BT) += ipmi_bt.o
common-obj-$(CONFIG_IPMI_LOCAL) += ipmi_sim.o
+common-obj-$(CONFIG_IPMI_EXTERN) += ipmi_extern.o
diff --git a/hw/ipmi/ipmi_extern.c b/hw/ipmi/ipmi_extern.c
new file mode 100644
index 0000000..b59ff8a
--- /dev/null
+++ b/hw/ipmi/ipmi_extern.c
@@ -0,0 +1,457 @@
+/*
+ * IPMI BMC external connection
+ *
+ * Copyright (c) 2012 Corey Minyard, MontaVista Software, LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/*
+ * This is designed to connect with OpenIPMI's lanserv serial interface
+ * using the "VM" connection type. See that for details.
+ */
+
+#include <stdint.h>
+#include "qemu/timer.h"
+#include "sysemu/char.h"
+#include "ipmi.h"
+
+#define VM_MSG_CHAR 0xA0 /* Marks end of message */
+#define VM_CMD_CHAR 0xA1 /* Marks end of a command */
+#define VM_ESCAPE_CHAR 0xAA /* Set bit 4 from the next byte to 0 */
+
+#define VM_PROTOCOL_VERSION 1
+#define VM_CMD_VERSION 0xff /* A version number byte follows */
+#define VM_CMD_NOATTN 0x00
+#define VM_CMD_ATTN 0x01
+#define VM_CMD_ATTN_IRQ 0x02
+#define VM_CMD_POWEROFF 0x03
+#define VM_CMD_RESET 0x04
+#define VM_CMD_ENABLE_IRQ 0x05 /* Enable/disable the messaging irq */
+#define VM_CMD_DISABLE_IRQ 0x06
+#define VM_CMD_SEND_NMI 0x07
+#define VM_CMD_CAPABILITIES 0x08
+#define VM_CAPABILITIES_POWER 0x01
+#define VM_CAPABILITIES_RESET 0x02
+#define VM_CAPABILITIES_IRQ 0x04
+#define VM_CAPABILITIES_NMI 0x08
+#define VM_CAPABILITIES_ATTN 0x10
+
+#define IPMI_BMC_EXTERN(obj) OBJECT_CHECK(IPMIExternBmc, (obj), \
+ TYPE_IPMI_BMC_EXTERN)
+typedef struct IPMIExternBmc {
+ IPMIBmc parent;
+
+ int connected;
+ int is_listen;
+
+ unsigned char inbuf[MAX_IPMI_MSG_SIZE + 2];
+ unsigned int inpos;
+ int in_escape;
+ int in_too_many;
+ int waiting_rsp;
+ int sending_cmd;
+
+ unsigned char outbuf[(MAX_IPMI_MSG_SIZE + 2) * 2 + 1];
+ unsigned int outpos;
+ unsigned int outlen;
+
+ struct QEMUTimer *extern_timer;
+
+ /* A reset event is pending to be sent upstream. */
+ bool send_reset;
+} IPMIExternBmc;
+
+static int can_receive(void *opaque);
+static void receive(void *opaque, const uint8_t *buf, int size);
+static void chr_event(void *opaque, int event);
+
+static unsigned char
+ipmb_checksum(const unsigned char *data, int size, unsigned char start)
+{
+ unsigned char csum = start;
+
+ for (; size > 0; size--, data++) {
+ csum += *data;
+ }
+ return csum;
+}
+
+static void continue_send(IPMIExternBmc *es)
+{
+ if (es->outlen == 0) {
+ goto check_reset;
+ }
+ send:
+ es->outpos += qemu_chr_fe_write(es->parent.chr, es->outbuf + es->outpos,
+ es->outlen - es->outpos);
+ if (es->outpos < es->outlen) {
+ /* Not fully transmitted, try again in a 10ms */
+ timer_mod_ns(es->extern_timer,
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 10000000);
+ } else {
+ /* Sent */
+ es->outlen = 0;
+ es->outpos = 0;
+ if (!es->sending_cmd) {
+ es->waiting_rsp = 1;
+ } else {
+ es->sending_cmd = 0;
+ }
+ check_reset:
+ if (es->connected && es->send_reset) {
+ /* Send the reset */
+ es->outbuf[0] = VM_CMD_RESET;
+ es->outbuf[1] = VM_CMD_CHAR;
+ es->outlen = 2;
+ es->outpos = 0;
+ es->send_reset = 0;
+ es->sending_cmd = 1;
+ goto send;
+ }
+
+ if (es->waiting_rsp) {
+ /* Make sure we get a response within 4 seconds. */
+ timer_mod_ns(es->extern_timer,
+ qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 4000000000ULL);
+ }
+ }
+ return;
+}
+
+static void extern_timeout(void *opaque)
+{
+ IPMIExternBmc *es = opaque;
+ IPMIInterface *s = es->parent.intf;
+
+ if (es->connected) {
+ if (es->waiting_rsp && (es->outlen == 0)) {
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+ /* The message response timed out, return an error. */
+ es->waiting_rsp = 0;
+ es->inbuf[1] = es->outbuf[1] | 0x04;
+ es->inbuf[2] = es->outbuf[2];
+ es->inbuf[3] = IPMI_CC_TIMEOUT;
+ k->handle_rsp(s, es->outbuf[0], es->inbuf + 1, 3);
+ } else {
+ continue_send(es);
+ }
+ }
+}
+
+static void addchar(IPMIExternBmc *es, unsigned char ch)
+{
+ switch (ch) {
+ case VM_MSG_CHAR:
+ case VM_CMD_CHAR:
+ case VM_ESCAPE_CHAR:
+ es->outbuf[es->outlen] = VM_ESCAPE_CHAR;
+ es->outlen++;
+ ch |= 0x10;
+ /* No break */
+
+ default:
+ es->outbuf[es->outlen] = ch;
+ es->outlen++;
+ }
+}
+
+static void ipmi_extern_handle_command(IPMIBmc *b,
+ uint8_t *cmd, unsigned int cmd_len,
+ unsigned int max_cmd_len,
+ uint8_t msg_id)
+{
+ IPMIExternBmc *es = IPMI_BMC_EXTERN(b);
+ IPMIInterface *s = es->parent.intf;
+ uint8_t err = 0, csum;
+ unsigned int i;
+
+ if (es->outlen) {
+ /* We already have a command queued. Shouldn't ever happen. */
+ fprintf(stderr, "IPMI KCS: Got command when not finished with the"
+ " previous commmand\n");
+ abort();
+ }
+
+ /* If it's too short or it was truncated, return an error. */
+ if (cmd_len < 2) {
+ err = IPMI_CC_REQUEST_DATA_LENGTH_INVALID;
+ } else if ((cmd_len > max_cmd_len) || (cmd_len > MAX_IPMI_MSG_SIZE)) {
+ err = IPMI_CC_REQUEST_DATA_TRUNCATED;
+ } else if (!es->connected) {
+ err = IPMI_CC_BMC_INIT_IN_PROGRESS;
+ }
+ if (err) {
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+ unsigned char rsp[3];
+ rsp[0] = cmd[0] | 0x04;
+ rsp[1] = cmd[1];
+ rsp[2] = err;
+ es->waiting_rsp = 0;
+ k->handle_rsp(s, msg_id, rsp, 3);
+ goto out;
+ }
+
+ addchar(es, msg_id);
+ for (i = 0; i < cmd_len; i++) {
+ addchar(es, cmd[i]);
+ }
+ csum = ipmb_checksum(&msg_id, 1, 0);
+ addchar(es, -ipmb_checksum(cmd, cmd_len, csum));
+
+ es->outbuf[es->outlen] = VM_MSG_CHAR;
+ es->outlen++;
+
+ /* Start the transmit */
+ continue_send(es);
+
+ out:
+ return;
+}
+
+static void handle_hw_op(IPMIExternBmc *es, unsigned char hw_op)
+{
+ IPMIInterface *s = es->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+
+ switch (hw_op) {
+ case VM_CMD_VERSION:
+ /* We only support one version at this time. */
+ break;
+
+ case VM_CMD_NOATTN:
+ k->set_atn(s, 0, 0);
+ break;
+
+ case VM_CMD_ATTN:
+ k->set_atn(s, 1, 0);
+ break;
+
+ case VM_CMD_ATTN_IRQ:
+ k->set_atn(s, 1, 1);
+ break;
+
+ case VM_CMD_POWEROFF:
+ k->do_hw_op(s, IPMI_POWEROFF_CHASSIS, 0);
+ break;
+
+ case VM_CMD_RESET:
+ k->do_hw_op(s, IPMI_RESET_CHASSIS, 0);
+ break;
+
+ case VM_CMD_ENABLE_IRQ:
+ k->set_irq_enable(s, 1);
+ break;
+
+ case VM_CMD_DISABLE_IRQ:
+ k->set_irq_enable(s, 0);
+ break;
+
+ case VM_CMD_SEND_NMI:
+ k->do_hw_op(s, IPMI_SEND_NMI, 0);
+ break;
+ }
+}
+
+static void handle_msg(IPMIExternBmc *es)
+{
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(es->parent.intf);
+
+ if (es->in_escape) {
+ ipmi_debug("msg escape not ended\n");
+ return;
+ }
+ if (es->inpos < 5) {
+ ipmi_debug("msg too short\n");
+ return;
+ }
+ if (es->in_too_many) {
+ es->inbuf[3] = IPMI_CC_REQUEST_DATA_TRUNCATED;
+ es->inpos = 4;
+ } else if (ipmb_checksum(es->inbuf, es->inpos, 0) != 0) {
+ ipmi_debug("msg checksum failure\n");
+ return;
+ } else {
+ es->inpos--; /* Remove checkum */
+ }
+
+ timer_del(es->extern_timer);
+ es->waiting_rsp = 0;
+ k->handle_rsp(es->parent.intf, es->inbuf[0], es->inbuf + 1, es->inpos - 1);
+}
+
+static int can_receive(void *opaque)
+{
+ return 1;
+}
+
+static void receive(void *opaque, const uint8_t *buf, int size)
+{
+ IPMIExternBmc *es = opaque;
+ int i;
+ unsigned char hw_op;
+
+ for (i = 0; i < size; i++) {
+ unsigned char ch = buf[i];
+
+ switch (ch) {
+ case VM_MSG_CHAR:
+ handle_msg(es);
+ es->in_too_many = 0;
+ es->inpos = 0;
+ break;
+
+ case VM_CMD_CHAR:
+ if (es->in_too_many) {
+ ipmi_debug("cmd in too many\n");
+ es->in_too_many = 0;
+ es->inpos = 0;
+ break;
+ }
+ if (es->in_escape) {
+ ipmi_debug("cmd in escape\n");
+ es->in_too_many = 0;
+ es->inpos = 0;
+ es->in_escape = 0;
+ break;
+ }
+ es->in_too_many = 0;
+ if (es->inpos < 1) {
+ break;
+ }
+ hw_op = es->inbuf[0];
+ es->inpos = 0;
+ goto out_hw_op;
+ break;
+
+ case VM_ESCAPE_CHAR:
+ es->in_escape = 1;
+ break;
+
+ default:
+ if (es->in_escape) {
+ ch &= ~0x10;
+ es->in_escape = 0;
+ }
+ if (es->in_too_many) {
+ break;
+ }
+ if (es->inpos >= sizeof(es->inbuf)) {
+ es->in_too_many = 1;
+ break;
+ }
+ es->inbuf[es->inpos] = ch;
+ es->inpos++;
+ break;
+ }
+ }
+ return;
+
+ out_hw_op:
+ handle_hw_op(es, hw_op);
+}
+
+static void chr_event(void *opaque, int event)
+{
+ IPMIExternBmc *es = opaque;
+ IPMIInterface *s = es->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+ unsigned char v;
+
+ switch (event) {
+ case CHR_EVENT_OPENED:
+ es->connected = 1;
+ es->outpos = 0;
+ es->outlen = 0;
+ addchar(es, VM_CMD_VERSION);
+ addchar(es, VM_PROTOCOL_VERSION);
+ es->outbuf[es->outlen] = VM_CMD_CHAR;
+ es->outlen++;
+ addchar(es, VM_CMD_CAPABILITIES);
+ v = VM_CAPABILITIES_IRQ | VM_CAPABILITIES_ATTN;
+ if (k->do_hw_op(es->parent.intf, IPMI_POWEROFF_CHASSIS, 1) == 0) {
+ v |= VM_CAPABILITIES_POWER;
+ }
+ if (k->do_hw_op(es->parent.intf, IPMI_RESET_CHASSIS, 1) == 0) {
+ v |= VM_CAPABILITIES_RESET;
+ }
+ if (k->do_hw_op(es->parent.intf, IPMI_SEND_NMI, 1) == 0) {
+ v |= VM_CAPABILITIES_NMI;
+ }
+ addchar(es, v);
+ es->outbuf[es->outlen] = VM_CMD_CHAR;
+ es->outlen++;
+ es->sending_cmd = 0;
+ continue_send(es);
+ break;
+
+ case CHR_EVENT_CLOSED:
+ if (!es->connected) {
+ return;
+ }
+ es->connected = 0;
+ if (es->waiting_rsp) {
+ es->waiting_rsp = 0;
+ es->inbuf[1] = es->outbuf[1] | 0x04;
+ es->inbuf[2] = es->outbuf[2];
+ es->inbuf[3] = IPMI_CC_BMC_INIT_IN_PROGRESS;
+ k->handle_rsp(s, es->outbuf[0], es->inbuf + 1, 3);
+ }
+ break;
+ }
+}
+
+static void ipmi_extern_handle_reset(IPMIBmc *b)
+{
+ IPMIExternBmc *es = IPMI_BMC_EXTERN(b);
+
+ es->send_reset = 1;
+ continue_send(es);
+}
+
+static void ipmi_extern_init(IPMIBmc *b, Error **errp)
+{
+ IPMIExternBmc *es = IPMI_BMC_EXTERN(b);
+
+ es->extern_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, extern_timeout, es);
+ qemu_chr_add_handlers(es->parent.chr, can_receive, receive, chr_event, es);
+}
+
+static void ipmi_extern_class_init(ObjectClass *klass, void *data)
+{
+ IPMIBmcClass *bk = IPMI_BMC_CLASS(klass);
+
+ bk->init = ipmi_extern_init;
+ bk->handle_command = ipmi_extern_handle_command;
+ bk->handle_reset = ipmi_extern_handle_reset;
+}
+
+static const TypeInfo ipmi_extern_type = {
+ .name = TYPE_IPMI_BMC_EXTERN,
+ .parent = TYPE_IPMI_BMC,
+ .instance_size = sizeof(IPMIExternBmc),
+ .class_init = ipmi_extern_class_init,
+};
+
+static void ipmi_extern_register_types(void)
+{
+ type_register_static(&ipmi_extern_type);
+}
+
+type_init(ipmi_extern_register_types)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 07/16] ipmi: Add tests
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (5 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 06/16] ipmi: Add an external connection simulation interface minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 08/16] ipmi: Add documentation minyard
` (9 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Test the KCS interface with a local BMC and a BT interface with an
external BMC.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
tests/Makefile | 4 +
tests/ipmi-bt-test.c | 440 ++++++++++++++++++++++++++++++++++++++++++++++++++
tests/ipmi-kcs-test.c | 294 +++++++++++++++++++++++++++++++++
3 files changed, 738 insertions(+)
create mode 100644 tests/ipmi-bt-test.c
create mode 100644 tests/ipmi-kcs-test.c
diff --git a/tests/Makefile b/tests/Makefile
index 16f0e4c..54cfda5 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -138,6 +138,8 @@ gcov-files-i386-y += hw/block/hd-geometry.c
check-qtest-i386-y += tests/boot-order-test$(EXESUF)
check-qtest-i386-y += tests/bios-tables-test$(EXESUF)
check-qtest-i386-y += tests/rtc-test$(EXESUF)
+check-qtest-i386-y += tests/ipmi-kcs-test$(EXESUF)
+check-qtest-i386-y += tests/ipmi-bt-test$(EXESUF)
check-qtest-i386-y += tests/i440fx-test$(EXESUF)
check-qtest-i386-y += tests/fw_cfg-test$(EXESUF)
check-qtest-i386-y += tests/drive_del-test$(EXESUF)
@@ -310,6 +312,8 @@ tests/spapr-phb-test$(EXESUF): tests/spapr-phb-test.o $(libqos-obj-y)
tests/fdc-test$(EXESUF): tests/fdc-test.o
tests/ide-test$(EXESUF): tests/ide-test.o $(libqos-pc-obj-y)
tests/ahci-test$(EXESUF): tests/ahci-test.o $(libqos-pc-obj-y)
+tests/ipmi-kcs-test$(EXESUF): tests/ipmi-kcs-test.o
+tests/ipmi-bt-test$(EXESUF): tests/ipmi-bt-test.o
tests/hd-geo-test$(EXESUF): tests/hd-geo-test.o
tests/boot-order-test$(EXESUF): tests/boot-order-test.o $(libqos-obj-y)
tests/bios-tables-test$(EXESUF): tests/bios-tables-test.o $(libqos-obj-y)
diff --git a/tests/ipmi-bt-test.c b/tests/ipmi-bt-test.c
new file mode 100644
index 0000000..c1da325
--- /dev/null
+++ b/tests/ipmi-bt-test.c
@@ -0,0 +1,440 @@
+/*
+ * IPMI BT test cases, using the external interface for checking
+ *
+ * Copyright (c) 2012 Corey Minyard <cminyard@mvista.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+
+#include <sys/socket.h>
+#include <netinet/in.h>
+#include <netinet/ip.h>
+#include <netinet/tcp.h>
+
+#include <glib.h>
+
+#include "libqtest.h"
+#include "qemu-common.h"
+
+#define IPMI_IRQ 5
+
+#define IPMI_BT_BASE 0xe4
+
+#define IPMI_BT_CTLREG_CLR_WR_PTR 0
+#define IPMI_BT_CTLREG_CLR_RD_PTR 1
+#define IPMI_BT_CTLREG_H2B_ATN 2
+#define IPMI_BT_CTLREG_B2H_ATN 3
+#define IPMI_BT_CTLREG_SMS_ATN 4
+#define IPMI_BT_CTLREG_H_BUSY 6
+#define IPMI_BT_CTLREG_B_BUSY 7
+
+#define IPMI_BT_CTLREG_GET(b) ((bt_get_ctrlreg() >> (b)) & 1)
+#define IPMI_BT_CTLREG_GET_H2B_ATN() IPMI_BT_CTLREG_GET(IPMI_BT_CTLREG_H2B_ATN)
+#define IPMI_BT_CTLREG_GET_B2H_ATN() IPMI_BT_CTLREG_GET(IPMI_BT_CTLREG_B2H_ATN)
+#define IPMI_BT_CTLREG_GET_SMS_ATN() IPMI_BT_CTLREG_GET(IPMI_BT_CTLREG_SMS_ATN)
+#define IPMI_BT_CTLREG_GET_H_BUSY() IPMI_BT_CTLREG_GET(IPMI_BT_CTLREG_H_BUSY)
+#define IPMI_BT_CTLREG_GET_B_BUSY() IPMI_BT_CTLREG_GET(IPMI_BT_CTLREG_B_BUSY)
+
+#define IPMI_BT_CTLREG_SET(b) bt_write_ctrlreg(1 << (b))
+#define IPMI_BT_CTLREG_SET_CLR_WR_PTR() IPMI_BT_CTLREG_SET( \
+ IPMI_BT_CTLREG_CLR_WR_PTR)
+#define IPMI_BT_CTLREG_SET_CLR_RD_PTR() IPMI_BT_CTLREG_SET( \
+ IPMI_BT_CTLREG_CLR_RD_PTR)
+#define IPMI_BT_CTLREG_SET_H2B_ATN() IPMI_BT_CTLREG_SET(IPMI_BT_CTLREG_H2B_ATN)
+#define IPMI_BT_CTLREG_SET_B2H_ATN() IPMI_BT_CTLREG_SET(IPMI_BT_CTLREG_B2H_ATN)
+#define IPMI_BT_CTLREG_SET_SMS_ATN() IPMI_BT_CTLREG_SET(IPMI_BT_CTLREG_SMS_ATN)
+#define IPMI_BT_CTLREG_SET_H_BUSY() IPMI_BT_CTLREG_SET(IPMI_BT_CTLREG_H_BUSY)
+
+static int bt_ints_enabled;
+
+static uint8_t bt_get_ctrlreg(void)
+{
+ return inb(IPMI_BT_BASE);
+}
+
+static void bt_write_ctrlreg(uint8_t val)
+{
+ outb(IPMI_BT_BASE, val);
+}
+
+static uint8_t bt_get_buf(void)
+{
+ return inb(IPMI_BT_BASE + 1);
+}
+
+static void bt_write_buf(uint8_t val)
+{
+ outb(IPMI_BT_BASE + 1, val);
+}
+
+static uint8_t bt_get_irqreg(void)
+{
+ return inb(IPMI_BT_BASE + 2);
+}
+
+static void bt_write_irqreg(uint8_t val)
+{
+ outb(IPMI_BT_BASE + 2, val);
+}
+
+static void bt_wait_b_busy(void)
+{
+ unsigned int count = 1000;
+ while (IPMI_BT_CTLREG_GET_B_BUSY() != 0) {
+ g_assert(--count != 0);
+ }
+}
+
+static void bt_wait_b2h_atn(void)
+{
+ unsigned int count = 1000;
+ while (IPMI_BT_CTLREG_GET_B2H_ATN() == 0) {
+ g_assert(--count != 0);
+ }
+}
+
+
+static int emu_lfd;
+static int emu_fd;
+static in_port_t emu_port;
+static uint8_t inbuf[100];
+static unsigned int inbuf_len;
+static unsigned int inbuf_pos;
+static int last_was_aa;
+
+static void read_emu_data(void)
+{
+ fd_set readfds;
+ int rv;
+ struct timeval tv;
+
+ FD_ZERO(&readfds);
+ FD_SET(emu_fd, &readfds);
+ tv.tv_sec = 10;
+ tv.tv_usec = 0;
+ rv = select(emu_fd + 1, &readfds, NULL, NULL, &tv);
+ if (rv == -1) {
+ perror("select");
+ }
+ g_assert(rv == 1);
+ rv = read(emu_fd, inbuf, sizeof(inbuf));
+ if (rv == -1) {
+ perror("read");
+ }
+ g_assert(rv > 0);
+ inbuf_len = rv;
+ inbuf_pos = 0;
+}
+
+static void write_emu_msg(uint8_t *msg, unsigned int len)
+{
+ int rv;
+
+#ifdef DEBUG_TEST
+ {
+ unsigned int i;
+ printf("sending:");
+ for (i = 0; i < len; i++) {
+ printf(" %2.2x", msg[i]);
+ }
+ printf("\n");
+ }
+#endif
+ rv = write(emu_fd, msg, len);
+ g_assert(rv == len);
+}
+
+static void get_emu_msg(uint8_t *msg, unsigned int *len)
+{
+ unsigned int outpos = 0;
+
+ for (;;) {
+ while (inbuf_pos < inbuf_len) {
+ uint8_t ch = inbuf[inbuf_pos++];
+
+ g_assert(outpos < *len);
+ if (last_was_aa) {
+ assert(ch & 0x10);
+ msg[outpos++] = ch & ~0x10;
+ last_was_aa = 0;
+ } else if (ch == 0xaa) {
+ last_was_aa = 1;
+ } else {
+ msg[outpos++] = ch;
+ if ((ch == 0xa0) || (ch == 0xa1)) {
+ /* Message complete */
+ *len = outpos;
+ goto done;
+ }
+ }
+ }
+ read_emu_data();
+ }
+ done:
+#ifdef DEBUG_TEST
+ {
+ unsigned int i;
+ printf("Msg:");
+ for (i = 0; i < outpos; i++) {
+ printf(" %2.2x", msg[i]);
+ }
+ printf("\n");
+ }
+#endif
+ return;
+}
+
+static uint8_t
+ipmb_checksum(const unsigned char *data, int size, unsigned char start)
+{
+ unsigned char csum = start;
+
+ for (; size > 0; size--, data++) {
+ csum += *data;
+ }
+ return csum;
+}
+
+static uint8_t get_dev_id_cmd[] = { 0x18, 0x01 };
+static uint8_t get_dev_id_rsp[] = { 0x1c, 0x01, 0x00, 0x20, 0x00, 0x00, 0x00,
+ 0x02, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00 };
+
+static uint8_t set_bmc_globals_cmd[] = { 0x18, 0x2e, 0x0f };
+static uint8_t set_bmc_globals_rsp[] = { 0x1c, 0x2e, 0x00 };
+static uint8_t enable_irq_cmd[] = { 0x05, 0xa1 };
+
+static void emu_msg_handler(void)
+{
+ uint8_t msg[100];
+ unsigned int msg_len = sizeof(msg);
+
+ get_emu_msg(msg, &msg_len);
+ g_assert(msg_len >= 5);
+ g_assert(msg[msg_len - 1] == 0xa0);
+ msg_len--;
+ g_assert(ipmb_checksum(msg, msg_len, 0) == 0);
+ msg_len--;
+ if ((msg[1] == get_dev_id_cmd[0]) && (msg[2] == get_dev_id_cmd[1])) {
+ memcpy(msg + 1, get_dev_id_rsp, sizeof(get_dev_id_rsp));
+ msg_len = sizeof(get_dev_id_rsp) + 1;
+ msg[msg_len] = -ipmb_checksum(msg, msg_len, 0);
+ msg_len++;
+ msg[msg_len++] = 0xa0;
+ write_emu_msg(msg, msg_len);
+ } else if ((msg[1] == set_bmc_globals_cmd[0]) &&
+ (msg[2] == set_bmc_globals_cmd[1])) {
+ memcpy(msg + 1, set_bmc_globals_rsp, sizeof(set_bmc_globals_rsp));
+ msg_len = sizeof(set_bmc_globals_rsp) + 1;
+ msg[msg_len] = -ipmb_checksum(msg, msg_len, 0);
+ msg_len++;
+ msg[msg_len++] = 0xa0;
+ write_emu_msg(msg, msg_len);
+ write_emu_msg(enable_irq_cmd, sizeof(enable_irq_cmd));
+ } else {
+ g_assert(0);
+ }
+}
+
+static void bt_cmd(uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len)
+{
+ unsigned int i, len, j = 0;
+ uint8_t seq = 5;
+
+ /* Should be idle */
+ g_assert(bt_get_ctrlreg() == 0);
+
+ bt_wait_b_busy();
+ IPMI_BT_CTLREG_SET_CLR_WR_PTR();
+ bt_write_buf(cmd_len + 1);
+ bt_write_buf(cmd[0]);
+ bt_write_buf(seq);
+ for (i = 1; i < cmd_len; i++) {
+ bt_write_buf(cmd[i]);
+ }
+ IPMI_BT_CTLREG_SET_H2B_ATN();
+
+ emu_msg_handler(); /* We should get a message on the socket here. */
+
+ bt_wait_b2h_atn();
+ if (bt_ints_enabled) {
+ g_assert((bt_get_irqreg() & 0x02) == 0x02);
+ g_assert(get_irq(IPMI_IRQ));
+ bt_write_irqreg(0x03);
+ } else {
+ g_assert(!get_irq(IPMI_IRQ));
+ }
+ IPMI_BT_CTLREG_SET_H_BUSY();
+ IPMI_BT_CTLREG_SET_B2H_ATN();
+ IPMI_BT_CTLREG_SET_CLR_RD_PTR();
+ len = bt_get_buf();
+ g_assert(len >= 4);
+ rsp[0] = bt_get_buf();
+ assert(bt_get_buf() == seq);
+ len--;
+ for (j = 1; j < len; j++) {
+ rsp[j] = bt_get_buf();
+ }
+ IPMI_BT_CTLREG_SET_H_BUSY();
+ *rsp_len = j;
+}
+
+
+/*
+ * We should get a connect request and a short message with capabilities.
+ */
+static void test_connect(void)
+{
+ fd_set readfds;
+ int rv;
+ int val;
+ struct timeval tv;
+ uint8_t msg[100];
+ unsigned int msglen;
+ static uint8_t exp1[] = { 0xff, 0x01, 0xa1 }; /* A protocol version */
+ static uint8_t exp2[] = { 0x08, 0x1f, 0xa1 }; /* A capabilities cmd */
+ static uint8_t exp3[] = { 0x04, 0xa1 }; /* A reset is reported */
+
+ FD_ZERO(&readfds);
+ FD_SET(emu_lfd, &readfds);
+ tv.tv_sec = 10;
+ tv.tv_usec = 0;
+ rv = select(emu_lfd + 1, &readfds, NULL, NULL, &tv);
+ g_assert(rv == 1);
+ emu_fd = accept(emu_lfd, NULL, 0);
+ if (emu_fd < 0) {
+ perror("accept");
+ }
+ g_assert(emu_fd >= 0);
+
+ val = 1;
+ rv = setsockopt(emu_fd, IPPROTO_TCP, TCP_NODELAY, &val, sizeof(val));
+ g_assert(rv != -1);
+
+ /* Report our version */
+ write_emu_msg(exp1, sizeof(exp1));
+
+ /* Validate that we get the info we expect. */
+ msglen = sizeof(msg);
+ get_emu_msg(msg, &msglen);
+ g_assert(msglen == sizeof(exp1));
+ g_assert(memcmp(msg, exp1, msglen) == 0);
+ msglen = sizeof(msg);
+ get_emu_msg(msg, &msglen);
+ g_assert(msglen == sizeof(exp2));
+ g_assert(memcmp(msg, exp2, msglen) == 0);
+ msglen = sizeof(msg);
+ get_emu_msg(msg, &msglen);
+ g_assert(msglen == sizeof(exp3));
+ g_assert(memcmp(msg, exp3, msglen) == 0);
+}
+
+/*
+ * Send a get_device_id to do a basic test.
+ */
+static void test_bt_base(void)
+{
+ uint8_t rsp[20];
+ unsigned int rsplen = sizeof(rsp);
+
+ bt_cmd(get_dev_id_cmd, sizeof(get_dev_id_cmd), rsp, &rsplen);
+ g_assert(rsplen == sizeof(get_dev_id_rsp));
+ g_assert(memcmp(get_dev_id_rsp, rsp, rsplen) == 0);
+}
+
+/*
+ * Enable IRQs for the interface.
+ */
+static void test_enable_irq(void)
+{
+ uint8_t rsp[20];
+ unsigned int rsplen = sizeof(rsp);
+
+ bt_cmd(set_bmc_globals_cmd, sizeof(set_bmc_globals_cmd), rsp, &rsplen);
+ g_assert(rsplen == sizeof(set_bmc_globals_rsp));
+ g_assert(memcmp(set_bmc_globals_rsp, rsp, rsplen) == 0);
+ bt_write_irqreg(0x01);
+ bt_ints_enabled = 1;
+}
+
+/*
+ * Create a local TCP socket with any port, then save off the port we got.
+ */
+static void open_socket(void)
+{
+ struct sockaddr_in myaddr;
+ socklen_t addrlen;
+
+ myaddr.sin_family = AF_INET;
+ myaddr.sin_addr.s_addr = htonl(INADDR_LOOPBACK);
+ myaddr.sin_port = 0;
+ emu_lfd = socket(AF_INET, SOCK_STREAM, IPPROTO_TCP);
+ if (emu_lfd == -1) {
+ perror("socket");
+ exit(1);
+ }
+ if (bind(emu_lfd, (struct sockaddr *) &myaddr, sizeof(myaddr)) == -1) {
+ perror("bind");
+ exit(1);
+ }
+ addrlen = sizeof(myaddr);
+ if (getsockname(emu_lfd, (struct sockaddr *) &myaddr , &addrlen) == -1) {
+ perror("getsockname");
+ exit(1);
+ }
+ emu_port = ntohs(myaddr.sin_port);
+ assert(listen(emu_lfd, 1) != -1);
+}
+
+int main(int argc, char **argv)
+{
+ const char *arch = qtest_get_arch();
+ char *cmdline;
+ int ret;
+
+ /* Check architecture */
+ if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
+ g_test_message("Skipping test for non-x86\n");
+ return 0;
+ }
+
+ open_socket();
+
+ /* Run the tests */
+ g_test_init(&argc, &argv, NULL);
+
+ cmdline = g_strdup_printf("-vnc none"
+ " -chardev socket,id=ipmi0,host=localhost,port=%d,reconnect=10"
+ " -device isa-ipmi,interface=bt,chardev=ipmi0", emu_port);
+ qtest_start(cmdline);
+ qtest_irq_intercept_in(global_qtest, "ioapic");
+ qtest_add_func("/ipmi/extern/connect", test_connect);
+ qtest_add_func("/ipmi/extern/bt_base", test_bt_base);
+ qtest_add_func("/ipmi/extern/bt_enable_irq", test_enable_irq);
+ qtest_add_func("/ipmi/extern/bt_base_irq", test_bt_base);
+ ret = g_test_run();
+ qtest_quit(global_qtest);
+
+ return ret;
+}
diff --git a/tests/ipmi-kcs-test.c b/tests/ipmi-kcs-test.c
new file mode 100644
index 0000000..e2e1bdb
--- /dev/null
+++ b/tests/ipmi-kcs-test.c
@@ -0,0 +1,294 @@
+/*
+ * IPMI KCS test cases, using the local interface.
+ *
+ * Copyright (c) 2012 Corey Minyard <cminyard@mvista.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+
+#include <glib.h>
+
+#include "libqtest.h"
+
+#define IPMI_IRQ 5
+
+#define IPMI_KCS_BASE 0xca2
+
+#define IPMI_KCS_STATUS_ABORT 0x60
+#define IPMI_KCS_CMD_WRITE_START 0x61
+#define IPMI_KCS_CMD_WRITE_END 0x62
+#define IPMI_KCS_CMD_READ 0x68
+
+#define IPMI_KCS_ABORTED_BY_CMD 0x01
+
+#define IPMI_KCS_CMDREG_GET_STATE() ((kcs_get_cmdreg() >> 6) & 3)
+#define IPMI_KCS_STATE_IDLE 0
+#define IPMI_KCS_STATE_READ 1
+#define IPMI_KCS_STATE_WRITE 2
+#define IPMI_KCS_STATE_ERROR 3
+#define IPMI_KCS_CMDREG_GET_CD() ((kcs_get_cmdreg() >> 3) & 1)
+#define IPMI_KCS_CMDREG_GET_ATN() ((kcs_get_cmdreg() >> 2) & 1)
+#define IPMI_KCS_CMDREG_GET_IBF() ((kcs_get_cmdreg() >> 1) & 1)
+#define IPMI_KCS_CMDREG_GET_OBF() ((kcs_get_cmdreg() >> 0) & 1)
+
+static int kcs_ints_enabled;
+
+static uint8_t kcs_get_cmdreg(void)
+{
+ return inb(IPMI_KCS_BASE + 1);
+}
+
+static void kcs_write_cmdreg(uint8_t val)
+{
+ outb(IPMI_KCS_BASE + 1, val);
+}
+
+static uint8_t kcs_get_datareg(void)
+{
+ return inb(IPMI_KCS_BASE);
+}
+
+static void kcs_write_datareg(uint8_t val)
+{
+ outb(IPMI_KCS_BASE, val);
+}
+
+static void kcs_wait_ibf(void)
+{
+ unsigned int count = 1000;
+ while (IPMI_KCS_CMDREG_GET_IBF() != 0) {
+ g_assert(--count != 0);
+ }
+}
+
+static void kcs_wait_obf(void)
+{
+ unsigned int count = 1000;
+ while (IPMI_KCS_CMDREG_GET_OBF() == 0) {
+ g_assert(--count != 0);
+ }
+}
+
+static void kcs_clear_obf(void)
+{
+ if (kcs_ints_enabled) {
+ g_assert(get_irq(IPMI_IRQ));
+ } else {
+ g_assert(!get_irq(IPMI_IRQ));
+ }
+ g_assert(IPMI_KCS_CMDREG_GET_OBF() == 1);
+ kcs_get_datareg();
+ g_assert(IPMI_KCS_CMDREG_GET_OBF() == 0);
+ g_assert(!get_irq(IPMI_IRQ));
+}
+
+static void kcs_check_state(uint8_t state)
+{
+ g_assert(IPMI_KCS_CMDREG_GET_STATE() == state);
+}
+
+static void kcs_cmd(uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len)
+{
+ unsigned int i, j = 0;
+
+ /* Should be idle */
+ g_assert(kcs_get_cmdreg() == 0);
+
+ kcs_write_cmdreg(IPMI_KCS_CMD_WRITE_START);
+ kcs_wait_ibf();
+ kcs_check_state(IPMI_KCS_STATE_WRITE);
+ kcs_clear_obf();
+ for (i = 0; i < cmd_len; i++) {
+ kcs_write_datareg(cmd[i]);
+ kcs_wait_ibf();
+ kcs_check_state(IPMI_KCS_STATE_WRITE);
+ kcs_clear_obf();
+ }
+ kcs_write_cmdreg(IPMI_KCS_CMD_WRITE_END);
+ kcs_wait_ibf();
+ kcs_check_state(IPMI_KCS_STATE_WRITE);
+ kcs_clear_obf();
+ kcs_write_datareg(0);
+ next_read_byte:
+ kcs_wait_ibf();
+ switch (IPMI_KCS_CMDREG_GET_STATE()) {
+ case IPMI_KCS_STATE_READ:
+ kcs_wait_obf();
+ g_assert(j < *rsp_len);
+ rsp[j++] = kcs_get_datareg();
+ kcs_write_datareg(IPMI_KCS_CMD_READ);
+ goto next_read_byte;
+ break;
+
+ case IPMI_KCS_STATE_IDLE:
+ kcs_wait_obf();
+ kcs_get_datareg();
+ break;
+
+ default:
+ g_assert(0);
+ }
+ *rsp_len = j;
+}
+
+static void kcs_abort(uint8_t *cmd, unsigned int cmd_len,
+ uint8_t *rsp, unsigned int *rsp_len)
+{
+ unsigned int i, j = 0;
+ unsigned int retries = 4;
+
+ /* Should be idle */
+ g_assert(kcs_get_cmdreg() == 0);
+
+ kcs_write_cmdreg(IPMI_KCS_CMD_WRITE_START);
+ kcs_wait_ibf();
+ kcs_check_state(IPMI_KCS_STATE_WRITE);
+ kcs_clear_obf();
+ for (i = 0; i < cmd_len; i++) {
+ kcs_write_datareg(cmd[i]);
+ kcs_wait_ibf();
+ kcs_check_state(IPMI_KCS_STATE_WRITE);
+ kcs_clear_obf();
+ }
+ kcs_write_cmdreg(IPMI_KCS_CMD_WRITE_END);
+ kcs_wait_ibf();
+ kcs_check_state(IPMI_KCS_STATE_WRITE);
+ kcs_clear_obf();
+ kcs_write_datareg(0);
+ kcs_wait_ibf();
+ switch (IPMI_KCS_CMDREG_GET_STATE()) {
+ case IPMI_KCS_STATE_READ:
+ kcs_wait_obf();
+ g_assert(j < *rsp_len);
+ rsp[j++] = kcs_get_datareg();
+ kcs_write_datareg(IPMI_KCS_CMD_READ);
+ break;
+
+ default:
+ g_assert(0);
+ }
+
+ /* Start the abort here */
+ retry_abort:
+ g_assert(retries > 0);
+
+ kcs_wait_ibf();
+ kcs_write_cmdreg(IPMI_KCS_STATUS_ABORT);
+ kcs_wait_ibf();
+ kcs_clear_obf();
+ kcs_write_datareg(0);
+ kcs_wait_ibf();
+ if (IPMI_KCS_CMDREG_GET_STATE() != IPMI_KCS_STATE_READ) {
+ retries--;
+ goto retry_abort;
+ }
+ kcs_wait_obf();
+ rsp[0] = kcs_get_datareg();
+ kcs_write_datareg(IPMI_KCS_CMD_READ);
+ kcs_wait_ibf();
+ if (IPMI_KCS_CMDREG_GET_STATE() != IPMI_KCS_STATE_IDLE) {
+ retries--;
+ goto retry_abort;
+ }
+ kcs_wait_obf();
+ kcs_clear_obf();
+
+ *rsp_len = j;
+}
+
+
+static uint8_t get_dev_id_cmd[] = { 0x18, 0x01 };
+static uint8_t get_dev_id_rsp[] = { 0x1c, 0x01, 0x00, 0x20, 0x00, 0x00, 0x00,
+ 0x02, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00 };
+
+/*
+ * Send a get_device_id to do a basic test.
+ */
+static void test_kcs_base(void)
+{
+ uint8_t rsp[20];
+ unsigned int rsplen = sizeof(rsp);
+
+ kcs_cmd(get_dev_id_cmd, sizeof(get_dev_id_cmd), rsp, &rsplen);
+ g_assert(rsplen == sizeof(get_dev_id_rsp));
+ g_assert(memcmp(get_dev_id_rsp, rsp, rsplen) == 0);
+}
+
+/*
+ * Abort a kcs operation while reading
+ */
+static void test_kcs_abort(void)
+{
+ uint8_t rsp[20];
+ unsigned int rsplen = sizeof(rsp);
+
+ kcs_abort(get_dev_id_cmd, sizeof(get_dev_id_cmd), rsp, &rsplen);
+ g_assert(rsp[0] == IPMI_KCS_ABORTED_BY_CMD);
+}
+
+static uint8_t set_bmc_globals_cmd[] = { 0x18, 0x2e, 0x0f };
+static uint8_t set_bmc_globals_rsp[] = { 0x1c, 0x2e, 0x00 };
+
+/*
+ * Enable interrupts
+ */
+static void test_enable_irq(void)
+{
+ uint8_t rsp[20];
+ unsigned int rsplen = sizeof(rsp);
+
+ kcs_cmd(set_bmc_globals_cmd, sizeof(set_bmc_globals_cmd), rsp, &rsplen);
+ g_assert(rsplen == sizeof(set_bmc_globals_rsp));
+ g_assert(memcmp(set_bmc_globals_rsp, rsp, rsplen) == 0);
+ kcs_ints_enabled = 1;
+}
+
+int main(int argc, char **argv)
+{
+ const char *arch = qtest_get_arch();
+ char *cmdline;
+ int ret;
+
+ /* Check architecture */
+ if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
+ g_test_message("Skipping test for non-x86\n");
+ return 0;
+ }
+
+ /* Run the tests */
+ g_test_init(&argc, &argv, NULL);
+
+ cmdline = g_strdup_printf("-vnc none -device isa-ipmi");
+ qtest_start(cmdline);
+ qtest_irq_intercept_in(global_qtest, "ioapic");
+ qtest_add_func("/ipmi/local/kcs_base", test_kcs_base);
+ qtest_add_func("/ipmi/local/kcs_abort", test_kcs_abort);
+ qtest_add_func("/ipmi/local/kcs_enable_irq", test_enable_irq);
+ qtest_add_func("/ipmi/local/kcs_base_irq", test_kcs_base);
+ qtest_add_func("/ipmi/local/kcs_abort_irq", test_kcs_abort);
+ ret = g_test_run();
+ qtest_quit(global_qtest);
+
+ return ret;
+}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 08/16] ipmi: Add documentation
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (6 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 07/16] ipmi: Add tests minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 09/16] ipmi: Add migration capability to the IPMI device minyard
` (8 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Add some basic documentation for the IPMI device.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
qemu-options.hx | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/qemu-options.hx b/qemu-options.hx
index 10b9568..84c3a5d 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -350,6 +350,41 @@ Add device @var{driver}. @var{prop}=@var{value} sets driver
properties. Valid properties depend on the driver. To get help on
possible drivers and properties, use @code{-device help} and
@code{-device @var{driver},help}.
+
+Some drivers are:
+@item -device isa-ipmi[,interface=kcs|bt][,iobase=@var{val}][,irq=@var{val}][,slave_addr=@var{val}][,chardev=name]
+
+Add an IPMI device. This also adds a corresponding SMBIOS entry to the
+SMBIOS tables for x86. The following options are handled:
+@table @option
+@item interface=kcs|bt
+Define the interface type to use. Currently the IPMI-defined KCS and
+BT interfaces are handled. The default is KCS.
+@item iobase=@var{val}
+Define the I/O address of the interface. The default is 0xca0 for KCS
+and 0xe4 for BT.
+@item irq=@var{val}
+Define the interrupt to use. The default is 5. To disable interrupts,
+set this to 0.
+@item slave_addr=@var{val}
+The IPMI slave address to use for the BMC. The default is 0x20.
+@item chardev=name
+If a chardev is not specified, the IPMI driver uses a built-in baseboard
+management controller (BMC) simulator. It provides a basic BMC with a
+watchdog timer and associated sensor.
+
+If a chardev is specified, A connection is made to an external BMC
+simulator. If you do this, it is strongly recommended that you use
+the "reconnect=" chardev option to reconnect to the simulator if the
+connection is lost. Note that if this is not used carefully, it can
+be a security issue, as the interface has the ability to send resets,
+NMIs, and power off the VM. It's best if QEMU makes a connection to
+an external simulator running on a secure port on localhost, so
+neither the simulator nor QEMU is exposed to any outside network.
+
+See the "lanserv/README.vm" file in the OpenIPMI library for more
+details on the external interface.
+@end table
ETEXI
DEF("name", HAS_ARG, QEMU_OPTION_name,
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 09/16] ipmi: Add migration capability to the IPMI device.
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (7 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 08/16] ipmi: Add documentation minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 10/16] pc: Postpone adding ACPI and SMBIOS to fw_cfg minyard
` (7 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Corey Minyard <cminyard@mvista.com
---
hw/ipmi/ipmi.c | 17 +++++++++++++++++
hw/ipmi/ipmi.h | 2 ++
hw/ipmi/ipmi_bt.c | 14 ++++++++++++++
hw/ipmi/ipmi_extern.c | 42 ++++++++++++++++++++++++++++++++++++++----
hw/ipmi/ipmi_kcs.c | 15 +++++++++++++++
hw/ipmi/ipmi_sim.c | 30 ++++++++++++++++++++++++++++++
hw/ipmi/isa_ipmi.c | 12 ++++++++++++
7 files changed, 128 insertions(+), 4 deletions(-)
diff --git a/hw/ipmi/ipmi.c b/hw/ipmi/ipmi.c
index b046517..f3e5e9e 100644
--- a/hw/ipmi/ipmi.c
+++ b/hw/ipmi/ipmi.c
@@ -118,6 +118,23 @@ void ipmi_bmc_init(IPMIBmc *s, Error **errp)
}
}
+const VMStateDescription vmstate_IPMIInterface = {
+ .name = TYPE_IPMI_INTERFACE,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_BOOL(obf_irq_set, IPMIInterface),
+ VMSTATE_BOOL(atn_irq_set, IPMIInterface),
+ VMSTATE_BOOL(use_irq, IPMIInterface),
+ VMSTATE_BOOL(irqs_enabled, IPMIInterface),
+ VMSTATE_UINT32(outpos, IPMIInterface),
+ VMSTATE_UINT32(outlen, IPMIInterface),
+ VMSTATE_VBUFFER_UINT32(inmsg, IPMIInterface, 1, NULL, 0, inlen),
+ VMSTATE_BOOL(write_end, IPMIInterface),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static TypeInfo ipmi_bmc_type_info = {
.name = TYPE_IPMI_BMC,
.parent = TYPE_OBJECT,
diff --git a/hw/ipmi/ipmi.h b/hw/ipmi/ipmi.h
index 6b2a3e9..56cb423 100644
--- a/hw/ipmi/ipmi.h
+++ b/hw/ipmi/ipmi.h
@@ -153,6 +153,8 @@ typedef struct IPMIInterfaceClass {
unsigned char *rsp, unsigned int rsp_len);
} IPMIInterfaceClass;
+extern const VMStateDescription vmstate_IPMIInterface;
+
void ipmi_interface_init(IPMIInterface *s, Error **errp);
void ipmi_interface_reset(IPMIInterface *s);
diff --git a/hw/ipmi/ipmi_bt.c b/hw/ipmi/ipmi_bt.c
index 95beb71..105b978 100644
--- a/hw/ipmi/ipmi_bt.c
+++ b/hw/ipmi/ipmi_bt.c
@@ -335,6 +335,19 @@ static void ipmi_bt_handle_reset(IPMIInterface *s, bool is_cold)
}
}
+static const VMStateDescription vmstate_ipmi_bt = {
+ .name = TYPE_IPMI_INTERFACE_BT,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT8(control_reg, IPMIBtInterface),
+ VMSTATE_UINT8(mask_reg, IPMIBtInterface),
+ VMSTATE_UINT8(waiting_rsp, IPMIBtInterface),
+ VMSTATE_UINT8(waiting_seq, IPMIBtInterface),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static void ipmi_bt_init(IPMIInterface *s, Error **errp)
{
IPMIBtInterface *bt = IPMI_INTERFACE_BT(s);
@@ -345,6 +358,7 @@ static void ipmi_bt_init(IPMIInterface *s, Error **errp)
s->io_length = 3;
memory_region_init_io(&s->io, NULL, &ipmi_bt_io_ops, bt, "ipmi-bt", 3);
+ vmstate_register(NULL, 0, &vmstate_ipmi_bt, bt);
}
static void ipmi_bt_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ipmi/ipmi_extern.c b/hw/ipmi/ipmi_extern.c
index b59ff8a..aace0b3 100644
--- a/hw/ipmi/ipmi_extern.c
+++ b/hw/ipmi/ipmi_extern.c
@@ -63,10 +63,10 @@ typedef struct IPMIExternBmc {
unsigned char inbuf[MAX_IPMI_MSG_SIZE + 2];
unsigned int inpos;
- int in_escape;
- int in_too_many;
- int waiting_rsp;
- int sending_cmd;
+ bool in_escape;
+ bool in_too_many;
+ bool waiting_rsp;
+ bool sending_cmd;
unsigned char outbuf[(MAX_IPMI_MSG_SIZE + 2) * 2 + 1];
unsigned int outpos;
@@ -425,12 +425,46 @@ static void ipmi_extern_handle_reset(IPMIBmc *b)
continue_send(es);
}
+static int ipmi_extern_post_migrate(void *opaque, int version_id)
+{
+ IPMIExternBmc *es = opaque;
+
+ /*
+ * We don't directly restore waiting_rsp, Instead, we return an
+ * error on the interface if a response was being waited for.
+ */
+ if (es->waiting_rsp) {
+ IPMIInterface *s = es->parent.intf;
+ IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
+
+ es->waiting_rsp = 0;
+ es->inbuf[1] = es->outbuf[1] | 0x04;
+ es->inbuf[2] = es->outbuf[2];
+ es->inbuf[3] = IPMI_CC_BMC_INIT_IN_PROGRESS;
+ k->handle_rsp(s, es->outbuf[0], es->inbuf + 1, 3);
+ }
+ return 0;
+}
+
+static const VMStateDescription vmstate_ipmi_extern = {
+ .name = TYPE_IPMI_BMC_EXTERN,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .post_load = ipmi_extern_post_migrate,
+ .fields = (VMStateField[]) {
+ VMSTATE_BOOL(send_reset, IPMIExternBmc),
+ VMSTATE_BOOL(waiting_rsp, IPMIExternBmc),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static void ipmi_extern_init(IPMIBmc *b, Error **errp)
{
IPMIExternBmc *es = IPMI_BMC_EXTERN(b);
es->extern_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, extern_timeout, es);
qemu_chr_add_handlers(es->parent.chr, can_receive, receive, chr_event, es);
+ vmstate_register(NULL, 0, &vmstate_ipmi_extern, es);
}
static void ipmi_extern_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ipmi/ipmi_kcs.c b/hw/ipmi/ipmi_kcs.c
index 411799e..e3af39e 100644
--- a/hw/ipmi/ipmi_kcs.c
+++ b/hw/ipmi/ipmi_kcs.c
@@ -299,6 +299,20 @@ static void ipmi_kcs_set_atn(IPMIInterface *s, int val, int irq)
}
}
+static const VMStateDescription vmstate_ipmi_kcs = {
+ .name = TYPE_IPMI_INTERFACE_KCS,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT8(status_reg, IPMIKcsInterface),
+ VMSTATE_UINT8(data_out_reg, IPMIKcsInterface),
+ VMSTATE_INT16(data_in_reg, IPMIKcsInterface),
+ VMSTATE_INT16(cmd_reg, IPMIKcsInterface),
+ VMSTATE_UINT8(waiting_rsp, IPMIKcsInterface),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static void ipmi_kcs_init(IPMIInterface *s, Error **errp)
{
IPMIKcsInterface *kcs = IPMI_INTERFACE_KCS(s);
@@ -309,6 +323,7 @@ static void ipmi_kcs_init(IPMIInterface *s, Error **errp)
s->io_length = 2;
memory_region_init_io(&s->io, NULL, &ipmi_kcs_io_ops, kcs, "ipmi-kcs", 2);
+ vmstate_register(NULL, 0, &vmstate_ipmi_kcs, kcs);
}
static void ipmi_kcs_class_init(ObjectClass *class, void *data)
diff --git a/hw/ipmi/ipmi_sim.c b/hw/ipmi/ipmi_sim.c
index 8028f40..7480d00 100644
--- a/hw/ipmi/ipmi_sim.c
+++ b/hw/ipmi/ipmi_sim.c
@@ -1657,6 +1657,34 @@ static const uint8_t init_sdrs[] = {
0xff, 0xff, 0x00, 0x00, 0x00
};
+static const VMStateDescription vmstate_ipmi_sim = {
+ .name = TYPE_IPMI_BMC_SIMULATOR,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT8(bmc_global_enables, IPMISimBmc),
+ VMSTATE_UINT8(msg_flags, IPMISimBmc),
+ VMSTATE_BOOL(watchdog_initialized, IPMISimBmc),
+ VMSTATE_UINT8(watchdog_use, IPMISimBmc),
+ VMSTATE_UINT8(watchdog_action, IPMISimBmc),
+ VMSTATE_UINT8(watchdog_pretimeout, IPMISimBmc),
+ VMSTATE_BOOL(watchdog_expired, IPMISimBmc),
+ VMSTATE_UINT16(watchdog_timeout, IPMISimBmc),
+ VMSTATE_BOOL(watchdog_running, IPMISimBmc),
+ VMSTATE_BOOL(watchdog_preaction_ran, IPMISimBmc),
+ VMSTATE_INT64(watchdog_expiry, IPMISimBmc),
+ VMSTATE_UINT8_ARRAY(evtbuf, IPMISimBmc, 16),
+ VMSTATE_UINT8(sensors[IPMI_WATCHDOG_SENSOR].status, IPMISimBmc),
+ VMSTATE_UINT8(sensors[IPMI_WATCHDOG_SENSOR].reading, IPMISimBmc),
+ VMSTATE_UINT16(sensors[IPMI_WATCHDOG_SENSOR].states, IPMISimBmc),
+ VMSTATE_UINT16(sensors[IPMI_WATCHDOG_SENSOR].assert_states, IPMISimBmc),
+ VMSTATE_UINT16(sensors[IPMI_WATCHDOG_SENSOR].deassert_states,
+ IPMISimBmc),
+ VMSTATE_UINT16(sensors[IPMI_WATCHDOG_SENSOR].assert_enable, IPMISimBmc),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static void ipmi_sim_init(IPMIBmc *b, Error **errp)
{
unsigned int i;
@@ -1703,6 +1731,8 @@ static void ipmi_sim_init(IPMIBmc *b, Error **errp)
register_cmds(ss);
ss->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ipmi_timeout, ss);
+
+ vmstate_register(NULL, 0, &vmstate_ipmi_sim, ss);
}
static void ipmi_sim_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi.c
index 1c1ab8d..e62f744 100644
--- a/hw/ipmi/isa_ipmi.c
+++ b/hw/ipmi/isa_ipmi.c
@@ -121,11 +121,23 @@ static Property ipmi_isa_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
+static const VMStateDescription vmstate_isa_ipmi = {
+ .name = TYPE_ISA_IPMI,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_STRUCT_POINTER(intf, ISAIPMIDevice, vmstate_IPMIInterface,
+ IPMIInterface),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static void ipmi_isa_class_initfn(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = ipmi_isa_realizefn;
dc->reset = ipmi_isa_reset;
+ dc->vmsd = &vmstate_isa_ipmi;
dc->props = ipmi_isa_properties;
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 10/16] pc: Postpone adding ACPI and SMBIOS to fw_cfg
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (8 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 09/16] ipmi: Add migration capability to the IPMI device minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 11/16] smbios: Add a function to directly add an entry minyard
` (6 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard, Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Postpone the addition of the ACPI and SMBIOS tables until after
device initialization. This allows devices to add entries to these
tables.
Signed-off-by: Corey Minyard <cminyard@mvsita.com>
---
hw/i386/pc.c | 58 ++++++++++++++++++++++++++++++++++++++++------------------
1 file changed, 40 insertions(+), 18 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f31d55e..831d421 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -639,11 +639,45 @@ static unsigned int pc_apic_id_limit(unsigned int max_cpus)
return x86_cpu_apic_id_from_index(max_cpus - 1) + 1;
}
-static FWCfgState *bochs_bios_init(void)
+struct pc_bios_post_init {
+ Notifier post_init;
+ void *fw_cfg;
+};
+static struct pc_bios_post_init post_init;
+
+/* Add the ACPI and SMBIOS tables after all the hardware has been initialized.
+ * This gives devices a chance to add to those tables.
+ */
+static void pc_bios_post_initfn(Notifier *n, void *opaque)
{
- FWCfgState *fw_cfg;
+ struct pc_bios_post_init *p = container_of(n, struct pc_bios_post_init,
+ post_init);
uint8_t *smbios_tables, *smbios_anchor;
size_t smbios_tables_len, smbios_anchor_len;
+ FWCfgState *fw_cfg = p->fw_cfg;
+
+ smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
+ if (smbios_tables) {
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
+ smbios_tables, smbios_tables_len);
+ }
+
+ smbios_get_tables(&smbios_tables, &smbios_tables_len,
+ &smbios_anchor, &smbios_anchor_len);
+ if (smbios_anchor) {
+ fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
+ smbios_tables, smbios_tables_len);
+ fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
+ smbios_anchor, smbios_anchor_len);
+ }
+
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
+ acpi_tables, acpi_tables_len);
+}
+
+static FWCfgState *bochs_bios_init(void)
+{
+ FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
int i, j;
unsigned int apic_id_limit = pc_apic_id_limit(max_cpus);
@@ -666,24 +700,8 @@ static FWCfgState *bochs_bios_init(void)
fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)apic_id_limit);
fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
- fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
- acpi_tables, acpi_tables_len);
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
- smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
- if (smbios_tables) {
- fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
- smbios_tables, smbios_tables_len);
- }
-
- smbios_get_tables(&smbios_tables, &smbios_tables_len,
- &smbios_anchor, &smbios_anchor_len);
- if (smbios_anchor) {
- fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
- smbios_tables, smbios_tables_len);
- fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
- smbios_anchor, smbios_anchor_len);
- }
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
&e820_reserve, sizeof(e820_reserve));
@@ -714,6 +732,10 @@ static FWCfgState *bochs_bios_init(void)
(1 + apic_id_limit + nb_numa_nodes) *
sizeof(*numa_fw_cfg));
+ post_init.fw_cfg = fw_cfg;
+ post_init.post_init.notify = pc_bios_post_initfn;
+ qemu_add_machine_init_done_notifier(&post_init.post_init);
+
return fw_cfg;
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 11/16] smbios: Add a function to directly add an entry
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (9 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 10/16] pc: Postpone adding ACPI and SMBIOS to fw_cfg minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 12/16] ipmi: Add SMBIOS table entry minyard
` (5 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
There was no way to directly add a table entry to the SMBIOS table,
even though the BIOS supports this. So add a function to do this.
This is in preparation for the IPMI handler adding it's SMBIOS table
entry.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
hw/i386/smbios.c | 149 ++++++++++++++++++++++++++++++-----------------
include/hw/i386/smbios.h | 13 +++++
2 files changed, 110 insertions(+), 52 deletions(-)
diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c
index 024e594..1081d3c 100644
--- a/hw/i386/smbios.c
+++ b/hw/i386/smbios.c
@@ -825,6 +825,25 @@ static void smbios_entry_point_setup(void)
ep.structure_table_address = cpu_to_le32(0);
}
+struct smbios_device_handler {
+ void (*handle_device_table)(void *opaque);
+ void *opaque;
+ struct smbios_device_handler *prev;
+};
+static struct smbios_device_handler *device_handlers;
+
+void smbios_register_device_table_handler(void (*handle_device_table)
+ (void *opaque),
+ void *opaque)
+{
+ struct smbios_device_handler *handler = g_malloc(sizeof(*handler));
+
+ handler->handle_device_table = handle_device_table;
+ handler->opaque = opaque;
+ handler->prev = device_handlers;
+ device_handlers = handler;
+}
+
void smbios_get_tables(uint8_t **tables, size_t *tables_len,
uint8_t **anchor, size_t *anchor_len)
{
@@ -868,6 +887,14 @@ void smbios_get_tables(uint8_t **tables, size_t *tables_len,
}
smbios_build_type_32_table();
+
+ while (device_handlers) {
+ struct smbios_device_handler *handler = device_handlers;
+ device_handlers = handler->prev;
+ handler->handle_device_table(handler->opaque);
+ g_free(handler);
+ }
+
smbios_build_type_127_table();
smbios_validate_table();
@@ -891,6 +918,71 @@ static void save_opt(const char **dest, QemuOpts *opts, const char *name)
}
}
+int smbios_table_entry_add(void *data, int size, bool append_zeros)
+{
+ struct smbios_structure_header *header;
+ struct smbios_table *table; /* legacy mode only */
+
+ /*
+ * NOTE: standard double '\0' terminator expected, per smbios spec.
+ * (except in legacy mode, where the second '\0' is implicit and
+ * will be inserted by the BIOS).
+ */
+ if (append_zeros) {
+ size += 2;
+ }
+ smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size);
+ header = (struct smbios_structure_header *)(smbios_tables +
+ smbios_tables_len);
+
+ memcpy(header, data, size);
+
+ if (test_bit(header->type, have_fields_bitmap)) {
+ error_report("can't load type %d struct, fields already specified!",
+ header->type);
+ exit(1);
+ }
+ set_bit(header->type, have_binfile_bitmap);
+
+ if (header->type == 4) {
+ smbios_type4_count++;
+ }
+
+ smbios_tables_len += size;
+ if (size > smbios_table_max) {
+ smbios_table_max = size;
+ }
+ smbios_table_cnt++;
+
+ /* add a copy of the newly loaded blob to legacy smbios_entries */
+ /* NOTE: This code runs before smbios_set_defaults(), so we don't
+ * yet know which mode (legacy vs. aggregate-table) will be
+ * required. We therefore add the binary blob to both legacy
+ * (smbios_entries) and aggregate (smbios_tables) tables, and
+ * delete the one we don't need from smbios_set_defaults(),
+ * once we know which machine version has been requested.
+ */
+ if (!smbios_entries) {
+ smbios_entries_len = sizeof(uint16_t);
+ smbios_entries = g_malloc0(smbios_entries_len);
+ }
+ if (append_zeros) {
+ size -= 1; /* The BIOS adds the second zero in legacy mode. */
+ }
+ smbios_entries = g_realloc(smbios_entries, smbios_entries_len +
+ size + sizeof(*table));
+ table = (struct smbios_table *)(smbios_entries + smbios_entries_len);
+ table->header.type = SMBIOS_TABLE_ENTRY;
+ table->header.length = cpu_to_le16(sizeof(*table) + size);
+ memcpy(table->data, header, size);
+ smbios_entries_len += sizeof(*table) + size;
+ (*(uint16_t *)smbios_entries) =
+ cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1);
+ /* end: add a copy of the newly loaded blob to legacy smbios_entries */
+
+ return 0;
+}
+
void smbios_entry_add(QemuOpts *opts)
{
Error *local_err = NULL;
@@ -900,9 +992,8 @@ void smbios_entry_add(QemuOpts *opts)
val = qemu_opt_get(opts, "file");
if (val) {
- struct smbios_structure_header *header;
int size;
- struct smbios_table *table; /* legacy mode only */
+ uint8_t *data;
qemu_opts_validate(opts, qemu_smbios_file_opts, &local_err);
if (local_err) {
@@ -916,60 +1007,14 @@ void smbios_entry_add(QemuOpts *opts)
exit(1);
}
- /*
- * NOTE: standard double '\0' terminator expected, per smbios spec.
- * (except in legacy mode, where the second '\0' is implicit and
- * will be inserted by the BIOS).
- */
- smbios_tables = g_realloc(smbios_tables, smbios_tables_len + size);
- header = (struct smbios_structure_header *)(smbios_tables +
- smbios_tables_len);
-
- if (load_image(val, (uint8_t *)header) != size) {
+ data = g_malloc(size);
+ if (load_image(val, data) != size) {
error_report("Failed to load SMBIOS file %s", val);
exit(1);
}
- if (test_bit(header->type, have_fields_bitmap)) {
- error_report("can't load type %d struct, fields already specified!",
- header->type);
- exit(1);
- }
- set_bit(header->type, have_binfile_bitmap);
-
- if (header->type == 4) {
- smbios_type4_count++;
- }
-
- smbios_tables_len += size;
- if (size > smbios_table_max) {
- smbios_table_max = size;
- }
- smbios_table_cnt++;
-
- /* add a copy of the newly loaded blob to legacy smbios_entries */
- /* NOTE: This code runs before smbios_set_defaults(), so we don't
- * yet know which mode (legacy vs. aggregate-table) will be
- * required. We therefore add the binary blob to both legacy
- * (smbios_entries) and aggregate (smbios_tables) tables, and
- * delete the one we don't need from smbios_set_defaults(),
- * once we know which machine version has been requested.
- */
- if (!smbios_entries) {
- smbios_entries_len = sizeof(uint16_t);
- smbios_entries = g_malloc0(smbios_entries_len);
- }
- smbios_entries = g_realloc(smbios_entries, smbios_entries_len +
- size + sizeof(*table));
- table = (struct smbios_table *)(smbios_entries + smbios_entries_len);
- table->header.type = SMBIOS_TABLE_ENTRY;
- table->header.length = cpu_to_le16(sizeof(*table) + size);
- memcpy(table->data, header, size);
- smbios_entries_len += sizeof(*table) + size;
- (*(uint16_t *)smbios_entries) =
- cpu_to_le16(le16_to_cpu(*(uint16_t *)smbios_entries) + 1);
- /* end: add a copy of the newly loaded blob to legacy smbios_entries */
-
+ smbios_table_entry_add(data, size, false);
+ g_free(data);
return;
}
diff --git a/include/hw/i386/smbios.h b/include/hw/i386/smbios.h
index d2850be..656327d 100644
--- a/include/hw/i386/smbios.h
+++ b/include/hw/i386/smbios.h
@@ -27,6 +27,19 @@ void smbios_get_tables(uint8_t **tables, size_t *tables_len,
uint8_t **anchor, size_t *anchor_len);
/*
+ * Add an external entry to the SMBIOS table. Can only be called
+ * from a registered device table handler.
+ */
+int smbios_table_entry_add(void *data, int size, bool append_zeros);
+
+/*
+ * When constructing SMBIOS tables, call a function at the end of the
+ * add process to allow devices to add their own SMBIOS table entries.
+ */
+void smbios_register_device_table_handler(void (*handle_device_table)
+ (void *opaque),
+ void *opaque);
+/*
* SMBIOS spec defined tables
*/
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 12/16] ipmi: Add SMBIOS table entry
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (10 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 11/16] smbios: Add a function to directly add an entry minyard
@ 2014-12-12 19:15 ` minyard
2015-02-19 2:53 ` Benjamin Herrenschmidt
2014-12-12 19:15 ` [Qemu-devel] [PATCH 13/16] acpi: Add a way to extend tables minyard
` (4 subsequent siblings)
16 siblings, 1 reply; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Add an IPMI table entry to the SMBIOS.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
hw/ipmi/isa_ipmi.c | 43 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi.c
index e62f744..83ea706 100644
--- a/hw/ipmi/isa_ipmi.c
+++ b/hw/ipmi/isa_ipmi.c
@@ -27,6 +27,7 @@
#include "qemu/timer.h"
#include "sysemu/char.h"
#include "sysemu/sysemu.h"
+#include "hw/i386/smbios.h"
#include "ipmi.h"
/* This is the type the user specifies on the -device command line */
@@ -36,13 +37,50 @@
typedef struct ISAIPMIDevice {
ISADevice dev;
char *interface;
+ int intftype;
uint32_t iobase;
int32 isairq;
uint8_t slave_addr;
+ uint8_t version;
CharDriverState *chr;
IPMIInterface *intf;
} ISAIPMIDevice;
+/* SMBIOS type 38 - IPMI */
+struct smbios_type_38 {
+ struct smbios_structure_header header;
+ uint8_t interface_type;
+ uint8_t ipmi_spec_revision;
+ uint8_t i2c_slave_address;
+ uint8_t nv_storage_device_address;
+ uint64_t base_address;
+ uint8_t base_address_modifier;
+ uint8_t interrupt_number;
+} QEMU_PACKED;
+
+static void ipmi_encode_smbios(void *opaque)
+{
+ ISAIPMIDevice *info = opaque;
+ struct smbios_type_38 smb38;
+
+ smb38.header.type = 38;
+ smb38.header.length = sizeof(smb38);
+ smb38.header.handle = cpu_to_le16(0x3000);
+ smb38.interface_type = info->intftype;
+ smb38.ipmi_spec_revision = info->version;
+ smb38.i2c_slave_address = info->slave_addr;
+ smb38.nv_storage_device_address = 0;
+
+ /* or 1 to set it to I/O space */
+ smb38.base_address = cpu_to_le64(info->iobase | 1);
+
+ /* 1-byte boundaries, addr bit0=0, level triggered irq */
+ smb38.base_address_modifier = 1;
+ smb38.interrupt_number = info->isairq;
+ smbios_table_entry_add((struct smbios_structure_header *) &smb38,
+ sizeof(smb38), true);
+}
+
static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *isadev = ISA_DEVICE(dev);
@@ -50,6 +88,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
char typename[20];
Object *intfobj;
IPMIInterface *intf;
+ IPMIInterfaceClass *intfk;
Object *bmcobj;
IPMIBmc *bmc;
@@ -68,10 +107,13 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
TYPE_IPMI_INTERFACE_PREFIX "%s", ipmi->interface);
intfobj = object_new(typename);
intf = IPMI_INTERFACE(intfobj);
+ intfk = IPMI_INTERFACE_GET_CLASS(intf);
bmc->intf = intf;
intf->bmc = bmc;
intf->io_base = ipmi->iobase;
intf->slave_addr = ipmi->slave_addr;
+ ipmi->intftype = intfk->smbios_type;
+ ipmi->version = 0x20; /* Version 2.0 */
ipmi_interface_init(intf, errp);
if (*errp) {
return;
@@ -103,6 +145,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
qdev_set_legacy_instance_id(dev, intf->io_base, intf->io_length);
isa_register_ioport(isadev, &intf->io, intf->io_base);
+ smbios_register_device_table_handler(ipmi_encode_smbios, ipmi);
}
static void ipmi_isa_reset(DeviceState *qdev)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [Qemu-devel] [PATCH 12/16] ipmi: Add SMBIOS table entry
2014-12-12 19:15 ` [Qemu-devel] [PATCH 12/16] ipmi: Add SMBIOS table entry minyard
@ 2015-02-19 2:53 ` Benjamin Herrenschmidt
0 siblings, 0 replies; 24+ messages in thread
From: Benjamin Herrenschmidt @ 2015-02-19 2:53 UTC (permalink / raw)
To: minyard; +Cc: Corey Minyard, qemu-devel
On Fri, 2014-12-12 at 13:15 -0600, minyard@acm.org wrote:
> From: Corey Minyard <cminyard@mvista.com>
>
> Add an IPMI table entry to the SMBIOS.
Can this be made optional ? I'd like to use the BMC on an OpenPower
model I'm working on but that has no smbios..
Cheers,
Ben.
> Signed-off-by: Corey Minyard <cminyard@mvista.com>
> ---
> hw/ipmi/isa_ipmi.c | 43 +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
>
> diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi.c
> index e62f744..83ea706 100644
> --- a/hw/ipmi/isa_ipmi.c
> +++ b/hw/ipmi/isa_ipmi.c
> @@ -27,6 +27,7 @@
> #include "qemu/timer.h"
> #include "sysemu/char.h"
> #include "sysemu/sysemu.h"
> +#include "hw/i386/smbios.h"
> #include "ipmi.h"
>
> /* This is the type the user specifies on the -device command line */
> @@ -36,13 +37,50 @@
> typedef struct ISAIPMIDevice {
> ISADevice dev;
> char *interface;
> + int intftype;
> uint32_t iobase;
> int32 isairq;
> uint8_t slave_addr;
> + uint8_t version;
> CharDriverState *chr;
> IPMIInterface *intf;
> } ISAIPMIDevice;
>
> +/* SMBIOS type 38 - IPMI */
> +struct smbios_type_38 {
> + struct smbios_structure_header header;
> + uint8_t interface_type;
> + uint8_t ipmi_spec_revision;
> + uint8_t i2c_slave_address;
> + uint8_t nv_storage_device_address;
> + uint64_t base_address;
> + uint8_t base_address_modifier;
> + uint8_t interrupt_number;
> +} QEMU_PACKED;
> +
> +static void ipmi_encode_smbios(void *opaque)
> +{
> + ISAIPMIDevice *info = opaque;
> + struct smbios_type_38 smb38;
> +
> + smb38.header.type = 38;
> + smb38.header.length = sizeof(smb38);
> + smb38.header.handle = cpu_to_le16(0x3000);
> + smb38.interface_type = info->intftype;
> + smb38.ipmi_spec_revision = info->version;
> + smb38.i2c_slave_address = info->slave_addr;
> + smb38.nv_storage_device_address = 0;
> +
> + /* or 1 to set it to I/O space */
> + smb38.base_address = cpu_to_le64(info->iobase | 1);
> +
> + /* 1-byte boundaries, addr bit0=0, level triggered irq */
> + smb38.base_address_modifier = 1;
> + smb38.interrupt_number = info->isairq;
> + smbios_table_entry_add((struct smbios_structure_header *) &smb38,
> + sizeof(smb38), true);
> +}
> +
> static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
> {
> ISADevice *isadev = ISA_DEVICE(dev);
> @@ -50,6 +88,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
> char typename[20];
> Object *intfobj;
> IPMIInterface *intf;
> + IPMIInterfaceClass *intfk;
> Object *bmcobj;
> IPMIBmc *bmc;
>
> @@ -68,10 +107,13 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
> TYPE_IPMI_INTERFACE_PREFIX "%s", ipmi->interface);
> intfobj = object_new(typename);
> intf = IPMI_INTERFACE(intfobj);
> + intfk = IPMI_INTERFACE_GET_CLASS(intf);
> bmc->intf = intf;
> intf->bmc = bmc;
> intf->io_base = ipmi->iobase;
> intf->slave_addr = ipmi->slave_addr;
> + ipmi->intftype = intfk->smbios_type;
> + ipmi->version = 0x20; /* Version 2.0 */
> ipmi_interface_init(intf, errp);
> if (*errp) {
> return;
> @@ -103,6 +145,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
> qdev_set_legacy_instance_id(dev, intf->io_base, intf->io_length);
>
> isa_register_ioport(isadev, &intf->io, intf->io_base);
> + smbios_register_device_table_handler(ipmi_encode_smbios, ipmi);
> }
>
> static void ipmi_isa_reset(DeviceState *qdev)
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Qemu-devel] [PATCH 13/16] acpi: Add a way to extend tables
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (11 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 12/16] ipmi: Add SMBIOS table entry minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 14/16] acpi: Add table construction tools minyard
` (3 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Add a function that can extend the contents of a given
ACPI table to add on new entries. This way devices that
have ACPI entries can add them.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
hw/acpi/core.c | 106 +++++++++++++++++++++++++++++++++----------------
include/hw/acpi/acpi.h | 2 +
2 files changed, 74 insertions(+), 34 deletions(-)
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index 51913d6..a4cb485 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -78,33 +78,16 @@ static int acpi_checksum(const uint8_t *data, int len)
return (-sum) & 0xff;
}
-
-/* Install a copy of the ACPI table specified in @blob.
- *
- * If @has_header is set, @blob starts with the System Description Table Header
- * structure. Otherwise, "dfl_hdr" is prepended. In any case, each header field
- * is optionally overwritten from @hdrs.
- *
- * It is valid to call this function with
- * (@blob == NULL && bloblen == 0 && !has_header).
- *
- * @hdrs->file and @hdrs->data are ignored.
- *
- * SIZE_MAX is considered "infinity" in this function.
- *
- * The number of tables that can be installed is not limited, but the 16-bit
- * counter at the beginning of "acpi_tables" wraps around after UINT16_MAX.
- */
-static void acpi_table_install(const char unsigned *blob, size_t bloblen,
- bool has_header,
- const struct AcpiTableOptions *hdrs,
- Error **errp)
+static struct acpi_table_header *acpi_new_table(const unsigned char *blob,
+ size_t bloblen,
+ bool has_header,
+ size_t *rpayload_size,
+ Error **errp)
{
size_t body_start;
- const char unsigned *hdr_src;
+ const unsigned char *hdr_src;
size_t body_size, acpi_payload_size;
struct acpi_table_header *ext_hdr;
- unsigned changed_fields;
/* Calculate where the ACPI table body starts within the blob, plus where
* to copy the ACPI table header from.
@@ -124,7 +107,7 @@ static void acpi_table_install(const char unsigned *blob, size_t bloblen,
error_setg(errp, "ACPI table claiming to have header is too "
"short, available: %zu, expected: %zu", bloblen,
body_start);
- return;
+ return NULL;
}
hdr_src = blob;
} else {
@@ -145,7 +128,7 @@ static void acpi_table_install(const char unsigned *blob, size_t bloblen,
if (acpi_payload_size > UINT16_MAX) {
error_setg(errp, "ACPI table too big, requested: %zu, max: %u",
acpi_payload_size, (unsigned)UINT16_MAX);
- return;
+ return NULL;
}
/* We won't fail from here on. Initialize / extend the globals. */
@@ -173,29 +156,63 @@ static void acpi_table_install(const char unsigned *blob, size_t bloblen,
stw_le_p(acpi_tables, lduw_le_p(acpi_tables) + 1u);
/* Update the header fields. The strings need not be NUL-terminated. */
- changed_fields = 0;
ext_hdr->_length = cpu_to_le16(acpi_payload_size);
- if (hdrs->has_sig) {
- strncpy(ext_hdr->sig, hdrs->sig, sizeof ext_hdr->sig);
- ++changed_fields;
- }
-
if (has_header && le32_to_cpu(ext_hdr->length) != acpi_payload_size) {
fprintf(stderr,
"warning: ACPI table has wrong length, header says "
"%" PRIu32 ", actual size %zu bytes\n",
le32_to_cpu(ext_hdr->length), acpi_payload_size);
}
+
ext_hdr->length = cpu_to_le32(acpi_payload_size);
+ *rpayload_size = acpi_payload_size;
+
+ return ext_hdr;
+}
+
+/* Install a copy of the ACPI table specified in @blob.
+ *
+ * If @has_header is set, @blob starts with the System Description Table Header
+ * structure. Otherwise, "dfl_hdr" is prepended. In any case, each header field
+ * is optionally overwritten from @hdrs.
+ *
+ * It is valid to call this function with
+ * (@blob == NULL && bloblen == 0 && !has_header).
+ *
+ * @hdrs->file and @hdrs->data are ignored.
+ *
+ * SIZE_MAX is considered "infinity" in this function.
+ *
+ * The number of tables that can be installed is not limited, but the 16-bit
+ * counter at the beginning of "acpi_tables" wraps around after UINT16_MAX.
+ */
+static void acpi_table_install(const char unsigned *blob, size_t bloblen,
+ bool has_header,
+ const struct AcpiTableOptions *hdrs,
+ Error **errp)
+{
+ struct acpi_table_header *ext_hdr;
+ size_t payload_size = 0;
+ unsigned changed_fields = 0;
+
+ ext_hdr = acpi_new_table(blob, bloblen, has_header, &payload_size, errp);
+ if (errp && !*errp) {
+ return;
+ }
+
+ ext_hdr->checksum = 0;
+
+ if (hdrs->has_sig) {
+ strncpy(ext_hdr->sig, hdrs->sig, sizeof ext_hdr->sig);
+ ++changed_fields;
+ }
if (hdrs->has_rev) {
ext_hdr->revision = hdrs->rev;
++changed_fields;
}
- ext_hdr->checksum = 0;
-
if (hdrs->has_oem_id) {
strncpy(ext_hdr->oem_id, hdrs->oem_id, sizeof ext_hdr->oem_id);
++changed_fields;
@@ -225,7 +242,28 @@ static void acpi_table_install(const char unsigned *blob, size_t bloblen,
/* recalculate checksum */
ext_hdr->checksum = acpi_checksum((const char unsigned *)ext_hdr +
- ACPI_TABLE_PFX_SIZE, acpi_payload_size);
+ ACPI_TABLE_PFX_SIZE, payload_size);
+}
+
+/*
+ * Add a table from an internal driver.
+ */
+void acpi_append_to_table(const char *sig, void *blob, size_t bloblen,
+ Error **errp)
+{
+ struct acpi_table_header *ext_hdr;
+ size_t payload_size = 0;
+
+ ext_hdr = acpi_new_table(blob, bloblen, false, &payload_size, errp);
+ if (errp && *errp) {
+ return;
+ }
+
+ strncpy(ext_hdr->sig, sig, sizeof ext_hdr->sig);
+
+ /* recalculate checksum */
+ ext_hdr->checksum = acpi_checksum((const char unsigned *)ext_hdr +
+ ACPI_TABLE_PFX_SIZE, payload_size);
}
void acpi_table_add(const QemuOpts *opts, Error **errp)
diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h
index 1f678b4..acdd432 100644
--- a/include/hw/acpi/acpi.h
+++ b/include/hw/acpi/acpi.h
@@ -184,5 +184,7 @@ uint8_t *acpi_table_next(uint8_t *current);
unsigned acpi_table_len(void *current);
void acpi_table_add(const QemuOpts *opts, Error **errp);
void acpi_table_add_builtin(const QemuOpts *opts, Error **errp);
+void acpi_append_to_table(const char *sig, void *blob, size_t bloblen,
+ Error **errp);
#endif /* !QEMU_HW_ACPI_H */
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 14/16] acpi: Add table construction tools
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (12 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 13/16] acpi: Add a way to extend tables minyard
@ 2014-12-12 19:15 ` minyard
2014-12-12 19:15 ` [Qemu-devel] [PATCH 15/16] ipmi: Add ACPI table entries for BMCs minyard
` (2 subsequent siblings)
16 siblings, 0 replies; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Add a set of functions to allow construction of ACPI elements
dynamically.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
hw/acpi/Makefile.objs | 1 +
hw/acpi/acpi-elements.c | 470 ++++++++++++++++++++++++++++++++++++++++
include/hw/acpi/acpi-elements.h | 80 +++++++
3 files changed, 551 insertions(+)
create mode 100644 hw/acpi/acpi-elements.c
create mode 100644 include/hw/acpi/acpi-elements.h
diff --git a/hw/acpi/Makefile.objs b/hw/acpi/Makefile.objs
index acd2389..628deac 100644
--- a/hw/acpi/Makefile.objs
+++ b/hw/acpi/Makefile.objs
@@ -1,3 +1,4 @@
common-obj-$(CONFIG_ACPI) += core.o piix4.o ich9.o pcihp.o cpu_hotplug.o
common-obj-$(CONFIG_ACPI) += memory_hotplug.o
common-obj-$(CONFIG_ACPI) += acpi_interface.o
+common-obj-$(CONFIG_ACPI) += acpi-elements.o
diff --git a/hw/acpi/acpi-elements.c b/hw/acpi/acpi-elements.c
new file mode 100644
index 0000000..fcdcc05
--- /dev/null
+++ b/hw/acpi/acpi-elements.c
@@ -0,0 +1,470 @@
+/*
+ * Dynamically construct ACPI elements
+ *
+ * Copyright (C) 2012 Corey Minyard <cminyard@mvista.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License version 2 as published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>
+ *
+ * Contributions after 2012-01-13 are licensed under the terms of the
+ * GNU GPL, version 2 or (at your option) any later version.
+ */
+
+#include "hw/acpi/acpi-elements.h"
+#include <string.h>
+
+static int
+acpi_add_byte(char **data, uint8_t val)
+{
+ **data = val;
+ (*data)++;
+ return 1;
+}
+
+static int
+acpi_add_Pkglen(char **data, int dlen, int length)
+{
+ int pkglen;
+
+ /*
+ * The funny length values following are because we include the length
+ * bytes in the full length.
+ */
+ if (length <= 0x3e) {
+ if (dlen > 0) {
+ acpi_add_byte(data, length + 1);
+ }
+ return 1;
+ } else if (length <= 0xffd) {
+ pkglen = 2;
+ } else if (length <= 0xffffc) {
+ pkglen = 3;
+ } else if (length <= 0xffffffb) {
+ pkglen = 4;
+ } else {
+ return -1;
+ }
+ length += pkglen;
+ if (pkglen <= dlen) {
+ pkglen -= acpi_add_byte(data, ((pkglen - 1) << 6) | (length & 0xf));
+ length >>= 4;
+ while (pkglen > 0) {
+ pkglen -= acpi_add_byte(data, length & 0xff);
+ length >>= 8;
+ }
+ }
+ return pkglen;
+}
+
+static int
+acpi_add_NameSeg(char **data, int dlen, const char *name, int length)
+{
+ int i;
+
+ if (dlen >= 4) {
+ i = 0;
+ while ((i < 4) && (i < length)) {
+ i += acpi_add_byte(data, *name++);
+ }
+ while (i < 4) {
+ i += acpi_add_byte(data, '_');
+ }
+ }
+ return 4;
+}
+
+static int
+acpi_add_NameString(char **data, int dlen, const char *name)
+{
+ int totlen;
+ int segs = 1;
+ const char *s, *n;
+
+ /* Calculate the total number of segments. */
+ s = name;
+ while (*s) {
+ if (*s++ == '.') {
+ segs++;
+ }
+ }
+ totlen = segs * 4;
+
+ /* Now find a '\' or '^' prefix and add it. */
+ s = name;
+ if (*s == '\\') {
+ totlen += 1;
+ } else {
+ while (*s == '^') {
+ s++;
+ totlen++;
+ }
+ }
+
+ if (dlen >= totlen) {
+ s = name;
+ if (*s == '\\') {
+ dlen -= acpi_add_byte(data, *s++);
+ } else {
+ while (*s == '^') {
+ dlen -= acpi_add_byte(data, *s++);
+ }
+ }
+
+ if (segs == 1) {
+ acpi_add_NameSeg(data, dlen, s, strlen(s));
+ } else if (segs == 2) {
+ dlen -= acpi_add_byte(data, 0x2e);
+ n = strchr(s, '.');
+ dlen -= acpi_add_NameSeg(data, dlen, s, n - s);
+ s = n + 1;
+ dlen -= acpi_add_NameSeg(data, dlen, s, strlen(s));
+ } else {
+ dlen -= acpi_add_byte(data, 0x2f);
+ dlen -= acpi_add_byte(data, segs);
+ while (segs > 1) {
+ n = strchr(s, '.');
+ dlen -= acpi_add_NameSeg(data, dlen, s, n - s);
+ s = n + 1;
+ segs--;
+ }
+ dlen -= acpi_add_NameSeg(data, dlen, s, strlen(s));
+ }
+ }
+
+ return totlen;
+}
+
+int
+acpi_add_Device(char **data, int dlen, const char *name,
+ contained_acpi_elem e, void *opaque)
+{
+ int length, plen, totlen, nlen;
+
+ length = e(NULL, 0, opaque);
+ if (length < 0) {
+ return length;
+ }
+
+ plen = acpi_add_Pkglen(NULL, 0, length);
+ if (plen < 0) {
+ return plen;
+ }
+
+ nlen = acpi_add_NameString(data, 0, name);
+ if (nlen < 0) {
+ return nlen;
+ }
+
+ totlen = length + plen + nlen + 2;
+ if (dlen >= totlen) {
+ dlen -= acpi_add_byte(data, 0x5b);
+ dlen -= acpi_add_byte(data, 0x82);
+ dlen -= acpi_add_Pkglen(data, dlen, length);
+ dlen -= acpi_add_NameString(data, dlen, name);
+ dlen -= e(data, dlen, opaque);
+ }
+
+ return totlen;
+}
+
+int
+acpi_add_Name(char **data, int dlen, const char *name,
+ contained_acpi_elem e, void *opaque)
+{
+ int rv, nlen;
+
+ nlen = acpi_add_NameString(data, 0, name);
+ if (nlen < 0) {
+ return nlen;
+ }
+
+ if (dlen >= nlen + 1) {
+ dlen -= acpi_add_byte(data, 0x8);
+ dlen -= acpi_add_NameString(data, dlen, name);
+ }
+ rv = e(data, dlen, opaque);
+ if (rv < 0) {
+ return rv;
+ }
+ return rv + nlen + 1;
+}
+
+int
+acpi_add_Method(char **data, int dlen, const char *name, uint8_t flags,
+ contained_acpi_elem e, void *opaque)
+{
+ int elen, plen, nlen;
+
+ elen = e(NULL, 0, opaque);
+ if (elen < 0) {
+ return elen;
+ }
+
+ plen = acpi_add_Pkglen(NULL, 0, elen + 5);
+ if (plen < 0) {
+ return plen;
+ }
+
+ nlen = acpi_add_NameString(data, 0, name);
+ if (nlen < 0) {
+ return nlen;
+ }
+
+ if (plen + elen + nlen + 2 <= dlen) {
+ dlen -= acpi_add_byte(data, 0x14);
+ dlen -= acpi_add_Pkglen(data, dlen, elen + 5);
+ dlen -= acpi_add_NameString(data, dlen, name);
+ dlen -= acpi_add_byte(data, flags);
+ dlen -= e(data, dlen, opaque);
+ }
+ return plen + elen + nlen + 2;
+}
+
+int
+acpi_add_Integer(char **data, int dlen, void *vval)
+{
+ uint64_t val = *((uint64_t *) vval);
+ int length, i;
+ unsigned char op;
+
+ if ((val == 0) || (val == 1)) {
+ /* ZeroOp or OneOp */
+ if (dlen > 0) {
+ acpi_add_byte(data, val);
+ }
+ return 1;
+ }
+ if (val <= 0xff) {
+ length = 1;
+ op = 0x0a;
+ } else if (val <= 0xffff) {
+ length = 2;
+ op = 0x0b;
+ } else if (val <= 0xffffffff) {
+ length = 4;
+ op = 0x0c;
+ } else {
+ length = 8;
+ op = 0x0e;
+ }
+
+ if (dlen >= length + 1) {
+ acpi_add_byte(data, op);
+ for (i = 0; i < length; i++) {
+ acpi_add_byte(data, val & 0xff);
+ val >>= 8;
+ }
+ }
+ return length + 1;
+}
+
+/*
+ * A compressed EISA ID has the top bit reserved, the next 15 bits as
+ * compressed ASCII upper case letters, and the bottom 16 bits as four
+ * hex digits.
+ */
+int
+acpi_add_EISAID(char **data, int dlen, void *val)
+{
+ char *str = val;
+ uint32_t ival = 0;
+ int i;
+
+ if (dlen >= 5) {
+ if (strlen(val) != 7) {
+ return -1;
+ }
+ for (i = 0; i < 3; i++) {
+ if (str[i] < 'A' || str[i] > 'Z') {
+ return -1;
+ }
+ ival = (ival << 5) | (str[i] - 0x40);
+ }
+ for (; i < 7; i++) {
+ int v;
+ if (str[i] >= '0' && str[i] <= '9') {
+ v = str[i] - '0';
+ } else if (str[i] >= 'A' && str[i] <= 'F') {
+ v = str[i] - 'A' + 10;
+ } else {
+ return -1;
+ }
+ ival = (ival << 4) | v;
+ }
+ acpi_add_byte(data, 0xc); /* 32-bit integer */
+ /* Note that for some reason this is big endian */
+ for (i = 0; i < 4; i++) {
+ acpi_add_byte(data, (ival >> 24) & 0xff);
+ ival <<= 8;
+ }
+ }
+
+ return 5;
+}
+
+int
+acpi_add_BufferOp(char **data, int dlen,
+ contained_acpi_elem e, void *opaque)
+{
+ int blen, slen, plen, tlen;
+ uint64_t val;
+
+ blen = e(NULL, 0, opaque);
+ if (blen < 0) {
+ return blen;
+ }
+
+ val = blen;
+ slen = acpi_add_Integer(NULL, 0, &val);
+ if (slen < 0) {
+ return slen;
+ }
+ plen = acpi_add_Pkglen(NULL, 0, slen + blen);
+ if (plen < 0) {
+ return plen;
+ }
+ tlen = blen + slen + plen + 1;
+ if (tlen <= dlen) {
+ dlen -= acpi_add_byte(data, 0x11);
+ dlen -= acpi_add_Pkglen(data, dlen, slen + blen);
+ dlen -= acpi_add_Integer(data, dlen, &val);
+ dlen -= e(data, dlen, opaque);
+ }
+ return tlen;
+}
+
+int
+acpi_add_Return(char **data, int dlen, void *val)
+{
+ int blen;
+
+ blen = acpi_add_Integer(NULL, 0, val);
+ if (blen + 1 <= dlen) {
+ dlen -= acpi_add_byte(data, 0xa4);
+ dlen -= acpi_add_Integer(data, dlen, val);
+ }
+ return blen + 1;
+}
+
+/*
+ * Note that str is void*, not char*, so it can be passed as a
+ * contained element.
+ */
+static int
+unicode_helper(char **data, int dlen, void *vstr)
+{
+ char *str = vstr;
+ int len = strlen(str) + 1;
+
+ if (len * 2 <= dlen) {
+ while (*str) {
+ acpi_add_byte(data, *str++);
+ acpi_add_byte(data, 0);
+ }
+ acpi_add_byte(data, 0);
+ acpi_add_byte(data, 0);
+ }
+ return len * 2;
+}
+int
+acpi_add_Unicode(char **data, int dlen, void *vstr)
+{
+ int len;
+
+ len = acpi_add_BufferOp(NULL, 0, unicode_helper, vstr);
+ if (len < 0) {
+ return len;
+ }
+ if (len <= dlen) {
+ acpi_add_BufferOp(data, dlen, unicode_helper, vstr);
+ }
+ return len;
+}
+
+int
+acpi_add_IO16(char **data, int dlen,
+ uint16_t minaddr, uint16_t maxaddr,
+ uint8_t align, uint8_t range)
+{
+ if (dlen >= 8) {
+ acpi_add_byte(data, 0x47);
+ acpi_add_byte(data, 1);
+ acpi_add_byte(data, minaddr & 0xff);
+ acpi_add_byte(data, minaddr >> 8);
+ acpi_add_byte(data, maxaddr & 0xff);
+ acpi_add_byte(data, maxaddr >> 8);
+ acpi_add_byte(data, align);
+ acpi_add_byte(data, range);
+ }
+ return 8;
+}
+
+int
+acpi_add_Interrupt(char **data, int dlen, int irq,
+ int consumer, int mode, int polarity, int sharing)
+{
+ if (dlen >= 9) {
+ acpi_add_byte(data, 0x89);
+ acpi_add_byte(data, 6);
+ acpi_add_byte(data, 0);
+ acpi_add_byte(data, (consumer | (mode << 1) | (polarity << 2)
+ | (sharing << 3)));
+ acpi_add_byte(data, 1); /* Only 1 irq */
+ acpi_add_byte(data, irq);
+ acpi_add_byte(data, 0);
+ acpi_add_byte(data, 0);
+ acpi_add_byte(data, 0);
+ }
+ return 9;
+}
+
+int
+acpi_add_Scope(char **data, int dlen,
+ const char *name, contained_acpi_elem e, void *opaque)
+{
+ int length, plen, totlen, nlen;
+
+ length = e(NULL, 0, opaque);
+ if (length < 0) {
+ return length;
+ }
+
+ plen = acpi_add_Pkglen(NULL, 0, length);
+ if (plen < 0) {
+ return plen;
+ }
+
+ nlen = acpi_add_NameString(data, 0, name);
+ if (nlen < 0) {
+ return nlen;
+ }
+
+ totlen = length + plen + nlen + 1;
+ if (dlen >= totlen) {
+ dlen -= acpi_add_byte(data, 0x10);
+ dlen -= acpi_add_Pkglen(data, dlen, length);
+ dlen -= acpi_add_NameString(data, dlen, name);
+ dlen -= e(data, dlen, opaque);
+ }
+
+ return totlen;
+}
+
+int
+acpi_add_EndResource(char **data, int dlen)
+{
+ if (dlen >= 2) {
+ acpi_add_byte(data, 0x79);
+ acpi_add_byte(data, 0);
+ }
+ return 2;
+}
diff --git a/include/hw/acpi/acpi-elements.h b/include/hw/acpi/acpi-elements.h
new file mode 100644
index 0000000..4f54424
--- /dev/null
+++ b/include/hw/acpi/acpi-elements.h
@@ -0,0 +1,80 @@
+/*
+ * Dynamically construct ACPI elements
+ *
+ * Copyright (C) 2012 Corey Minyard <cminyard@mvista.com>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License version 2 as published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>
+ *
+ * Contributions after 2012-01-13 are licensed under the terms of the
+ * GNU GPL, version 2 or (at your option) any later version.
+ */
+
+#ifndef __ACPI_ELEMENTS_H
+#define __ACPI_ELEMENTS_H
+
+#include <stdint.h>
+
+typedef int (*contained_acpi_elem)(char **data, int length,
+ void *opaque);
+
+int acpi_add_Device(char **data, int dlen, const char *name,
+ contained_acpi_elem e, void *opaque);
+
+int acpi_add_Name(char **data, int dlen, const char *name,
+ contained_acpi_elem e, void *opaque);
+
+int acpi_add_Method(char **data, int dlen, const char *name, uint8_t flags,
+ contained_acpi_elem e, void *opaque);
+
+int acpi_add_Scope(char **data, int dlen,
+ const char *name, contained_acpi_elem e, void *opaque);
+
+/* Pass in a pointer to a u64 */
+int acpi_add_Integer(char **data, int dlen, void *val);
+
+/* Pass in a pointer to a string */
+int acpi_add_EISAID(char **data, int dlen, void *val);
+
+int acpi_add_BufferOp(char **data, int dlen,
+ contained_acpi_elem e, void *opaque);
+
+/* Pass in a pointer to a u64 */
+int acpi_add_Return(char **data, int dlen, void *);
+
+/*
+ * Note that str is void*, not char*, so it can be passed as a
+ * contained element.
+ */
+int acpi_add_Unicode(char **data, int dlen, void *vstr);
+
+int acpi_add_IO16(char **data, int dlen,
+ uint16_t minaddr, uint16_t maxaddr,
+ uint8_t align, uint8_t range);
+
+#define ACPI_RESOURCE_PRODUCER 0
+#define ACPI_RESOURCE_CONSUMER 1
+#define ACPI_INTERRUPT_MODE_LEVEL 0
+#define ACPI_INTERRUPT_MODE_EDGE 1
+#define ACPI_INTERRUPT_POLARITY_ACTIVE_HIGH 0
+#define ACPI_INTERRUPT_POLARITY_ACTIVE_LOW 1
+#define ACPI_INTERRUPT_EXCLUSIVE 0
+#define ACPI_INTERRUPT_SHARED 1
+#define ACPI_INTERRUPT_EXCLUSIVE_WAKE 2
+#define ACPI_INTERRUPT_SHARED_WAKE 3
+
+int acpi_add_Interrupt(char **data, int dlen, int irq,
+ int consumer, int mode, int polarity, int sharing);
+
+int acpi_add_EndResource(char **data, int dlen);
+
+#endif
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH 15/16] ipmi: Add ACPI table entries for BMCs
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (13 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 14/16] acpi: Add table construction tools minyard
@ 2014-12-12 19:15 ` minyard
2015-02-19 2:54 ` Benjamin Herrenschmidt
2014-12-12 19:15 ` [Qemu-devel] [PATCH 16/16] ipmi: Add a thread to better simulate a BMC minyard
2014-12-15 21:21 ` [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu Paolo Bonzini
16 siblings, 1 reply; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Use the new ACPI table construction tools to create an ACPI
entry for IPMI.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
hw/ipmi/isa_ipmi.c | 145 +++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 145 insertions(+)
diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi.c
index 83ea706..1652166 100644
--- a/hw/ipmi/isa_ipmi.c
+++ b/hw/ipmi/isa_ipmi.c
@@ -23,6 +23,8 @@
*/
#include "hw/hw.h"
#include "hw/isa/isa.h"
+#include "hw/acpi/acpi-elements.h"
+#include "hw/acpi/acpi.h"
#include "hw/i386/pc.h"
#include "qemu/timer.h"
#include "sysemu/char.h"
@@ -39,6 +41,8 @@ typedef struct ISAIPMIDevice {
char *interface;
int intftype;
uint32_t iobase;
+ uint32_t iolength;
+ uint8_t regspacing;
int32 isairq;
uint8_t slave_addr;
uint8_t version;
@@ -58,6 +62,143 @@ struct smbios_type_38 {
uint8_t interrupt_number;
} QEMU_PACKED;
+static int
+acpi_ipmi_crs_ops(char **data, int dlen, void *opaque)
+{
+ ISAIPMIDevice *info = opaque;
+ int len, rv;
+ uint8_t regspacing = info->regspacing;
+
+ if (regspacing == 1) {
+ regspacing = 0;
+ }
+
+ /* IO(Decode16, x, y, z, c) */
+ len = acpi_add_IO16(data, dlen, info->iobase,
+ info->iobase + info->iolength - 1,
+ regspacing, info->iolength);
+ if (len < 0) {
+ return len;
+ }
+
+ if (info->isairq) {
+ /* Interrupt(ResourceConsumer,Level,ActiveHigh,Exclusive) {n} */
+ rv = acpi_add_Interrupt(data, dlen, info->isairq,
+ ACPI_RESOURCE_CONSUMER,
+ ACPI_INTERRUPT_MODE_LEVEL,
+ ACPI_INTERRUPT_POLARITY_ACTIVE_HIGH,
+ ACPI_INTERRUPT_EXCLUSIVE);
+ if (rv < 0) {
+ return rv;
+ }
+ len += rv;
+ }
+ rv = acpi_add_EndResource(data, dlen);
+ if (rv < 0) {
+ return rv;
+ }
+ len += rv;
+ return len;
+}
+
+static int
+acpi_ipmi_crs(char **data, int dlen, void *opaque)
+{
+ ISAIPMIDevice *info = opaque;
+ int len;
+
+ len = acpi_add_BufferOp(NULL, 0, acpi_ipmi_crs_ops, info);
+ if (len < 0) {
+ return len;
+ }
+ if (len <= dlen) {
+ acpi_add_BufferOp(data, dlen, acpi_ipmi_crs_ops, info);
+ }
+ return len;
+}
+
+static int
+acpi_ipmi_dev(char **data, int dlen, void *opaque)
+{
+ ISAIPMIDevice *info = opaque;
+ int len, rv;
+ char *name;
+ uint64_t val;
+
+ name = g_strdup_printf("ipmi_%s", info->interface);
+
+ /* Name(_HID, EISAID("IPI0001")) */
+ len = acpi_add_Name(data, dlen, "_HID", acpi_add_EISAID,
+ (void *) "IPI0001");
+ if (len < 0) {
+ return len;
+ }
+ /* Name(_STR, Unicode("ipmi_xxx")) */
+ rv = acpi_add_Name(data, dlen, "_STR", acpi_add_Unicode, name);
+ if (rv < 0) {
+ return rv;
+ }
+ len += rv;
+ val = 0;
+ /* Name(_UID, 0) */
+ rv = acpi_add_Name(data, dlen, "_UID", acpi_add_Integer, &val);
+ if (rv < 0) {
+ return rv;
+ }
+ len += rv;
+ /* Name(_CRS, ResourceTemplate() { */
+ rv = acpi_add_Name(data, dlen, "_CRS", acpi_ipmi_crs, info);
+ if (rv < 0) {
+ return rv;
+ }
+ len += rv;
+ val = info->intftype;
+ /* Method(_IFT) { Return(i) } */
+ rv = acpi_add_Method(data, dlen, "_IFT", 0, acpi_add_Return, &val);
+ if (rv < 0) {
+ return rv;
+ }
+ len += rv;
+ val = ((info->version & 0xf0) << 4) | (info->version & 0x0f);
+ /* Method(_SRV) { Return(version) } */
+ rv = acpi_add_Method(data, dlen, "_SRV", 0, acpi_add_Return, &val);
+ if (rv < 0) {
+ return rv;
+ }
+ len += rv;
+ return len;
+}
+
+static int
+acpi_ipmi_scope(char **data, int dlen, void *opaque)
+{
+ ISAIPMIDevice *info = opaque;
+
+ /* Device(MI0) { */
+ return acpi_add_Device(data, dlen, "MI0", acpi_ipmi_dev, info);
+ /* } */
+}
+
+static void
+ipmi_encode_acpi(ISAIPMIDevice *info)
+{
+ char ipmitable[200];
+ char *tblptr = ipmitable;
+ int rc;
+ Error *err = NULL;
+
+ /* Scope(\_SB.PCI0.ISA) { */
+ rc = acpi_add_Scope(&tblptr, sizeof(ipmitable), "\\_SB.PCI0.ISA",
+ acpi_ipmi_scope, info);
+ /* } */
+ if (rc < 0) {
+ fprintf(stderr, "Unable to format IPMI ACPI table entry\n");
+ return;
+ }
+
+ acpi_append_to_table("SSDT", ipmitable, rc, &err);
+}
+
static void ipmi_encode_smbios(void *opaque)
{
ISAIPMIDevice *info = opaque;
@@ -79,6 +220,8 @@ static void ipmi_encode_smbios(void *opaque)
smb38.interrupt_number = info->isairq;
smbios_table_entry_add((struct smbios_structure_header *) &smb38,
sizeof(smb38), true);
+
+ ipmi_encode_acpi(info);
}
static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
@@ -110,6 +253,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
intfk = IPMI_INTERFACE_GET_CLASS(intf);
bmc->intf = intf;
intf->bmc = bmc;
+ ipmi->regspacing = 1;
intf->io_base = ipmi->iobase;
intf->slave_addr = ipmi->slave_addr;
ipmi->intftype = intfk->smbios_type;
@@ -118,6 +262,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
if (*errp) {
return;
}
+ ipmi->iolength = intf->io_length;
ipmi_bmc_init(bmc, errp);
if (*errp) {
return;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [Qemu-devel] [PATCH 15/16] ipmi: Add ACPI table entries for BMCs
2014-12-12 19:15 ` [Qemu-devel] [PATCH 15/16] ipmi: Add ACPI table entries for BMCs minyard
@ 2015-02-19 2:54 ` Benjamin Herrenschmidt
2015-02-20 3:16 ` Corey Minyard
0 siblings, 1 reply; 24+ messages in thread
From: Benjamin Herrenschmidt @ 2015-02-19 2:54 UTC (permalink / raw)
To: minyard; +Cc: Corey Minyard, qemu-devel
On Fri, 2014-12-12 at 13:15 -0600, minyard@acm.org wrote:
> From: Corey Minyard <cminyard@mvista.com>
>
> Use the new ACPI table construction tools to create an ACPI
> entry for IPMI.
Same question as for the smbios business... Can this be made optional
possibly via instanciation attributes for the BMC device ?
Ben.
> Signed-off-by: Corey Minyard <cminyard@mvista.com>
> ---
> hw/ipmi/isa_ipmi.c | 145 +++++++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 145 insertions(+)
>
> diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi.c
> index 83ea706..1652166 100644
> --- a/hw/ipmi/isa_ipmi.c
> +++ b/hw/ipmi/isa_ipmi.c
> @@ -23,6 +23,8 @@
> */
> #include "hw/hw.h"
> #include "hw/isa/isa.h"
> +#include "hw/acpi/acpi-elements.h"
> +#include "hw/acpi/acpi.h"
> #include "hw/i386/pc.h"
> #include "qemu/timer.h"
> #include "sysemu/char.h"
> @@ -39,6 +41,8 @@ typedef struct ISAIPMIDevice {
> char *interface;
> int intftype;
> uint32_t iobase;
> + uint32_t iolength;
> + uint8_t regspacing;
> int32 isairq;
> uint8_t slave_addr;
> uint8_t version;
> @@ -58,6 +62,143 @@ struct smbios_type_38 {
> uint8_t interrupt_number;
> } QEMU_PACKED;
>
> +static int
> +acpi_ipmi_crs_ops(char **data, int dlen, void *opaque)
> +{
> + ISAIPMIDevice *info = opaque;
> + int len, rv;
> + uint8_t regspacing = info->regspacing;
> +
> + if (regspacing == 1) {
> + regspacing = 0;
> + }
> +
> + /* IO(Decode16, x, y, z, c) */
> + len = acpi_add_IO16(data, dlen, info->iobase,
> + info->iobase + info->iolength - 1,
> + regspacing, info->iolength);
> + if (len < 0) {
> + return len;
> + }
> +
> + if (info->isairq) {
> + /* Interrupt(ResourceConsumer,Level,ActiveHigh,Exclusive) {n} */
> + rv = acpi_add_Interrupt(data, dlen, info->isairq,
> + ACPI_RESOURCE_CONSUMER,
> + ACPI_INTERRUPT_MODE_LEVEL,
> + ACPI_INTERRUPT_POLARITY_ACTIVE_HIGH,
> + ACPI_INTERRUPT_EXCLUSIVE);
> + if (rv < 0) {
> + return rv;
> + }
> + len += rv;
> + }
> + rv = acpi_add_EndResource(data, dlen);
> + if (rv < 0) {
> + return rv;
> + }
> + len += rv;
> + return len;
> +}
> +
> +static int
> +acpi_ipmi_crs(char **data, int dlen, void *opaque)
> +{
> + ISAIPMIDevice *info = opaque;
> + int len;
> +
> + len = acpi_add_BufferOp(NULL, 0, acpi_ipmi_crs_ops, info);
> + if (len < 0) {
> + return len;
> + }
> + if (len <= dlen) {
> + acpi_add_BufferOp(data, dlen, acpi_ipmi_crs_ops, info);
> + }
> + return len;
> +}
> +
> +static int
> +acpi_ipmi_dev(char **data, int dlen, void *opaque)
> +{
> + ISAIPMIDevice *info = opaque;
> + int len, rv;
> + char *name;
> + uint64_t val;
> +
> + name = g_strdup_printf("ipmi_%s", info->interface);
> +
> + /* Name(_HID, EISAID("IPI0001")) */
> + len = acpi_add_Name(data, dlen, "_HID", acpi_add_EISAID,
> + (void *) "IPI0001");
> + if (len < 0) {
> + return len;
> + }
> + /* Name(_STR, Unicode("ipmi_xxx")) */
> + rv = acpi_add_Name(data, dlen, "_STR", acpi_add_Unicode, name);
> + if (rv < 0) {
> + return rv;
> + }
> + len += rv;
> + val = 0;
> + /* Name(_UID, 0) */
> + rv = acpi_add_Name(data, dlen, "_UID", acpi_add_Integer, &val);
> + if (rv < 0) {
> + return rv;
> + }
> + len += rv;
> + /* Name(_CRS, ResourceTemplate() { */
> + rv = acpi_add_Name(data, dlen, "_CRS", acpi_ipmi_crs, info);
> + if (rv < 0) {
> + return rv;
> + }
> + len += rv;
> + val = info->intftype;
> + /* Method(_IFT) { Return(i) } */
> + rv = acpi_add_Method(data, dlen, "_IFT", 0, acpi_add_Return, &val);
> + if (rv < 0) {
> + return rv;
> + }
> + len += rv;
> + val = ((info->version & 0xf0) << 4) | (info->version & 0x0f);
> + /* Method(_SRV) { Return(version) } */
> + rv = acpi_add_Method(data, dlen, "_SRV", 0, acpi_add_Return, &val);
> + if (rv < 0) {
> + return rv;
> + }
> + len += rv;
> + return len;
> +}
> +
> +static int
> +acpi_ipmi_scope(char **data, int dlen, void *opaque)
> +{
> + ISAIPMIDevice *info = opaque;
> +
> + /* Device(MI0) { */
> + return acpi_add_Device(data, dlen, "MI0", acpi_ipmi_dev, info);
> + /* } */
> +}
> +
> +static void
> +ipmi_encode_acpi(ISAIPMIDevice *info)
> +{
> + char ipmitable[200];
> + char *tblptr = ipmitable;
> + int rc;
> + Error *err = NULL;
> +
> + /* Scope(\_SB.PCI0.ISA) { */
> + rc = acpi_add_Scope(&tblptr, sizeof(ipmitable), "\\_SB.PCI0.ISA",
> + acpi_ipmi_scope, info);
> + /* } */
> + if (rc < 0) {
> + fprintf(stderr, "Unable to format IPMI ACPI table entry\n");
> + return;
> + }
> +
> + acpi_append_to_table("SSDT", ipmitable, rc, &err);
> +}
> +
> static void ipmi_encode_smbios(void *opaque)
> {
> ISAIPMIDevice *info = opaque;
> @@ -79,6 +220,8 @@ static void ipmi_encode_smbios(void *opaque)
> smb38.interrupt_number = info->isairq;
> smbios_table_entry_add((struct smbios_structure_header *) &smb38,
> sizeof(smb38), true);
> +
> + ipmi_encode_acpi(info);
> }
>
> static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
> @@ -110,6 +253,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
> intfk = IPMI_INTERFACE_GET_CLASS(intf);
> bmc->intf = intf;
> intf->bmc = bmc;
> + ipmi->regspacing = 1;
> intf->io_base = ipmi->iobase;
> intf->slave_addr = ipmi->slave_addr;
> ipmi->intftype = intfk->smbios_type;
> @@ -118,6 +262,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
> if (*errp) {
> return;
> }
> + ipmi->iolength = intf->io_length;
> ipmi_bmc_init(bmc, errp);
> if (*errp) {
> return;
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [Qemu-devel] [PATCH 15/16] ipmi: Add ACPI table entries for BMCs
2015-02-19 2:54 ` Benjamin Herrenschmidt
@ 2015-02-20 3:16 ` Corey Minyard
2015-02-22 20:48 ` Benjamin Herrenschmidt
0 siblings, 1 reply; 24+ messages in thread
From: Corey Minyard @ 2015-02-20 3:16 UTC (permalink / raw)
To: qemu-devel
On 02/18/2015 08:54 PM, Benjamin Herrenschmidt wrote:
> On Fri, 2014-12-12 at 13:15 -0600, minyard@acm.org wrote:
>> From: Corey Minyard <cminyard@mvista.com>
>>
>> Use the new ACPI table construction tools to create an ACPI
>> entry for IPMI.
> Same question as for the smbios business... Can this be made optional
> possibly via instanciation attributes for the BMC device ?
I was thinking about how to do this. I wasn't too terribly concerned
right now because none of this ACPI stuff is going in as is, there are
other patches for handling this and there's a lot to work out for SMBIOS
and ACPI.
However, there is another pressing concern, assuming your device is on
the ISA bus, and that's the default address, interrupt, etc. It may
vary from platform to platform, and it would be nice to have a way for
it to be set more automatically.
If it's not on an ISA bus, another interface will need to be written.
-corey
> Ben.
>
>> Signed-off-by: Corey Minyard <cminyard@mvista.com>
>> ---
>> hw/ipmi/isa_ipmi.c | 145 +++++++++++++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 145 insertions(+)
>>
>> diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi.c
>> index 83ea706..1652166 100644
>> --- a/hw/ipmi/isa_ipmi.c
>> +++ b/hw/ipmi/isa_ipmi.c
>> @@ -23,6 +23,8 @@
>> */
>> #include "hw/hw.h"
>> #include "hw/isa/isa.h"
>> +#include "hw/acpi/acpi-elements.h"
>> +#include "hw/acpi/acpi.h"
>> #include "hw/i386/pc.h"
>> #include "qemu/timer.h"
>> #include "sysemu/char.h"
>> @@ -39,6 +41,8 @@ typedef struct ISAIPMIDevice {
>> char *interface;
>> int intftype;
>> uint32_t iobase;
>> + uint32_t iolength;
>> + uint8_t regspacing;
>> int32 isairq;
>> uint8_t slave_addr;
>> uint8_t version;
>> @@ -58,6 +62,143 @@ struct smbios_type_38 {
>> uint8_t interrupt_number;
>> } QEMU_PACKED;
>>
>> +static int
>> +acpi_ipmi_crs_ops(char **data, int dlen, void *opaque)
>> +{
>> + ISAIPMIDevice *info = opaque;
>> + int len, rv;
>> + uint8_t regspacing = info->regspacing;
>> +
>> + if (regspacing == 1) {
>> + regspacing = 0;
>> + }
>> +
>> + /* IO(Decode16, x, y, z, c) */
>> + len = acpi_add_IO16(data, dlen, info->iobase,
>> + info->iobase + info->iolength - 1,
>> + regspacing, info->iolength);
>> + if (len < 0) {
>> + return len;
>> + }
>> +
>> + if (info->isairq) {
>> + /* Interrupt(ResourceConsumer,Level,ActiveHigh,Exclusive) {n} */
>> + rv = acpi_add_Interrupt(data, dlen, info->isairq,
>> + ACPI_RESOURCE_CONSUMER,
>> + ACPI_INTERRUPT_MODE_LEVEL,
>> + ACPI_INTERRUPT_POLARITY_ACTIVE_HIGH,
>> + ACPI_INTERRUPT_EXCLUSIVE);
>> + if (rv < 0) {
>> + return rv;
>> + }
>> + len += rv;
>> + }
>> + rv = acpi_add_EndResource(data, dlen);
>> + if (rv < 0) {
>> + return rv;
>> + }
>> + len += rv;
>> + return len;
>> +}
>> +
>> +static int
>> +acpi_ipmi_crs(char **data, int dlen, void *opaque)
>> +{
>> + ISAIPMIDevice *info = opaque;
>> + int len;
>> +
>> + len = acpi_add_BufferOp(NULL, 0, acpi_ipmi_crs_ops, info);
>> + if (len < 0) {
>> + return len;
>> + }
>> + if (len <= dlen) {
>> + acpi_add_BufferOp(data, dlen, acpi_ipmi_crs_ops, info);
>> + }
>> + return len;
>> +}
>> +
>> +static int
>> +acpi_ipmi_dev(char **data, int dlen, void *opaque)
>> +{
>> + ISAIPMIDevice *info = opaque;
>> + int len, rv;
>> + char *name;
>> + uint64_t val;
>> +
>> + name = g_strdup_printf("ipmi_%s", info->interface);
>> +
>> + /* Name(_HID, EISAID("IPI0001")) */
>> + len = acpi_add_Name(data, dlen, "_HID", acpi_add_EISAID,
>> + (void *) "IPI0001");
>> + if (len < 0) {
>> + return len;
>> + }
>> + /* Name(_STR, Unicode("ipmi_xxx")) */
>> + rv = acpi_add_Name(data, dlen, "_STR", acpi_add_Unicode, name);
>> + if (rv < 0) {
>> + return rv;
>> + }
>> + len += rv;
>> + val = 0;
>> + /* Name(_UID, 0) */
>> + rv = acpi_add_Name(data, dlen, "_UID", acpi_add_Integer, &val);
>> + if (rv < 0) {
>> + return rv;
>> + }
>> + len += rv;
>> + /* Name(_CRS, ResourceTemplate() { */
>> + rv = acpi_add_Name(data, dlen, "_CRS", acpi_ipmi_crs, info);
>> + if (rv < 0) {
>> + return rv;
>> + }
>> + len += rv;
>> + val = info->intftype;
>> + /* Method(_IFT) { Return(i) } */
>> + rv = acpi_add_Method(data, dlen, "_IFT", 0, acpi_add_Return, &val);
>> + if (rv < 0) {
>> + return rv;
>> + }
>> + len += rv;
>> + val = ((info->version & 0xf0) << 4) | (info->version & 0x0f);
>> + /* Method(_SRV) { Return(version) } */
>> + rv = acpi_add_Method(data, dlen, "_SRV", 0, acpi_add_Return, &val);
>> + if (rv < 0) {
>> + return rv;
>> + }
>> + len += rv;
>> + return len;
>> +}
>> +
>> +static int
>> +acpi_ipmi_scope(char **data, int dlen, void *opaque)
>> +{
>> + ISAIPMIDevice *info = opaque;
>> +
>> + /* Device(MI0) { */
>> + return acpi_add_Device(data, dlen, "MI0", acpi_ipmi_dev, info);
>> + /* } */
>> +}
>> +
>> +static void
>> +ipmi_encode_acpi(ISAIPMIDevice *info)
>> +{
>> + char ipmitable[200];
>> + char *tblptr = ipmitable;
>> + int rc;
>> + Error *err = NULL;
>> +
>> + /* Scope(\_SB.PCI0.ISA) { */
>> + rc = acpi_add_Scope(&tblptr, sizeof(ipmitable), "\\_SB.PCI0.ISA",
>> + acpi_ipmi_scope, info);
>> + /* } */
>> + if (rc < 0) {
>> + fprintf(stderr, "Unable to format IPMI ACPI table entry\n");
>> + return;
>> + }
>> +
>> + acpi_append_to_table("SSDT", ipmitable, rc, &err);
>> +}
>> +
>> static void ipmi_encode_smbios(void *opaque)
>> {
>> ISAIPMIDevice *info = opaque;
>> @@ -79,6 +220,8 @@ static void ipmi_encode_smbios(void *opaque)
>> smb38.interrupt_number = info->isairq;
>> smbios_table_entry_add((struct smbios_structure_header *) &smb38,
>> sizeof(smb38), true);
>> +
>> + ipmi_encode_acpi(info);
>> }
>>
>> static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
>> @@ -110,6 +253,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
>> intfk = IPMI_INTERFACE_GET_CLASS(intf);
>> bmc->intf = intf;
>> intf->bmc = bmc;
>> + ipmi->regspacing = 1;
>> intf->io_base = ipmi->iobase;
>> intf->slave_addr = ipmi->slave_addr;
>> ipmi->intftype = intfk->smbios_type;
>> @@ -118,6 +262,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
>> if (*errp) {
>> return;
>> }
>> + ipmi->iolength = intf->io_length;
>> ipmi_bmc_init(bmc, errp);
>> if (*errp) {
>> return;
>
>
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [Qemu-devel] [PATCH 15/16] ipmi: Add ACPI table entries for BMCs
2015-02-20 3:16 ` Corey Minyard
@ 2015-02-22 20:48 ` Benjamin Herrenschmidt
0 siblings, 0 replies; 24+ messages in thread
From: Benjamin Herrenschmidt @ 2015-02-22 20:48 UTC (permalink / raw)
To: minyard; +Cc: qemu-devel
On Thu, 2015-02-19 at 21:16 -0600, Corey Minyard wrote:
> However, there is another pressing concern, assuming your device is on
> the ISA bus, and that's the default address, interrupt, etc. It may
> vary from platform to platform, and it would be nice to have a way for
> it to be set more automatically.
>
> If it's not on an ISA bus, another interface will need to be written.
It's on the LPC/ISA bus, and the address/interrupt are in the
device-tree which qemu provides but yes, it would make sense to have
them be qdev properties to configure them to mimmic actual HW.
In fact I would like them to be qobject properties that can be changed
at runtime, but I'll look into that later. The reason is that I want to
emulate a bit more of the BMC since our FW uses a few other things in
there, and among others, some registers that you can use to ...
set/change the ISA address of the BT or KCS interfaces. (In fact same
goes with the UART).
But that's for much later, I still have a lot of work to do to get the
basic shape of the P8 model in a mergable state, so my comment was more
a generic idea of trying to keep the more generic BMC bits reasonably
separate from the SMBIOS/ACPI specific portions.
Cheers,
Ben.
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Qemu-devel] [PATCH 16/16] ipmi: Add a thread to better simulate a BMC
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (14 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 15/16] ipmi: Add ACPI table entries for BMCs minyard
@ 2014-12-12 19:15 ` minyard
2014-12-15 21:11 ` Paolo Bonzini
2014-12-15 21:21 ` [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu Paolo Bonzini
16 siblings, 1 reply; 24+ messages in thread
From: minyard @ 2014-12-12 19:15 UTC (permalink / raw)
To: qemu-devel; +Cc: Corey Minyard
From: Corey Minyard <cminyard@mvista.com>
Run the IPMI BMC in a separate thread. This provides a little better
simulation, since a BMC will normally be asynchronous to the rest of
the system.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
---
hw/ipmi/ipmi.c | 33 +++++++++++++++++++++++++++++++++
hw/ipmi/ipmi.h | 47 +++++++++++++++++++++++++++++++++++++++++++----
hw/ipmi/ipmi_bt.c | 6 ++++++
hw/ipmi/ipmi_extern.c | 17 +++++++++++++++++
hw/ipmi/ipmi_kcs.c | 5 +++++
hw/ipmi/isa_ipmi.c | 3 +++
6 files changed, 107 insertions(+), 4 deletions(-)
diff --git a/hw/ipmi/ipmi.c b/hw/ipmi/ipmi.c
index f3e5e9e..27cf888 100644
--- a/hw/ipmi/ipmi.c
+++ b/hw/ipmi/ipmi.c
@@ -27,6 +27,27 @@
#include "sysemu/sysemu.h"
#include "qmp-commands.h"
+/*
+ * Create a separate thread for the IPMI interface itself. This is a
+ * better simulation and lets the IPMI interface do things asynchronously
+ * if necessary.
+ */
+static void *ipmi_thread(void *opaque)
+{
+ IPMIInterface *s = opaque;
+
+ qemu_mutex_lock(&s->lock);
+ for (;;) {
+ qemu_cond_wait(&s->waker, &s->lock);
+ while (s->do_wake) {
+ s->do_wake = 0;
+ (IPMI_INTERFACE_GET_CLASS(s))->handle_if_event(s);
+ }
+ }
+ qemu_mutex_unlock(&s->lock);
+ return NULL;
+}
+
static int ipmi_do_hw_op(IPMIInterface *s, enum ipmi_op op, int checkonly)
{
switch (op) {
@@ -90,6 +111,18 @@ void ipmi_interface_init(IPMIInterface *s, Error **errp)
if (!s->slave_addr) {
s->slave_addr = 0x20;
}
+
+ if (s->threaded_bmc) {
+ qemu_mutex_init(&s->lock);
+ qemu_cond_init(&s->waker);
+ qemu_thread_create(&s->thread, "ipmi-bmc", ipmi_thread, s, 0);
+ }
+
+ if (s->threaded_bmc) {
+ qemu_mutex_init(&s->lock);
+ qemu_cond_init(&s->waker);
+ qemu_thread_create(&s->thread, "ipmi-bmc", ipmi_thread, s, 0);
+ }
}
static void ipmi_interface_class_init(ObjectClass *class, void *data)
diff --git a/hw/ipmi/ipmi.h b/hw/ipmi/ipmi.h
index 56cb423..0634b7c 100644
--- a/hw/ipmi/ipmi.h
+++ b/hw/ipmi/ipmi.h
@@ -28,6 +28,7 @@
#include "exec/memory.h"
#include "qemu-common.h"
#include "hw/qdev.h"
+#include "qemu/thread.h"
#define MAX_IPMI_MSG_SIZE 300
@@ -87,6 +88,16 @@ typedef struct IPMIInterface {
IPMIBmc *bmc;
+ bool threaded_bmc;
+
+ /* For threaded BMC */
+ QemuThread thread;
+ QemuCond waker;
+ QemuMutex lock;
+
+ /* For non-threaded BMC */
+ int lockcount;
+
bool do_wake;
qemu_irq irq;
@@ -133,6 +144,7 @@ typedef struct IPMIInterfaceClass {
/*
* Handle an event that occurred on the interface, generally the.
* target writing to a register.
+ * Must be called with ipmi_lock held.
*/
void (*handle_if_event)(struct IPMIInterface *s);
@@ -148,6 +160,7 @@ typedef struct IPMIInterfaceClass {
/*
* Handle a response from the bmc.
+ * Must be called with ipmi_lock held.
*/
void (*handle_rsp)(struct IPMIInterface *s, uint8_t msg_id,
unsigned char *rsp, unsigned int rsp_len);
@@ -172,12 +185,37 @@ void ipmi_interface_reset(IPMIInterface *s);
#define TYPE_IPMI_BMC_EXTERN "ipmi-bmc-extern"
#define TYPE_IPMI_BMC_SIMULATOR "ipmi-bmc-sim"
+static inline void ipmi_lock(IPMIInterface *s)
+{
+ if (s->threaded_bmc) {
+ qemu_mutex_lock(&s->lock);
+ } else {
+ s->lockcount++;
+ }
+}
+
+static inline void ipmi_unlock(IPMIInterface *s)
+{
+ if (s->threaded_bmc) {
+ qemu_mutex_unlock(&s->lock);
+ } else {
+ s->lockcount--;
+ }
+}
+
static inline void ipmi_signal(IPMIInterface *s)
{
- s->do_wake = 1;
- while (s->do_wake) {
- s->do_wake = 0;
- (IPMI_INTERFACE_GET_CLASS(s))->handle_if_event(s);
+ if (s->threaded_bmc) {
+ s->do_wake = 1;
+ qemu_cond_signal(&s->waker);
+ } else {
+ s->do_wake = 1;
+ s->lockcount++;
+ while (s->do_wake) {
+ s->do_wake = 0;
+ (IPMI_INTERFACE_GET_CLASS(s))->handle_if_event(s);
+ }
+ s->lockcount--;
}
}
@@ -198,6 +236,7 @@ typedef struct IPMIBmcClass {
/*
* Handle a command to the bmc.
+ * Must be called with ipmi_lock held.
*/
void (*handle_command)(struct IPMIBmc *s,
uint8_t *cmd, unsigned int cmd_len,
diff --git a/hw/ipmi/ipmi_bt.c b/hw/ipmi/ipmi_bt.c
index 105b978..aecf6c9 100644
--- a/hw/ipmi/ipmi_bt.c
+++ b/hw/ipmi/ipmi_bt.c
@@ -107,6 +107,7 @@ static void ipmi_bt_handle_event(IPMIInterface *s)
{
IPMIBtInterface *bt = IPMI_INTERFACE_BT(s);
+ /* ipmi_lock is already claimed. */
if (s->inlen < 4) {
goto out;
}
@@ -165,6 +166,7 @@ static void ipmi_bt_handle_rsp(IPMIInterface *s, uint8_t msg_id,
{
IPMIBtInterface *bt = IPMI_INTERFACE_BT(s);
+ /* ipmi_lock is already claimed. */
if (bt->waiting_rsp == msg_id) {
bt->waiting_rsp++;
if (rsp_len > (sizeof(s->outmsg) - 2)) {
@@ -199,6 +201,7 @@ static uint64_t ipmi_bt_ioport_read(void *opaque, hwaddr addr, unsigned size)
IPMIInterface *s = &bt->intf;
uint32_t ret = 0xff;
+ ipmi_lock(s);
switch (addr & 3) {
case 0:
ret = bt->control_reg;
@@ -219,6 +222,7 @@ static uint64_t ipmi_bt_ioport_read(void *opaque, hwaddr addr, unsigned size)
ret = bt->mask_reg;
break;
}
+ ipmi_unlock(s);
return ret;
}
@@ -228,6 +232,7 @@ static void ipmi_bt_ioport_write(void *opaque, hwaddr addr, uint64_t val,
IPMIBtInterface *bt = opaque;
IPMIInterface *s = &bt->intf;
+ ipmi_lock(s);
switch (addr & 3) {
case 0:
if (IPMI_BT_GET_CLR_WR(val)) {
@@ -284,6 +289,7 @@ static void ipmi_bt_ioport_write(void *opaque, hwaddr addr, uint64_t val,
}
break;
}
+ ipmi_unlock(s);
}
static const MemoryRegionOps ipmi_bt_io_ops = {
diff --git a/hw/ipmi/ipmi_extern.c b/hw/ipmi/ipmi_extern.c
index aace0b3..981a97b 100644
--- a/hw/ipmi/ipmi_extern.c
+++ b/hw/ipmi/ipmi_extern.c
@@ -140,6 +140,7 @@ static void extern_timeout(void *opaque)
IPMIExternBmc *es = opaque;
IPMIInterface *s = es->parent.intf;
+ ipmi_lock(s);
if (es->connected) {
if (es->waiting_rsp && (es->outlen == 0)) {
IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
@@ -153,6 +154,7 @@ static void extern_timeout(void *opaque)
continue_send(es);
}
}
+ ipmi_unlock(s);
}
static void addchar(IPMIExternBmc *es, unsigned char ch)
@@ -182,6 +184,7 @@ static void ipmi_extern_handle_command(IPMIBmc *b,
uint8_t err = 0, csum;
unsigned int i;
+ ipmi_lock(s);
if (es->outlen) {
/* We already have a command queued. Shouldn't ever happen. */
fprintf(stderr, "IPMI KCS: Got command when not finished with the"
@@ -222,6 +225,7 @@ static void ipmi_extern_handle_command(IPMIBmc *b,
continue_send(es);
out:
+ ipmi_unlock(s);
return;
}
@@ -304,9 +308,11 @@ static int can_receive(void *opaque)
static void receive(void *opaque, const uint8_t *buf, int size)
{
IPMIExternBmc *es = opaque;
+ IPMIInterface *s = es->parent.intf;
int i;
unsigned char hw_op;
+ ipmi_lock(s);
for (i = 0; i < size; i++) {
unsigned char ch = buf[i];
@@ -361,9 +367,15 @@ static void receive(void *opaque, const uint8_t *buf, int size)
break;
}
}
+ ipmi_unlock(s);
return;
out_hw_op:
+ ipmi_unlock(s);
+ /*
+ * We don't want to handle hardware operations while holding the
+ * lock, that may call back into this code to report a reset.
+ */
handle_hw_op(es, hw_op);
}
@@ -374,6 +386,7 @@ static void chr_event(void *opaque, int event)
IPMIInterfaceClass *k = IPMI_INTERFACE_GET_CLASS(s);
unsigned char v;
+ ipmi_lock(s);
switch (event) {
case CHR_EVENT_OPENED:
es->connected = 1;
@@ -415,14 +428,18 @@ static void chr_event(void *opaque, int event)
}
break;
}
+ ipmi_unlock(s);
}
static void ipmi_extern_handle_reset(IPMIBmc *b)
{
IPMIExternBmc *es = IPMI_BMC_EXTERN(b);
+ IPMIInterface *s = es->parent.intf;
+ ipmi_lock(s);
es->send_reset = 1;
continue_send(es);
+ ipmi_unlock(s);
}
static int ipmi_extern_post_migrate(void *opaque, int version_id)
diff --git a/hw/ipmi/ipmi_kcs.c b/hw/ipmi/ipmi_kcs.c
index e3af39e..ef50b83 100644
--- a/hw/ipmi/ipmi_kcs.c
+++ b/hw/ipmi/ipmi_kcs.c
@@ -197,6 +197,7 @@ static void ipmi_kcs_handle_rsp(IPMIInterface *s, uint8_t msg_id,
{
IPMIKcsInterface *kcs = IPMI_INTERFACE_KCS(s);
+ /* ipmi_lock is already claimed. */
if (kcs->waiting_rsp == msg_id) {
kcs->waiting_rsp++;
if (rsp_len > sizeof(s->outmsg)) {
@@ -220,6 +221,7 @@ static uint64_t ipmi_kcs_ioport_read(void *opaque, hwaddr addr, unsigned size)
IPMIKcsInterface *kcs = opaque;
uint32_t ret;
+ ipmi_lock(&kcs->intf);
switch (addr & 1) {
case 0:
ret = kcs->data_out_reg;
@@ -241,6 +243,7 @@ static uint64_t ipmi_kcs_ioport_read(void *opaque, hwaddr addr, unsigned size)
}
break;
}
+ ipmi_unlock(&kcs->intf);
return ret;
}
@@ -254,6 +257,7 @@ static void ipmi_kcs_ioport_write(void *opaque, hwaddr addr, uint64_t val,
return;
}
+ ipmi_lock(s);
switch (addr & 1) {
case 0:
kcs->data_in_reg = val;
@@ -265,6 +269,7 @@ static void ipmi_kcs_ioport_write(void *opaque, hwaddr addr, uint64_t val,
}
IPMI_KCS_SET_IBF(kcs->status_reg, 1);
ipmi_signal(s);
+ ipmi_unlock(s);
}
const MemoryRegionOps ipmi_kcs_io_ops = {
diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi.c
index 1652166..aa4bb3c 100644
--- a/hw/ipmi/isa_ipmi.c
+++ b/hw/ipmi/isa_ipmi.c
@@ -46,6 +46,7 @@ typedef struct ISAIPMIDevice {
int32 isairq;
uint8_t slave_addr;
uint8_t version;
+ bool threaded_bmc;
CharDriverState *chr;
IPMIInterface *intf;
} ISAIPMIDevice;
@@ -258,6 +259,7 @@ static void ipmi_isa_realizefn(DeviceState *dev, Error **errp)
intf->slave_addr = ipmi->slave_addr;
ipmi->intftype = intfk->smbios_type;
ipmi->version = 0x20; /* Version 2.0 */
+ intf->threaded_bmc = ipmi->threaded_bmc;
ipmi_interface_init(intf, errp);
if (*errp) {
return;
@@ -306,6 +308,7 @@ static Property ipmi_isa_properties[] = {
DEFINE_PROP_INT32("irq", ISAIPMIDevice, isairq, 5),
DEFINE_PROP_UINT8("slave_addr", ISAIPMIDevice, slave_addr, 0),
DEFINE_PROP_CHR("chardev", ISAIPMIDevice, chr),
+ DEFINE_PROP_BOOL("threadbmc", ISAIPMIDevice, threaded_bmc, false),
DEFINE_PROP_END_OF_LIST(),
};
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [Qemu-devel] [PATCH 16/16] ipmi: Add a thread to better simulate a BMC
2014-12-12 19:15 ` [Qemu-devel] [PATCH 16/16] ipmi: Add a thread to better simulate a BMC minyard
@ 2014-12-15 21:11 ` Paolo Bonzini
2014-12-15 21:33 ` Corey Minyard
0 siblings, 1 reply; 24+ messages in thread
From: Paolo Bonzini @ 2014-12-15 21:11 UTC (permalink / raw)
To: minyard, qemu-devel; +Cc: Corey Minyard
On 12/12/2014 20:15, minyard@acm.org wrote:
> + if (s->threaded_bmc) {
> + qemu_mutex_init(&s->lock);
> + qemu_cond_init(&s->waker);
> + qemu_thread_create(&s->thread, "ipmi-bmc", ipmi_thread, s, 0);
> + }
> +
> + if (s->threaded_bmc) {
> + qemu_mutex_init(&s->lock);
> + qemu_cond_init(&s->waker);
> + qemu_thread_create(&s->thread, "ipmi-bmc", ipmi_thread, s, 0);
> + }
> +
Duplicated bit---probably a rebase hiccup?
Paolo
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [Qemu-devel] [PATCH 16/16] ipmi: Add a thread to better simulate a BMC
2014-12-15 21:11 ` Paolo Bonzini
@ 2014-12-15 21:33 ` Corey Minyard
0 siblings, 0 replies; 24+ messages in thread
From: Corey Minyard @ 2014-12-15 21:33 UTC (permalink / raw)
To: Paolo Bonzini, minyard, qemu-devel
On 12/15/2014 03:11 PM, Paolo Bonzini wrote:
>
> On 12/12/2014 20:15, minyard@acm.org wrote:
>> + if (s->threaded_bmc) {
>> + qemu_mutex_init(&s->lock);
>> + qemu_cond_init(&s->waker);
>> + qemu_thread_create(&s->thread, "ipmi-bmc", ipmi_thread, s, 0);
>> + }
>> +
>> + if (s->threaded_bmc) {
>> + qemu_mutex_init(&s->lock);
>> + qemu_cond_init(&s->waker);
>> + qemu_thread_create(&s->thread, "ipmi-bmc", ipmi_thread, s, 0);
>> + }
>> +
> Duplicated bit---probably a rebase hiccup?
Almost certainly. Got it, Thanks.
-corey
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu
2014-12-12 19:15 [Qemu-devel] [PATCH 00/16] Add an IPMI device to qemu minyard
` (15 preceding siblings ...)
2014-12-12 19:15 ` [Qemu-devel] [PATCH 16/16] ipmi: Add a thread to better simulate a BMC minyard
@ 2014-12-15 21:21 ` Paolo Bonzini
16 siblings, 0 replies; 24+ messages in thread
From: Paolo Bonzini @ 2014-12-15 21:21 UTC (permalink / raw)
To: minyard, qemu-devel
On 12/12/2014 20:15, minyard@acm.org wrote:
> This set of patches adds an IPMI device to qemu. This is good for
> systems that require an IPMI device to work correctly, for simulating
> scenarios that require IPMI and testing software that uses IPMI, and
> of course, for the Linux IPMI driver maintainer to use to reproduce
> issues that could not be easily reproduced otherwise :).
>
> For those that don't know, IPMI is a standard for doing sensor
> monitoring and basic machine maintenance. It has local interfaces
> on the host system (four different types, SMIC, KCS, BT, and SSIF)
> that can be in I/O space, memory space, and PCI space, and in the
> case of SSIF, is on an I2C bus. It can also have network interfaces
> for out of band maintenance, though that's not directly relevant
> here. It is a message-based interface; all IPMI operations are
> done by sending command messages, results come back as response
> messages.
>
> The maintenance actions are done by a small controller on the system
> called a Baseboard Management Controller (BMC). These devices are
> always on when the system is plugged in, even if the system is off.
>
> The first 9 patches add the device itself on an ISA interface. This
> adds a KCS device and a BT device (two of the four standard IPMI
> interfaces). It also adds software to have a small BMC simulated
> inside of QEMU, and a way to connected to an external BMC (like
> openipmi library's lanserv) over the network. Those patches should
> be pretty straightforward, though I'm still not 100% sure about
> migration.
Indeed patches 1-8 should be pretty much done. And 9 looks like it's in
good shape too, though I have not reviewed it carefully enough.
I haven't checked that the patches pass checkpatch.pl; also the
preferred style over this:
+ (IPMI_INTERFACE_GET_CLASS(s))->handle_if_event(s);
is to have a function:
ipmi_interface_handle_if_event(s);
that is written like
void ipmi_interface_handle_if_event(IPMIInterface *s)
{
IPMIInterfaceClass *sc = IPMI_INTERFACE_GET_CLASS(s);
sc->handle_if_event(s);
}
Also, a function like ipmi_signal would be in the .c file. There should
be no use of *_GET_CLASS outside the .c file.
For patches 10-15, there is already code in QEMU for ACPI table
generation. Right now it uses iasl, but Igor Mammedov is also working
on an API similar to yours (the duplication is unfortunate, indeed). So
it would probably be better to integrate table construction with
"regular" SSDT construction in hw/i386/acpi-build.c. ACPI tables are
already sent to the firmware after device initialization; IIUC they are
built on demand, so there should be no change required for this anymore.
SMBIOS tables are also built in QEMU now, which simplified your work a
bit. Moving the work to a machine_done_notifier is a good idea and
matches ACPI. The only thing I'd change is using a NotifierList instead
of rolling your own smbios_device_handler struct.
BTW, any reason to choose ISA over PCI or I2C (which is supported for
i386 via the ACPI SMBus controller)?
Paolo
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