From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48232) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOrr1-0001J3-Bt for qemu-devel@nongnu.org; Fri, 20 Feb 2015 12:59:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YOrqy-0000yC-6b for qemu-devel@nongnu.org; Fri, 20 Feb 2015 12:59:07 -0500 Received: from mail-we0-x231.google.com ([2a00:1450:400c:c03::231]:34106) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOrqx-0000y1-W6 for qemu-devel@nongnu.org; Fri, 20 Feb 2015 12:59:04 -0500 Received: by wesq59 with SMTP id q59so7078167wes.1 for ; Fri, 20 Feb 2015 09:59:03 -0800 (PST) Sender: Paolo Bonzini Message-ID: <54E775E2.4040005@redhat.com> Date: Fri, 20 Feb 2015 18:58:58 +0100 From: Paolo Bonzini MIME-Version: 1.0 References: <1424436345-37924-1-git-send-email-pbonzini@redhat.com> <1424436345-37924-4-git-send-email-pbonzini@redhat.com> <54E73001.8000104@suse.de> In-Reply-To: <54E73001.8000104@suse.de> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 3/3] target-ppc: use separate indices for various translation modes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf , qemu-devel@nongnu.org On 20/02/2015 14:00, Alexander Graf wrote: > Also please double-check that 440 still works. That was the target that > gave me the most headaches on DR/IR switching so far. The ppc-virtexml507-linux-2_6_34.tgz image works for me. Paolo > Otherwise looks simple and clean to me :). > > > Alex > >> } >> >> static inline void hreg_compute_hflags(CPUPPCState *env) >> @@ -56,7 +59,7 @@ static inline void hreg_compute_hflags(CPUPPCState *env) >> /* We 'forget' FE0 & FE1: we'll never generate imprecise exceptions */ >> hflags_mask = (1 << MSR_VR) | (1 << MSR_AP) | (1 << MSR_SA) | >> (1 << MSR_PR) | (1 << MSR_FP) | (1 << MSR_SE) | (1 << MSR_BE) | >> - (1 << MSR_LE) | (1 << MSR_VSX); >> + (1 << MSR_LE) | (1 << MSR_VSX) | (1 << MSR_IR) | (1 << MSR_DR); >> hflags_mask |= (1ULL << MSR_CM) | (1ULL << MSR_SF) | MSR_HVB; >> hreg_compute_mem_idx(env); >> env->hflags = env->msr & hflags_mask; >> @@ -82,8 +85,6 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value, >> } >> if (((value >> MSR_IR) & 1) != msr_ir || >> ((value >> MSR_DR) & 1) != msr_dr) { >> - /* Flush all tlb when changing translation mode */ >> - tlb_flush(cs, 1); >> excp = POWERPC_EXCP_NONE; >> cs->interrupt_request |= CPU_INTERRUPT_EXITTB; >> } >> > >