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Date: Sat, 21 Feb 2015 19:25:35 -0500
From: Chris Metcalf <cmetcalf@ezchip.com>
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Subject: Re: [Qemu-devel] [PATCH] target-tilegx: Finish decoding the first
	TB block.
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To: Chen Gang S <gang.chen@sunrus.com.cn>, Richard Henderson <rth@twiddle.net>, Peter Maydell <peter.maydell@linaro.org>, Riku Voipio <riku.voipio@iki.fi>, "walt@tilera.com" <walt@tilera.com>
Cc: qemu-devel <qemu-devel@nongnu.org>

On 2/21/2015 7:25 PM, Chen Gang S wrote:
> On 2/22/15 00:33, Richard Henderson wrote:
>> >On 02/21/2015 07:31 AM, Chen Gang S wrote:
>>> >>
>>> >>  - We can still use the original pipes order: "y0, y2, y1" and "x0, x1".
>> >
>> >I guess, sure, though I don't think that'll help as much as you imagine.
>> >
>>
> OK, thanks. For me, your idea is OK, it is more simpler (although with
> more tcg temporary variables).

Richard pretty much said all I wanted to say, but I just wanted to reinforce
that the semantics of the multiple pipes is always "all together". So if you have
{ move r1, r2; move r2, r1 } then that swaps r1 and r2.  Or if you have
{ ld r1, sp; jrp r1 } then you are restoring r1 but jumping to wherever its
previous value said you needed to go.  Etc.

Similarly, if any pipeline takes an exception (a TLB fault from a memory op,
a GPV fault from an illegal mfspr, etc) then no pipeline completes its action.

-- 
Chris Metcalf, EZChip Semiconductor
http://www.ezchip.com