From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42442) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YQGbk-00054d-1M for qemu-devel@nongnu.org; Tue, 24 Feb 2015 09:37:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YQGbg-0004FV-MH for qemu-devel@nongnu.org; Tue, 24 Feb 2015 09:37:07 -0500 Received: from dfwrgout.huawei.com ([206.16.17.72]:3025) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YQGbg-0004Ea-Fr for qemu-devel@nongnu.org; Tue, 24 Feb 2015 09:37:04 -0500 Message-ID: <54EC8BE3.703@huawei.com> Date: Tue, 24 Feb 2015 15:34:11 +0100 From: Claudio Fontana MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] QEMU pci mach-virt: setting PCI_INTERRUPT_LINE? List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: "qemu-devel@nongnu.org" , Alexander Graf Hello, I am trying to set the pci interrupt line field in the configuration space (offset 0x3c), since it is initialized as zero. I would like to set it to the right value as read from the device tree, in order for other existing software which relies on it to be able to work unmodified.. but it does not seem to work (I seem to read back zero even after setting the PCI_INTERRUPT_LINE field). I am also reading the interrupt pin, but that one instead seems to work out of the box.. Thank you for any suggestion, Claudio