From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53428) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YQakn-0002qm-FS for qemu-devel@nongnu.org; Wed, 25 Feb 2015 07:07:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YQaki-0005wb-Ec for qemu-devel@nongnu.org; Wed, 25 Feb 2015 07:07:49 -0500 Received: from lhrrgout.huawei.com ([194.213.3.17]:16947) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YQaki-0005wU-5j for qemu-devel@nongnu.org; Wed, 25 Feb 2015 07:07:44 -0500 Message-ID: <54EDBB0A.7020009@huawei.com> Date: Wed, 25 Feb 2015 13:07:38 +0100 From: Claudio Fontana MIME-Version: 1.0 References: <54EC8BE3.703@huawei.com> In-Reply-To: <54EC8BE3.703@huawei.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] QEMU pci mach-virt: setting PCI_INTERRUPT_LINE? List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: "qemu-devel@nongnu.org" , Alexander Graf On 24.02.2015 15:34, Claudio Fontana wrote: > Hello, > > I am trying to set the pci interrupt line field in the configuration space > (offset 0x3c), since it is initialized as zero. > > I would like to set it to the right value as read from the device tree, > in order for other existing software which relies on it to be able to work unmodified.. > > but it does not seem to work (I seem to read back zero even after setting the PCI_INTERRUPT_LINE field). > > I am also reading the interrupt pin, but that one instead seems to work out of the box.. > > Thank you for any suggestion, > > Claudio By the way, I am currently just avoiding to rely on PCI_INTERRUPT_LINE for AArch64, but shouldn't the register be programmable? Ciao, Claudio