From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55050) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YQatD-0003Mr-M6 for qemu-devel@nongnu.org; Wed, 25 Feb 2015 07:16:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YQat8-0001EG-Au for qemu-devel@nongnu.org; Wed, 25 Feb 2015 07:16:31 -0500 Received: from lhrrgout.huawei.com ([194.213.3.17]:18655) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YQat8-0001Dl-3U for qemu-devel@nongnu.org; Wed, 25 Feb 2015 07:16:26 -0500 Message-ID: <54EDBD12.9020602@huawei.com> Date: Wed, 25 Feb 2015 13:16:18 +0100 From: Claudio Fontana MIME-Version: 1.0 References: <54EC8BE3.703@huawei.com> <54EDBB0A.7020009@huawei.com> <54EDBB56.10205@suse.de> In-Reply-To: <54EDBB56.10205@suse.de> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] QEMU pci mach-virt: setting PCI_INTERRUPT_LINE? List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf , Peter Maydell Cc: "qemu-devel@nongnu.org" On 25.02.2015 13:08, Alexander Graf wrote: > > > On 25.02.15 13:07, Claudio Fontana wrote: >> >> >> On 24.02.2015 15:34, Claudio Fontana wrote: >>> Hello, >>> >>> I am trying to set the pci interrupt line field in the configuration space >>> (offset 0x3c), since it is initialized as zero. >>> >>> I would like to set it to the right value as read from the device tree, >>> in order for other existing software which relies on it to be able to work unmodified.. >>> >>> but it does not seem to work (I seem to read back zero even after setting the PCI_INTERRUPT_LINE field). >>> >>> I am also reading the interrupt pin, but that one instead seems to work out of the box.. >>> >>> Thank you for any suggestion, >>> >>> Claudio >> >> By the way, I am currently just avoiding to rely on PCI_INTERRUPT_LINE for AArch64, >> but shouldn't the register be programmable? > > As far as I understand the register should really just be a scratch r/w > register, yeah. Are you sure you're writing in byte granularity? > > > Alex Relatively sure, yeah.. I'll check again, but at least for x86_64 the get function works. It's OSv's pci-function.cc u8 function::get_interrupt_line() { return pci_readb(PCI_CFG_INTERRUPT_LINE); } void function::set_interrupt_line(u8 irq) { pci_writeb(PCI_CFG_INTERRUPT_LINE, irq); } I'll try to debug with PCI_DEBUG and such things, see if I find out something... Ciao, Claudio -- Claudio Fontana Server Virtualization Architect Huawei Technologies Duesseldorf GmbH Riesstraße 25 - 80992 München office: +49 89 158834 4135 mobile: +49 15253060158