* [Qemu-devel] [PATCH v2] PPC: Introduce the Virtual Time Base (VTB) SPR register
@ 2015-02-26 23:19 Cyril Bur
2015-02-27 15:28 ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
0 siblings, 1 reply; 3+ messages in thread
From: Cyril Bur @ 2015-02-26 23:19 UTC (permalink / raw)
To: qemu-ppc; +Cc: qemu-devel
This patch adds basic support for the VTB.
PowerISA:
The Virtual Time Base (VTB) is a 64-bit incrementing counter.
Virtual Time Base increments at the same rate as the Time Base until its value
becomes 0xFFFF_FFFF_FFFF_FFFF (2 64 - 1); at the next increment its value
becomes 0x0000_0000_0000_0000. There is no interrupt or other indication when
this occurs.
The operation of the Virtual Time Base has the following additional
properties.
1. Loading a GPR from the Virtual Time Base has no effect on the accuracy of
the Virtual Time Base.
2. Copying the contents of a GPR to the Virtual Time Base replaces the
contents of the Virtual Time Base with the contents of the GPR.
Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com>
---
V2:
Drop the use of spr_read_vtb() and just use spr_read_tbl() as a handler for VTB
reads
Correct the permissions for user mode access of the VTB
---
target-ppc/cpu.h | 1 +
target-ppc/translate_init.c | 10 ++++++++++
2 files changed, 11 insertions(+)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index b706b9f..abc3545 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1624,6 +1624,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
#define SPR_MPC_MD_DBRAM1 (0x32A)
#define SPR_RCPU_L2U_RA3 (0x32B)
#define SPR_TAR (0x32F)
+#define SPR_VTB (0x351)
#define SPR_440_INV0 (0x370)
#define SPR_440_INV1 (0x371)
#define SPR_440_INV2 (0x372)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index df1a62c..201761e 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -873,6 +873,15 @@ static void gen_tbl (CPUPPCState *env)
0x00000000);
}
+/* Virtual Time Base */
+static void gen_spr_vtb(CPUPPCState *env)
+{
+ spr_register(env, SPR_VTB, "VTB",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_tbl, SPR_NOACCESS,
+ 0x00000000);
+}
+
/* Softare table search registers */
static void gen_6xx_7xx_soft_tlb (CPUPPCState *env, int nb_tlbs, int nb_ways)
{
@@ -7881,6 +7890,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version)
gen_spr_power8_pmu_sup(env);
gen_spr_power8_pmu_user(env);
gen_spr_power8_tm(env);
+ gen_spr_vtb(env);
}
if (version < BOOK3S_CPU_POWER8) {
gen_spr_book3s_dbg(env);
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2] PPC: Introduce the Virtual Time Base (VTB) SPR register
2015-02-26 23:19 [Qemu-devel] [PATCH v2] PPC: Introduce the Virtual Time Base (VTB) SPR register Cyril Bur
@ 2015-02-27 15:28 ` Alexander Graf
2015-02-27 21:18 ` Alexander Graf
0 siblings, 1 reply; 3+ messages in thread
From: Alexander Graf @ 2015-02-27 15:28 UTC (permalink / raw)
To: Cyril Bur, qemu-ppc; +Cc: qemu-devel
On 27.02.15 00:19, Cyril Bur wrote:
> This patch adds basic support for the VTB.
>
> PowerISA:
> The Virtual Time Base (VTB) is a 64-bit incrementing counter.
> Virtual Time Base increments at the same rate as the Time Base until its value
> becomes 0xFFFF_FFFF_FFFF_FFFF (2 64 - 1); at the next increment its value
> becomes 0x0000_0000_0000_0000. There is no interrupt or other indication when
> this occurs.
>
> The operation of the Virtual Time Base has the following additional
> properties.
> 1. Loading a GPR from the Virtual Time Base has no effect on the accuracy of
> the Virtual Time Base.
> 2. Copying the contents of a GPR to the Virtual Time Base replaces the
> contents of the Virtual Time Base with the contents of the GPR.
>
> Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com>
Thanks, applied to ppc-next.
Alex
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v2] PPC: Introduce the Virtual Time Base (VTB) SPR register
2015-02-27 15:28 ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
@ 2015-02-27 21:18 ` Alexander Graf
0 siblings, 0 replies; 3+ messages in thread
From: Alexander Graf @ 2015-02-27 21:18 UTC (permalink / raw)
To: Cyril Bur, qemu-ppc; +Cc: qemu-devel
On 27.02.15 16:28, Alexander Graf wrote:
>
>
> On 27.02.15 00:19, Cyril Bur wrote:
>> This patch adds basic support for the VTB.
>>
>> PowerISA:
>> The Virtual Time Base (VTB) is a 64-bit incrementing counter.
>> Virtual Time Base increments at the same rate as the Time Base until its value
>> becomes 0xFFFF_FFFF_FFFF_FFFF (2 64 - 1); at the next increment its value
>> becomes 0x0000_0000_0000_0000. There is no interrupt or other indication when
>> this occurs.
>>
>> The operation of the Virtual Time Base has the following additional
>> properties.
>> 1. Loading a GPR from the Virtual Time Base has no effect on the accuracy of
>> the Virtual Time Base.
>> 2. Copying the contents of a GPR to the Virtual Time Base replaces the
>> contents of the Virtual Time Base with the contents of the GPR.
>>
>> Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com>
>
> Thanks, applied to ppc-next.
Sorry, the patch breaks compilation for ppc-softmmu:
target-ppc/translate_init.c:877:13: error: ‘gen_spr_vtb’ defined but
not used [-Werror=unused-function]
Please move the definition of gen_spr_vtb to the other p8 related spr
registration functions so it only gets added when we compile for 64bit.
I've removed the patch from my queue again.
Alex
^ permalink raw reply [flat|nested] 3+ messages in thread
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2015-02-26 23:19 [Qemu-devel] [PATCH v2] PPC: Introduce the Virtual Time Base (VTB) SPR register Cyril Bur
2015-02-27 15:28 ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2015-02-27 21:18 ` Alexander Graf
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