From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37473) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YSUUZ-0006OW-GA for qemu-devel@nongnu.org; Mon, 02 Mar 2015 12:50:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YSUUQ-0001oy-NI for qemu-devel@nongnu.org; Mon, 02 Mar 2015 12:50:55 -0500 Received: from cantor2.suse.de ([195.135.220.15]:51396 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YSUUQ-0001oe-H4 for qemu-devel@nongnu.org; Mon, 02 Mar 2015 12:50:46 -0500 Message-ID: <54F4A2F4.1040405@suse.de> Date: Mon, 02 Mar 2015 18:50:44 +0100 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1424986952-18579-1-git-send-email-ehabkost@redhat.com> <1424986952-18579-5-git-send-email-ehabkost@redhat.com> In-Reply-To: <1424986952-18579-5-git-send-email-ehabkost@redhat.com> Content-Type: text/plain; charset=iso-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v3 4/5] target-i386: Require APIC ID to be explicitly set before CPU realize List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost , qemu-devel@nongnu.org Cc: Gu Zheng , Igor Mammedov , Paolo Bonzini Am 26.02.2015 um 22:42 schrieb Eduardo Habkost: > Instead of setting APIC ID automatically when creating a X86CPU, requir= e > the property to be set before realizing the object (which all callers o= f > cpu_x86_create() already do). >=20 > Reviewed-by: Paolo Bonzini > Signed-off-by: Eduardo Habkost > --- > target-i386/cpu-qom.h | 2 +- > target-i386/cpu.c | 7 ++++++- > 2 files changed, 7 insertions(+), 2 deletions(-) >=20 > diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h > index 4a6f48a..31a0c1e 100644 > --- a/target-i386/cpu-qom.h > +++ b/target-i386/cpu-qom.h > @@ -93,7 +93,7 @@ typedef struct X86CPU { > bool expose_kvm; > bool migratable; > bool host_features; > - uint32_t apic_id; > + int64_t apic_id; > =20 > /* if true the CPUID code directly forward host cache leaves to th= e guest */ > bool cache_info_passthrough; > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index c4a96b6..9819c47 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -2786,6 +2786,11 @@ static void x86_cpu_realizefn(DeviceState *dev, = Error **errp) > Error *local_err =3D NULL; > static bool ht_warned; > =20 > + if (cpu->apic_id < 0) { Since you were setting it immediately before setting realized=3Dtrue, #ifdef CONFIG_USER_ONLY cpu->apic_id =3D cs->cpu_index; #else > + error_setg(errp, "apic-id property was not initialized properl= y"); > + return; #endif would keep any x86-specific logic out of cpu_init(). Regards, Andreas > + } > + > if (env->features[FEAT_7_0_EBX] && env->cpuid_level < 7) { > env->cpuid_level =3D 7; > } > @@ -2929,7 +2934,7 @@ static void x86_cpu_initfn(Object *obj) > NULL, NULL, (void *)cpu->filtered_features, NU= LL); > =20 > cpu->hyperv_spinlock_attempts =3D HYPERV_SPINLOCK_NEVER_RETRY; > - cpu->apic_id =3D x86_cpu_apic_id_from_index(cs->cpu_index); > + cpu->apic_id =3D -1; > =20 > x86_cpu_load_def(cpu, xcc->cpu_def, &error_abort); > =20 --=20 SUSE Linux GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Felix Imend=F6rffer, Jane Smithard, Jennifer Guild, Dilip Upmanyu, Graham Norton; HRB 21284 (AG N=FCrnberg)