* [Qemu-devel] [PATCH v4 01/10] cpu/apic: drop icc bus/bridge/
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
@ 2015-02-13 10:25 ` Zhu Guihua
2015-03-05 18:17 ` Eduardo Habkost
2015-03-06 9:35 ` Igor Mammedov
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 02/10] icc_bus: remove icc related files Zhu Guihua
` (10 subsequent siblings)
11 siblings, 2 replies; 26+ messages in thread
From: Zhu Guihua @ 2015-02-13 10:25 UTC (permalink / raw)
To: qemu-devel
Cc: Zhu Guihua, tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar,
chen.fan.fnst, imammedo, afaerber
From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
ICC bus was invented only to provide hotplug capability to
CPU and APIC because at the time being hotplug was available only for
BUS attached devices.
Now this patch is to drop ICC bus impl, and switch to bus-less
CPU+APIC hotplug, handling them in the same manner as pc-dimm.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
---
hw/i386/kvm/apic.c | 10 ++++++++--
hw/i386/pc.c | 21 +++++----------------
hw/i386/pc_piix.c | 9 +--------
hw/i386/pc_q35.c | 9 +--------
hw/intc/apic.c | 16 +++++++++++-----
hw/intc/apic_common.c | 14 +++++++++-----
include/hw/i386/apic_internal.h | 6 ++----
include/hw/i386/pc.h | 3 ++-
target-i386/cpu.c | 19 +++----------------
target-i386/cpu.h | 3 +--
10 files changed, 43 insertions(+), 67 deletions(-)
diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
index 5b47056..4b7ce57 100644
--- a/hw/i386/kvm/apic.c
+++ b/hw/i386/kvm/apic.c
@@ -10,6 +10,7 @@
* See the COPYING file in the top-level directory.
*/
#include "hw/i386/apic_internal.h"
+#include "hw/i386/pc.h"
#include "hw/pci/msi.h"
#include "sysemu/kvm.h"
@@ -180,9 +181,14 @@ static void kvm_apic_reset(APICCommonState *s)
static void kvm_apic_realize(DeviceState *dev, Error **errp)
{
APICCommonState *s = APIC_COMMON(dev);
+ PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
+ static bool mmio_registered;
- memory_region_init_io(&s->io_memory, NULL, &kvm_apic_io_ops, s, "kvm-apic-msi",
- APIC_SPACE_SIZE);
+ if (!mmio_registered) {
+ memory_region_init_io(&pcms->apic_mmio, NULL, &kvm_apic_io_ops, s,
+ "kvm-apic-msi", APIC_SPACE_SIZE);
+ mmio_registered = true;
+ }
if (kvm_has_gsi_routing()) {
msi_supported = true;
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index c7af6aa..500d369 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -54,7 +54,6 @@
#include "qemu/config-file.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi/cpu_hotplug.h"
-#include "hw/cpu/icc_bus.h"
#include "hw/boards.h"
#include "hw/pci/pci_host.h"
#include "acpi-build.h"
@@ -954,12 +953,12 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
}
static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id,
- DeviceState *icc_bridge, Error **errp)
+ Error **errp)
{
X86CPU *cpu;
Error *local_err = NULL;
- cpu = cpu_x86_create(cpu_model, icc_bridge, &local_err);
+ cpu = cpu_x86_create(cpu_model, &local_err);
if (local_err != NULL) {
error_propagate(errp, local_err);
return NULL;
@@ -980,7 +979,6 @@ static const char *current_cpu_model;
void pc_hot_add_cpu(const int64_t id, Error **errp)
{
- DeviceState *icc_bridge;
int64_t apic_id = x86_cpu_apic_id_from_index(id);
if (id < 0) {
@@ -1007,12 +1005,10 @@ void pc_hot_add_cpu(const int64_t id, Error **errp)
return;
}
- icc_bridge = DEVICE(object_resolve_path_type("icc-bridge",
- TYPE_ICC_BRIDGE, NULL));
- pc_new_cpu(current_cpu_model, apic_id, icc_bridge, errp);
+ pc_new_cpu(current_cpu_model, apic_id, errp);
}
-void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
+void pc_cpus_init(const char *cpu_model)
{
int i;
X86CPU *cpu = NULL;
@@ -1038,7 +1034,7 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
for (i = 0; i < smp_cpus; i++) {
cpu = pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i),
- icc_bridge, &error);
+ &error);
if (error) {
error_report("%s", error_get_pretty(error));
error_free(error);
@@ -1046,13 +1042,6 @@ void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
}
}
- /* map APIC MMIO area if CPU has APIC */
- if (cpu && cpu->apic_state) {
- /* XXX: what if the base changes? */
- sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
- APIC_DEFAULT_ADDRESS, 0x1000);
- }
-
/* tell smbios about cpuid version and features */
smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
}
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 38b42b0..7a581f2 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -39,7 +39,6 @@
#include "hw/kvm/clock.h"
#include "sysemu/sysemu.h"
#include "hw/sysbus.h"
-#include "hw/cpu/icc_bus.h"
#include "sysemu/arch_init.h"
#include "sysemu/block-backend.h"
#include "hw/i2c/smbus.h"
@@ -97,7 +96,6 @@ static void pc_init1(MachineState *machine,
MemoryRegion *ram_memory;
MemoryRegion *pci_memory;
MemoryRegion *rom_memory;
- DeviceState *icc_bridge;
FWCfgState *fw_cfg = NULL;
PcGuestInfo *guest_info;
ram_addr_t lowmem;
@@ -142,11 +140,7 @@ static void pc_init1(MachineState *machine,
exit(1);
}
- icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE);
- object_property_add_child(qdev_get_machine(), "icc-bridge",
- OBJECT(icc_bridge), NULL);
-
- pc_cpus_init(machine->cpu_model, icc_bridge);
+ pc_cpus_init(machine->cpu_model);
if (kvm_enabled() && kvmclock_enabled) {
kvmclock_create();
@@ -228,7 +222,6 @@ static void pc_init1(MachineState *machine,
if (pci_enabled) {
ioapic_init_gsi(gsi_state, "i440fx");
}
- qdev_init_nofail(icc_bridge);
pc_register_ferr_irq(gsi[13]);
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 63027ee..baceafb 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -43,7 +43,6 @@
#include "hw/ide/pci.h"
#include "hw/ide/ahci.h"
#include "hw/usb.h"
-#include "hw/cpu/icc_bus.h"
#include "qemu/error-report.h"
/* ICH9 AHCI has 6 ports */
@@ -84,7 +83,6 @@ static void pc_q35_init(MachineState *machine)
int i;
ICH9LPCState *ich9_lpc;
PCIDevice *ahci;
- DeviceState *icc_bridge;
PcGuestInfo *guest_info;
ram_addr_t lowmem;
DriveInfo *hd[MAX_SATA_PORTS];
@@ -131,11 +129,7 @@ static void pc_q35_init(MachineState *machine)
exit(1);
}
- icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE);
- object_property_add_child(qdev_get_machine(), "icc-bridge",
- OBJECT(icc_bridge), NULL);
-
- pc_cpus_init(machine->cpu_model, icc_bridge);
+ pc_cpus_init(machine->cpu_model);
pc_acpi_init("q35-acpi-dsdt.aml");
kvmclock_create();
@@ -238,7 +232,6 @@ static void pc_q35_init(MachineState *machine)
if (pci_enabled) {
ioapic_init_gsi(gsi_state, "q35");
}
- qdev_init_nofail(icc_bridge);
pc_register_ferr_irq(gsi[13]);
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 0f97b47..e48974f 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -376,7 +376,8 @@ static void apic_update_irq(APICCommonState *s)
cpu_interrupt(cpu, CPU_INTERRUPT_POLL);
} else if (apic_irq_pending(s) > 0) {
cpu_interrupt(cpu, CPU_INTERRUPT_HARD);
- } else if (!apic_accept_pic_intr(&s->busdev.qdev) || !pic_get_output(isa_pic)) {
+ } else if (!apic_accept_pic_intr(s->cpu->apic_state) ||
+ !pic_get_output(isa_pic)) {
cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD);
}
}
@@ -549,10 +550,10 @@ static void apic_deliver(DeviceState *dev, uint8_t dest, uint8_t dest_mode,
static bool apic_check_pic(APICCommonState *s)
{
- if (!apic_accept_pic_intr(&s->busdev.qdev) || !pic_get_output(isa_pic)) {
+ if (!apic_accept_pic_intr(s->cpu->apic_state) || !pic_get_output(isa_pic)) {
return false;
}
- apic_deliver_pic_intr(&s->busdev.qdev, 1);
+ apic_deliver_pic_intr(s->cpu->apic_state, 1);
return true;
}
@@ -879,9 +880,14 @@ static const MemoryRegionOps apic_io_ops = {
static void apic_realize(DeviceState *dev, Error **errp)
{
APICCommonState *s = APIC_COMMON(dev);
+ PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
+ static bool mmio_registered;
- memory_region_init_io(&s->io_memory, OBJECT(s), &apic_io_ops, s, "apic-msi",
- APIC_SPACE_SIZE);
+ if (!mmio_registered) {
+ memory_region_init_io(&pcms->apic_mmio, OBJECT(s), &apic_io_ops, s,
+ "apic-msi", APIC_SPACE_SIZE);
+ mmio_registered = true;
+ }
s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, apic_timer, s);
local_apics[s->idx] = s;
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 0858b45..bfaebe2 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -19,6 +19,7 @@
*/
#include "hw/i386/apic.h"
#include "hw/i386/apic_internal.h"
+#include "hw/i386/pc.h"
#include "trace.h"
#include "sysemu/kvm.h"
#include "hw/qdev.h"
@@ -302,6 +303,7 @@ static void apic_common_realize(DeviceState *dev, Error **errp)
APICCommonClass *info;
static DeviceState *vapic;
static int apic_no;
+ PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
static bool mmio_registered;
if (apic_no >= MAX_APICS) {
@@ -313,9 +315,12 @@ static void apic_common_realize(DeviceState *dev, Error **errp)
info = APIC_COMMON_GET_CLASS(s);
info->realize(dev, errp);
+
if (!mmio_registered) {
- ICCBus *b = ICC_BUS(qdev_get_parent_bus(dev));
- memory_region_add_subregion(b->apic_address_space, 0, &s->io_memory);
+ memory_region_add_subregion_overlap(get_system_memory(),
+ APIC_DEFAULT_ADDRESS,
+ &pcms->apic_mmio,
+ 0x1000);
mmio_registered = true;
}
@@ -433,13 +438,12 @@ static Property apic_properties_common[] = {
static void apic_common_class_init(ObjectClass *klass, void *data)
{
- ICCDeviceClass *idc = ICC_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_apic_common;
dc->reset = apic_reset_common;
dc->props = apic_properties_common;
- idc->realize = apic_common_realize;
+ dc->realize = apic_common_realize;
/*
* Reason: APIC and CPU need to be wired up by
* x86_cpu_apic_create()
@@ -449,7 +453,7 @@ static void apic_common_class_init(ObjectClass *klass, void *data)
static const TypeInfo apic_common_type = {
.name = TYPE_APIC_COMMON,
- .parent = TYPE_ICC_DEVICE,
+ .parent = TYPE_DEVICE,
.instance_size = sizeof(APICCommonState),
.class_size = sizeof(APICCommonClass),
.class_init = apic_common_class_init,
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index dc7a89d..0421c20 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -21,7 +21,6 @@
#define QEMU_APIC_INTERNAL_H
#include "exec/memory.h"
-#include "hw/cpu/icc_bus.h"
#include "qemu/timer.h"
/* APIC Local Vector Table */
@@ -78,7 +77,7 @@ typedef struct APICCommonState APICCommonState;
typedef struct APICCommonClass
{
- ICCDeviceClass parent_class;
+ DeviceClass parent_class;
DeviceRealize realize;
void (*set_base)(APICCommonState *s, uint64_t val);
@@ -93,9 +92,8 @@ typedef struct APICCommonClass
} APICCommonClass;
struct APICCommonState {
- ICCDevice busdev;
+ DeviceState parent;
- MemoryRegion io_memory;
X86CPU *cpu;
uint32_t apicbase;
uint8_t id;
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 69d9cf8..ce0143c 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -34,6 +34,7 @@ struct PCMachineState {
/* <public> */
ram_addr_t hotplug_memory_base;
MemoryRegion hotplug_memory;
+ MemoryRegion apic_mmio;
HotplugHandler *acpi_dev;
ISADevice *rtc;
@@ -177,7 +178,7 @@ extern int fd_bootchk;
void pc_register_ferr_irq(qemu_irq irq);
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
-void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
+void pc_cpus_init(const char *cpu_model);
void pc_hot_add_cpu(const int64_t id, Error **errp);
void pc_acpi_init(const char *default_dsdt);
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 3a9b32e..9e9f830 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -43,7 +43,6 @@
#include "sysemu/sysemu.h"
#include "hw/qdev-properties.h"
-#include "hw/cpu/icc_bus.h"
#ifndef CONFIG_USER_ONLY
#include "hw/xen/xen.h"
#include "hw/i386/apic_internal.h"
@@ -2091,8 +2090,7 @@ static void x86_cpu_load_def(X86CPU *cpu, X86CPUDefinition *def, Error **errp)
}
-X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge,
- Error **errp)
+X86CPU *cpu_x86_create(const char *cpu_model, Error **errp)
{
X86CPU *cpu = NULL;
X86CPUClass *xcc;
@@ -2123,15 +2121,6 @@ X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge,
cpu = X86_CPU(object_new(object_class_get_name(oc)));
-#ifndef CONFIG_USER_ONLY
- if (icc_bridge == NULL) {
- error_setg(&error, "Invalid icc-bridge value");
- goto out;
- }
- qdev_set_parent_bus(DEVICE(cpu), qdev_get_child_bus(icc_bridge, "icc"));
- object_unref(OBJECT(cpu));
-#endif
-
x86_cpu_parse_featurestr(CPU(cpu), features, &error);
if (error) {
goto out;
@@ -2154,7 +2143,7 @@ X86CPU *cpu_x86_init(const char *cpu_model)
Error *error = NULL;
X86CPU *cpu;
- cpu = cpu_x86_create(cpu_model, NULL, &error);
+ cpu = cpu_x86_create(cpu_model, &error);
if (error) {
goto out;
}
@@ -2723,7 +2712,6 @@ static void mce_init(X86CPU *cpu)
static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
{
CPUX86State *env = &cpu->env;
- DeviceState *dev = DEVICE(cpu);
APICCommonState *apic;
const char *apic_type = "apic";
@@ -2733,7 +2721,7 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
apic_type = "xen-apic";
}
- cpu->apic_state = qdev_try_create(qdev_get_parent_bus(dev), apic_type);
+ cpu->apic_state = qdev_try_create(NULL, apic_type);
if (cpu->apic_state == NULL) {
error_setg(errp, "APIC device '%s' could not be created", apic_type);
return;
@@ -3004,7 +2992,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
xcc->parent_realize = dc->realize;
dc->realize = x86_cpu_realizefn;
- dc->bus_type = TYPE_ICC_BUS;
dc->props = x86_cpu_properties;
xcc->parent_reset = cc->reset;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 478450c..f4711ba 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -983,8 +983,7 @@ typedef struct CPUX86State {
#include "cpu-qom.h"
X86CPU *cpu_x86_init(const char *cpu_model);
-X86CPU *cpu_x86_create(const char *cpu_model, DeviceState *icc_bridge,
- Error **errp);
+X86CPU *cpu_x86_create(const char *cpu_model, Error **errp);
int cpu_x86_exec(CPUX86State *s);
void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf);
void x86_cpudef_setup(void);
--
1.9.3
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v4 01/10] cpu/apic: drop icc bus/bridge/
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 01/10] cpu/apic: drop icc bus/bridge/ Zhu Guihua
@ 2015-03-05 18:17 ` Eduardo Habkost
2015-03-06 3:10 ` Chen Fan
2015-03-06 9:35 ` Igor Mammedov
1 sibling, 1 reply; 26+ messages in thread
From: Eduardo Habkost @ 2015-03-05 18:17 UTC (permalink / raw)
To: Zhu Guihua
Cc: qemu-devel, tangchen, chen.fan.fnst, isimatu.yasuaki, imammedo,
guz.fnst, anshul.makkar, afaerber
On Fri, Feb 13, 2015 at 06:25:24PM +0800, Zhu Guihua wrote:
> From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
>
> ICC bus was invented only to provide hotplug capability to
> CPU and APIC because at the time being hotplug was available only for
> BUS attached devices.
>
> Now this patch is to drop ICC bus impl, and switch to bus-less
> CPU+APIC hotplug, handling them in the same manner as pc-dimm.
>
> Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
> Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
> ---
> hw/i386/kvm/apic.c | 10 ++++++++--
> hw/i386/pc.c | 21 +++++----------------
> hw/i386/pc_piix.c | 9 +--------
> hw/i386/pc_q35.c | 9 +--------
> hw/intc/apic.c | 16 +++++++++++-----
> hw/intc/apic_common.c | 14 +++++++++-----
> include/hw/i386/apic_internal.h | 6 ++----
> include/hw/i386/pc.h | 3 ++-
> target-i386/cpu.c | 19 +++----------------
> target-i386/cpu.h | 3 +--
> 10 files changed, 43 insertions(+), 67 deletions(-)
What about hw/i386/xen/xen_apic.c:xen_apic_realize()?
$ make
CC x86_64-softmmu/hw/i386/xen/xen_apic.o
/home/ehabkost/rh/proj/virt/qemu/hw/i386/xen/xen_apic.c: In function ‘xen_apic_realize’:
/home/ehabkost/rh/proj/virt/qemu/hw/i386/xen/xen_apic.c:44:29: error: ‘APICCommonState’ has no member named ‘io_memory’
memory_region_init_io(&s->io_memory, OBJECT(s), &xen_apic_io_ops, s,
^
/home/ehabkost/rh/proj/virt/qemu/rules.mak:57: recipe for target 'hw/i386/xen/xen_apic.o' failed
make[1]: *** [hw/i386/xen/xen_apic.o] Error 1
Makefile:169: recipe for target 'subdir-x86_64-softmmu' failed
make: *** [subdir-x86_64-softmmu] Error 2
--
Eduardo
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v4 01/10] cpu/apic: drop icc bus/bridge/
2015-03-05 18:17 ` Eduardo Habkost
@ 2015-03-06 3:10 ` Chen Fan
0 siblings, 0 replies; 26+ messages in thread
From: Chen Fan @ 2015-03-06 3:10 UTC (permalink / raw)
To: Eduardo Habkost, Zhu Guihua
Cc: qemu-devel, tangchen, isimatu.yasuaki, imammedo, guz.fnst,
anshul.makkar, afaerber
On 03/06/2015 02:17 AM, Eduardo Habkost wrote:
> On Fri, Feb 13, 2015 at 06:25:24PM +0800, Zhu Guihua wrote:
>> From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
>>
>> ICC bus was invented only to provide hotplug capability to
>> CPU and APIC because at the time being hotplug was available only for
>> BUS attached devices.
>>
>> Now this patch is to drop ICC bus impl, and switch to bus-less
>> CPU+APIC hotplug, handling them in the same manner as pc-dimm.
>>
>> Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
>> Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
>> ---
>> hw/i386/kvm/apic.c | 10 ++++++++--
>> hw/i386/pc.c | 21 +++++----------------
>> hw/i386/pc_piix.c | 9 +--------
>> hw/i386/pc_q35.c | 9 +--------
>> hw/intc/apic.c | 16 +++++++++++-----
>> hw/intc/apic_common.c | 14 +++++++++-----
>> include/hw/i386/apic_internal.h | 6 ++----
>> include/hw/i386/pc.h | 3 ++-
>> target-i386/cpu.c | 19 +++----------------
>> target-i386/cpu.h | 3 +--
>> 10 files changed, 43 insertions(+), 67 deletions(-)
> What about hw/i386/xen/xen_apic.c:xen_apic_realize()?
>
> $ make
> CC x86_64-softmmu/hw/i386/xen/xen_apic.o
> /home/ehabkost/rh/proj/virt/qemu/hw/i386/xen/xen_apic.c: In function ‘xen_apic_realize’:
> /home/ehabkost/rh/proj/virt/qemu/hw/i386/xen/xen_apic.c:44:29: error: ‘APICCommonState’ has no member named ‘io_memory’
> memory_region_init_io(&s->io_memory, OBJECT(s), &xen_apic_io_ops, s,
> ^
> /home/ehabkost/rh/proj/virt/qemu/rules.mak:57: recipe for target 'hw/i386/xen/xen_apic.o' failed
> make[1]: *** [hw/i386/xen/xen_apic.o] Error 1
> Makefile:169: recipe for target 'subdir-x86_64-softmmu' failed
> make: *** [subdir-x86_64-softmmu] Error 2
Oh, I'm sorry for that, because no xen platform environment. we forgot
xen ;). so
I want to fix it and rebase our patches under your x86 tree.
Thanks,
Chen
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Qemu-devel] [PATCH v4 01/10] cpu/apic: drop icc bus/bridge/
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 01/10] cpu/apic: drop icc bus/bridge/ Zhu Guihua
2015-03-05 18:17 ` Eduardo Habkost
@ 2015-03-06 9:35 ` Igor Mammedov
1 sibling, 0 replies; 26+ messages in thread
From: Igor Mammedov @ 2015-03-06 9:35 UTC (permalink / raw)
To: Zhu Guihua
Cc: qemu-devel, tangchen, chen.fan.fnst, isimatu.yasuaki, guz.fnst,
anshul.makkar, afaerber
On Fri, 13 Feb 2015 18:25:24 +0800
Zhu Guihua <zhugh.fnst@cn.fujitsu.com> wrote:
> From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
>
> ICC bus was invented only to provide hotplug capability to
> CPU and APIC because at the time being hotplug was available only for
> BUS attached devices.
>
> Now this patch is to drop ICC bus impl, and switch to bus-less
> CPU+APIC hotplug, handling them in the same manner as pc-dimm.
>
> Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
> Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
> ---
> hw/i386/kvm/apic.c | 10 ++++++++--
> hw/i386/pc.c | 21 +++++----------------
> hw/i386/pc_piix.c | 9 +--------
> hw/i386/pc_q35.c | 9 +--------
> hw/intc/apic.c | 16 +++++++++++-----
> hw/intc/apic_common.c | 14 +++++++++-----
> include/hw/i386/apic_internal.h | 6 ++----
> include/hw/i386/pc.h | 3 ++-
> target-i386/cpu.c | 19 +++----------------
> target-i386/cpu.h | 3 +--
> 10 files changed, 43 insertions(+), 67 deletions(-)
>
> diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
> index 5b47056..4b7ce57 100644
> --- a/hw/i386/kvm/apic.c
> +++ b/hw/i386/kvm/apic.c
> @@ -10,6 +10,7 @@
> * See the COPYING file in the top-level directory.
> */
> #include "hw/i386/apic_internal.h"
> +#include "hw/i386/pc.h"
> #include "hw/pci/msi.h"
> #include "sysemu/kvm.h"
>
> @@ -180,9 +181,14 @@ static void kvm_apic_reset(APICCommonState *s)
> static void kvm_apic_realize(DeviceState *dev, Error **errp)
> {
> APICCommonState *s = APIC_COMMON(dev);
> + PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
> + static bool mmio_registered;
>
> - memory_region_init_io(&s->io_memory, NULL, &kvm_apic_io_ops, s, "kvm-apic-msi",
> - APIC_SPACE_SIZE);
> + if (!mmio_registered) {
> + memory_region_init_io(&pcms->apic_mmio, NULL, &kvm_apic_io_ops, s,
> + "kvm-apic-msi", APIC_SPACE_SIZE);
APIC shouldn't access MachineState let alone modify it,
so keep io_memory in APICCommonState and export method something like:
apic_register_mmio(AddressSpace *as, hwaddr addr);
and use it in pc_machine_device_plug_cb()
but it would be better to use per CPU AddressSpace added by 09daed848c
if it works with KVM. Then you could map APIC into it x86_cpu_realize().
^ permalink raw reply [flat|nested] 26+ messages in thread
* [Qemu-devel] [PATCH v4 02/10] icc_bus: remove icc related files
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 01/10] cpu/apic: drop icc bus/bridge/ Zhu Guihua
@ 2015-02-13 10:25 ` Zhu Guihua
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 03/10] cpu: introduce CpuTopoInfo structure for argument simplification Zhu Guihua
` (9 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Zhu Guihua @ 2015-02-13 10:25 UTC (permalink / raw)
To: qemu-devel
Cc: Zhu Guihua, tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar,
chen.fan.fnst, imammedo, afaerber
From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
ICC bus impl has been droped, so all icc related files are not useful
any more; delete them.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
---
MAINTAINERS | 6 --
default-configs/i386-softmmu.mak | 1 -
default-configs/x86_64-softmmu.mak | 1 -
hw/cpu/Makefile.objs | 2 -
hw/cpu/icc_bus.c | 118 -------------------------------------
include/hw/cpu/icc_bus.h | 82 --------------------------
6 files changed, 210 deletions(-)
delete mode 100644 hw/cpu/icc_bus.c
delete mode 100644 include/hw/cpu/icc_bus.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 8c06739..8ad08d0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -795,12 +795,6 @@ F: qom/cpu.c
F: include/qom/cpu.h
F: target-i386/cpu.c
-ICC Bus
-M: Igor Mammedov <imammedo@redhat.com>
-S: Supported
-F: include/hw/cpu/icc_bus.h
-F: hw/cpu/icc_bus.c
-
Device Tree
M: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
M: Alexander Graf <agraf@suse.de>
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index 8e08841..e433da5 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -42,6 +42,5 @@ CONFIG_LPC_ICH9=y
CONFIG_PCI_Q35=y
CONFIG_APIC=y
CONFIG_IOAPIC=y
-CONFIG_ICC_BUS=y
CONFIG_PVPANIC=y
CONFIG_MEM_HOTPLUG=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index 66557ac..4f76d41 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -42,6 +42,5 @@ CONFIG_LPC_ICH9=y
CONFIG_PCI_Q35=y
CONFIG_APIC=y
CONFIG_IOAPIC=y
-CONFIG_ICC_BUS=y
CONFIG_PVPANIC=y
CONFIG_MEM_HOTPLUG=y
diff --git a/hw/cpu/Makefile.objs b/hw/cpu/Makefile.objs
index 6381238..193e489 100644
--- a/hw/cpu/Makefile.objs
+++ b/hw/cpu/Makefile.objs
@@ -2,5 +2,3 @@ obj-$(CONFIG_ARM11MPCORE) += arm11mpcore.o
obj-$(CONFIG_REALVIEW) += realview_mpcore.o
obj-$(CONFIG_A9MPCORE) += a9mpcore.o
obj-$(CONFIG_A15MPCORE) += a15mpcore.o
-obj-$(CONFIG_ICC_BUS) += icc_bus.o
-
diff --git a/hw/cpu/icc_bus.c b/hw/cpu/icc_bus.c
deleted file mode 100644
index 6646ea2..0000000
--- a/hw/cpu/icc_bus.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/* icc_bus.c
- * emulate x86 ICC (Interrupt Controller Communications) bus
- *
- * Copyright (c) 2013 Red Hat, Inc
- *
- * Authors:
- * Igor Mammedov <imammedo@redhat.com>
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, see <http://www.gnu.org/licenses/>
- */
-#include "hw/cpu/icc_bus.h"
-#include "hw/sysbus.h"
-
-/* icc-bridge implementation */
-
-static const TypeInfo icc_bus_info = {
- .name = TYPE_ICC_BUS,
- .parent = TYPE_BUS,
- .instance_size = sizeof(ICCBus),
-};
-
-
-/* icc-device implementation */
-
-static void icc_device_realize(DeviceState *dev, Error **errp)
-{
- ICCDeviceClass *idc = ICC_DEVICE_GET_CLASS(dev);
-
- /* convert to QOM */
- if (idc->realize) {
- idc->realize(dev, errp);
- }
-
-}
-
-static void icc_device_class_init(ObjectClass *oc, void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(oc);
-
- dc->realize = icc_device_realize;
- dc->bus_type = TYPE_ICC_BUS;
-}
-
-static const TypeInfo icc_device_info = {
- .name = TYPE_ICC_DEVICE,
- .parent = TYPE_DEVICE,
- .abstract = true,
- .instance_size = sizeof(ICCDevice),
- .class_size = sizeof(ICCDeviceClass),
- .class_init = icc_device_class_init,
-};
-
-
-/* icc-bridge implementation */
-
-typedef struct ICCBridgeState {
- /*< private >*/
- SysBusDevice parent_obj;
- /*< public >*/
-
- ICCBus icc_bus;
- MemoryRegion apic_container;
-} ICCBridgeState;
-
-#define ICC_BRIDGE(obj) OBJECT_CHECK(ICCBridgeState, (obj), TYPE_ICC_BRIDGE)
-
-static void icc_bridge_init(Object *obj)
-{
- ICCBridgeState *s = ICC_BRIDGE(obj);
- SysBusDevice *sb = SYS_BUS_DEVICE(obj);
-
- qbus_create_inplace(&s->icc_bus, sizeof(s->icc_bus), TYPE_ICC_BUS,
- DEVICE(s), "icc");
-
- /* Do not change order of registering regions,
- * APIC must be first registered region, board maps it by 0 index
- */
- memory_region_init(&s->apic_container, obj, "icc-apic-container",
- APIC_SPACE_SIZE);
- sysbus_init_mmio(sb, &s->apic_container);
- s->icc_bus.apic_address_space = &s->apic_container;
-}
-
-static void icc_bridge_class_init(ObjectClass *oc, void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(oc);
-
- set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
-}
-
-static const TypeInfo icc_bridge_info = {
- .name = TYPE_ICC_BRIDGE,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_init = icc_bridge_init,
- .instance_size = sizeof(ICCBridgeState),
- .class_init = icc_bridge_class_init,
-};
-
-
-static void icc_bus_register_types(void)
-{
- type_register_static(&icc_bus_info);
- type_register_static(&icc_device_info);
- type_register_static(&icc_bridge_info);
-}
-
-type_init(icc_bus_register_types)
diff --git a/include/hw/cpu/icc_bus.h b/include/hw/cpu/icc_bus.h
deleted file mode 100644
index 98a979f..0000000
--- a/include/hw/cpu/icc_bus.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/* icc_bus.h
- * emulate x86 ICC (Interrupt Controller Communications) bus
- *
- * Copyright (c) 2013 Red Hat, Inc
- *
- * Authors:
- * Igor Mammedov <imammedo@redhat.com>
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, see <http://www.gnu.org/licenses/>
- */
-#ifndef ICC_BUS_H
-#define ICC_BUS_H
-
-#include "exec/memory.h"
-#include "hw/qdev-core.h"
-
-#define TYPE_ICC_BUS "icc-bus"
-
-#ifndef CONFIG_USER_ONLY
-
-/**
- * ICCBus:
- *
- * ICC bus
- */
-typedef struct ICCBus {
- /*< private >*/
- BusState parent_obj;
- /*< public >*/
-
- MemoryRegion *apic_address_space;
-} ICCBus;
-
-#define ICC_BUS(obj) OBJECT_CHECK(ICCBus, (obj), TYPE_ICC_BUS)
-
-/**
- * ICCDevice:
- *
- * ICC device
- */
-typedef struct ICCDevice {
- /*< private >*/
- DeviceState qdev;
- /*< public >*/
-} ICCDevice;
-
-/**
- * ICCDeviceClass:
- * @init: Initialization callback for derived classes.
- *
- * ICC device class
- */
-typedef struct ICCDeviceClass {
- /*< private >*/
- DeviceClass parent_class;
- /*< public >*/
-
- DeviceRealize realize;
-} ICCDeviceClass;
-
-#define TYPE_ICC_DEVICE "icc-device"
-#define ICC_DEVICE(obj) OBJECT_CHECK(ICCDevice, (obj), TYPE_ICC_DEVICE)
-#define ICC_DEVICE_CLASS(klass) \
- OBJECT_CLASS_CHECK(ICCDeviceClass, (klass), TYPE_ICC_DEVICE)
-#define ICC_DEVICE_GET_CLASS(obj) \
- OBJECT_GET_CLASS(ICCDeviceClass, (obj), TYPE_ICC_DEVICE)
-
-#define TYPE_ICC_BRIDGE "icc-bridge"
-
-#endif /* CONFIG_USER_ONLY */
-#endif
--
1.9.3
^ permalink raw reply related [flat|nested] 26+ messages in thread* [Qemu-devel] [PATCH v4 03/10] cpu: introduce CpuTopoInfo structure for argument simplification
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 01/10] cpu/apic: drop icc bus/bridge/ Zhu Guihua
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 02/10] icc_bus: remove icc related files Zhu Guihua
@ 2015-02-13 10:25 ` Zhu Guihua
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 04/10] cpu: introduce get_compat_arch_id() method and override it for X86CPU Zhu Guihua
` (8 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Zhu Guihua @ 2015-02-13 10:25 UTC (permalink / raw)
To: qemu-devel
Cc: Zhu Guihua, tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar,
chen.fan.fnst, imammedo, afaerber
From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
---
target-i386/topology.h | 33 +++++++++++++++++----------------
1 file changed, 17 insertions(+), 16 deletions(-)
diff --git a/target-i386/topology.h b/target-i386/topology.h
index 07a6c5f..e9ff89c 100644
--- a/target-i386/topology.h
+++ b/target-i386/topology.h
@@ -47,6 +47,12 @@
*/
typedef uint32_t apic_id_t;
+typedef struct X86CPUTopoInfo {
+ unsigned pkg_id;
+ unsigned core_id;
+ unsigned smt_id;
+} X86CPUTopoInfo;
+
/* Return the bit width needed for 'count' IDs
*/
static unsigned apicid_bitwidth_for_count(unsigned count)
@@ -92,13 +98,11 @@ static inline unsigned apicid_pkg_offset(unsigned nr_cores, unsigned nr_threads)
*/
static inline apic_id_t apicid_from_topo_ids(unsigned nr_cores,
unsigned nr_threads,
- unsigned pkg_id,
- unsigned core_id,
- unsigned smt_id)
+ const X86CPUTopoInfo *topo)
{
- return (pkg_id << apicid_pkg_offset(nr_cores, nr_threads)) |
- (core_id << apicid_core_offset(nr_cores, nr_threads)) |
- smt_id;
+ return (topo->pkg_id << apicid_pkg_offset(nr_cores, nr_threads)) |
+ (topo->core_id << apicid_core_offset(nr_cores, nr_threads)) |
+ topo->smt_id;
}
/* Calculate thread/core/package IDs for a specific topology,
@@ -107,14 +111,12 @@ static inline apic_id_t apicid_from_topo_ids(unsigned nr_cores,
static inline void x86_topo_ids_from_idx(unsigned nr_cores,
unsigned nr_threads,
unsigned cpu_index,
- unsigned *pkg_id,
- unsigned *core_id,
- unsigned *smt_id)
+ X86CPUTopoInfo *topo)
{
unsigned core_index = cpu_index / nr_threads;
- *smt_id = cpu_index % nr_threads;
- *core_id = core_index % nr_cores;
- *pkg_id = core_index / nr_cores;
+ topo->smt_id = cpu_index % nr_threads;
+ topo->core_id = core_index % nr_cores;
+ topo->pkg_id = core_index / nr_cores;
}
/* Make APIC ID for the CPU 'cpu_index'
@@ -125,10 +127,9 @@ static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_cores,
unsigned nr_threads,
unsigned cpu_index)
{
- unsigned pkg_id, core_id, smt_id;
- x86_topo_ids_from_idx(nr_cores, nr_threads, cpu_index,
- &pkg_id, &core_id, &smt_id);
- return apicid_from_topo_ids(nr_cores, nr_threads, pkg_id, core_id, smt_id);
+ X86CPUTopoInfo topo;
+ x86_topo_ids_from_idx(nr_cores, nr_threads, cpu_index, &topo);
+ return apicid_from_topo_ids(nr_cores, nr_threads, &topo);
}
#endif /* TARGET_I386_TOPOLOGY_H */
--
1.9.3
^ permalink raw reply related [flat|nested] 26+ messages in thread* [Qemu-devel] [PATCH v4 04/10] cpu: introduce get_compat_arch_id() method and override it for X86CPU
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
` (2 preceding siblings ...)
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 03/10] cpu: introduce CpuTopoInfo structure for argument simplification Zhu Guihua
@ 2015-02-13 10:25 ` Zhu Guihua
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 05/10] qom/cpu: move register_vmstate to common CPUClass.realizefn Zhu Guihua
` (7 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Zhu Guihua @ 2015-02-13 10:25 UTC (permalink / raw)
To: qemu-devel
Cc: Zhu Guihua, tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar,
chen.fan.fnst, imammedo, afaerber
get_compat_arch_id() is introduced to handle cross version migration issue,
it is to convert new 'apic-id' to old 'cpu_index'.
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
---
include/qom/cpu.h | 3 +++
qom/cpu.c | 6 ++++++
target-i386/cpu.c | 10 ++++++++++
target-i386/topology.h | 33 +++++++++++++++++++++++++++++++++
4 files changed, 52 insertions(+)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 2098f1c..2e68dd2 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -86,6 +86,8 @@ struct TranslationBlock;
* @dump_state: Callback for dumping state.
* @dump_statistics: Callback for dumping statistics.
* @get_arch_id: Callback for getting architecture-dependent CPU ID.
+ * @get_compat_arch_id: Callback for getting compatiable architecture-dependent
+ * CPU ID.
* @get_paging_enabled: Callback for inquiring whether paging is enabled.
* @get_memory_mapping: Callback for obtaining the memory mappings.
* @set_pc: Callback for setting the Program Counter register.
@@ -130,6 +132,7 @@ typedef struct CPUClass {
void (*dump_statistics)(CPUState *cpu, FILE *f,
fprintf_function cpu_fprintf, int flags);
int64_t (*get_arch_id)(CPUState *cpu);
+ int64_t (*get_compat_arch_id)(CPUState *cpu);
bool (*get_paging_enabled)(const CPUState *cpu);
void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
Error **errp);
diff --git a/qom/cpu.c b/qom/cpu.c
index 9c68fa4..83d7766 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -321,6 +321,11 @@ static int64_t cpu_common_get_arch_id(CPUState *cpu)
return cpu->cpu_index;
}
+static int64_t cpu_common_get_compat_arch_id(CPUState *cpu)
+{
+ return cpu->cpu_index;
+}
+
static void cpu_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -330,6 +335,7 @@ static void cpu_class_init(ObjectClass *klass, void *data)
k->parse_features = cpu_common_parse_features;
k->reset = cpu_common_reset;
k->get_arch_id = cpu_common_get_arch_id;
+ k->get_compat_arch_id = cpu_common_get_compat_arch_id;
k->has_work = cpu_common_has_work;
k->get_paging_enabled = cpu_common_get_paging_enabled;
k->get_memory_mapping = cpu_common_get_memory_mapping;
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 9e9f830..25f4f54 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2931,6 +2931,15 @@ static int64_t x86_cpu_get_arch_id(CPUState *cs)
return env->cpuid_apic_id;
}
+static int64_t x86_cpu_get_compat_arch_id(CPUState *cs)
+{
+ X86CPU *cpu = X86_CPU(cs);
+ CPUX86State *env = &cpu->env;
+
+ return x86_compat_index_from_apic_id(smp_cores, smp_threads,
+ env->cpuid_apic_id);
+}
+
static bool x86_cpu_get_paging_enabled(const CPUState *cs)
{
X86CPU *cpu = X86_CPU(cs);
@@ -3009,6 +3018,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
cc->gdb_read_register = x86_cpu_gdb_read_register;
cc->gdb_write_register = x86_cpu_gdb_write_register;
cc->get_arch_id = x86_cpu_get_arch_id;
+ cc->get_compat_arch_id = x86_cpu_get_compat_arch_id;
cc->get_paging_enabled = x86_cpu_get_paging_enabled;
#ifdef CONFIG_USER_ONLY
cc->handle_mmu_fault = x86_cpu_handle_mmu_fault;
diff --git a/target-i386/topology.h b/target-i386/topology.h
index e9ff89c..6edd2c6 100644
--- a/target-i386/topology.h
+++ b/target-i386/topology.h
@@ -132,4 +132,37 @@ static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_cores,
return apicid_from_topo_ids(nr_cores, nr_threads, &topo);
}
+/* Calculate CPU topology based on CPU APIC ID.
+ * + */
+static inline void x86_topo_ids_from_apic_id(unsigned nr_cores,
+ unsigned nr_threads,
+ apic_id_t apic_id,
+ X86CPUTopoInfo *topo)
+{
+ unsigned offset_mask;
+ topo->pkg_id = apic_id >> apicid_pkg_offset(nr_cores, nr_threads);
+
+ offset_mask = (1L << apicid_pkg_offset(nr_cores, nr_threads)) - 1;
+ topo->core_id = (apic_id & offset_mask)
+ >> apicid_core_offset(nr_cores, nr_threads);
+
+ offset_mask = (1L << apicid_core_offset(nr_cores, nr_threads)) - 1;
+ topo->smt_id = apic_id & offset_mask;
+}
+
+/* Caculate CPU compat index based on CPU APIC ID.
+ */
+static inline unsigned x86_compat_index_from_apic_id(unsigned nr_cores,
+ unsigned nr_threads,
+ apic_id_t apic_id)
+{
+ X86CPUTopoInfo topo;
+
+ x86_topo_ids_from_apic_id(nr_cores, nr_threads, apic_id, &topo);
+
+ return topo.pkg_id * nr_cores * nr_threads +
+ topo.core_id * nr_threads +
+ topo.smt_id;
+}
+
#endif /* TARGET_I386_TOPOLOGY_H */
--
1.9.3
^ permalink raw reply related [flat|nested] 26+ messages in thread* [Qemu-devel] [PATCH v4 05/10] qom/cpu: move register_vmstate to common CPUClass.realizefn
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
` (3 preceding siblings ...)
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 04/10] cpu: introduce get_compat_arch_id() method and override it for X86CPU Zhu Guihua
@ 2015-02-13 10:25 ` Zhu Guihua
2015-03-05 18:32 ` Eduardo Habkost
2015-03-06 8:53 ` Igor Mammedov
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 06/10] qom/cpu: move apic vmstate register into x86_cpu_apic_realize Zhu Guihua
` (6 subsequent siblings)
11 siblings, 2 replies; 26+ messages in thread
From: Zhu Guihua @ 2015-02-13 10:25 UTC (permalink / raw)
To: qemu-devel
Cc: Zhu Guihua, tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar,
chen.fan.fnst, imammedo, afaerber
From: Gu Zheng <guz.fnst@cn.fujitsu.com>
Move cpu vmstate register from cpu_exec_init into cpu_common_realizefn,
and use cc->get_arch_id as the instance id that suggested by Igor to
fix the migration issue.
Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
---
exec.c | 25 ++++++++++++++++++-------
include/qom/cpu.h | 2 ++
qom/cpu.c | 4 ++++
3 files changed, 24 insertions(+), 7 deletions(-)
diff --git a/exec.c b/exec.c
index 6dff7bc..8361591 100644
--- a/exec.c
+++ b/exec.c
@@ -513,10 +513,26 @@ void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as)
}
#endif
+void cpu_vmstate_register(CPUState *cpu)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+ int cpu_index = cc->get_arch_id(cpu) + max_cpus;
+ int compat_index = cc->get_compat_arch_id(cpu);
+
+ if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
+ vmstate_register_with_alias_id(NULL, cpu_index, &vmstate_cpu_common,
+ cpu, compat_index, 3);
+ }
+
+ if (cc->vmsd != NULL) {
+ vmstate_register_with_alias_id(NULL, cpu_index, cc->vmsd,
+ cpu, compat_index, 3);
+ }
+}
+
void cpu_exec_init(CPUArchState *env)
{
CPUState *cpu = ENV_GET_CPU(env);
- CPUClass *cc = CPU_GET_CLASS(cpu);
CPUState *some_cpu;
int cpu_index;
@@ -539,18 +555,13 @@ void cpu_exec_init(CPUArchState *env)
#if defined(CONFIG_USER_ONLY)
cpu_list_unlock();
#endif
- if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
- vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu);
- }
#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
+ CPUClass *cc = CPU_GET_CLASS(cpu);
register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION,
cpu_save, cpu_load, env);
assert(cc->vmsd == NULL);
assert(qdev_get_vmsd(DEVICE(cpu)) == NULL);
#endif
- if (cc->vmsd != NULL) {
- vmstate_register(NULL, cpu_index, cc->vmsd, cpu);
- }
}
#if defined(CONFIG_USER_ONLY)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 2e68dd2..d0a50e2 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -565,6 +565,8 @@ void cpu_interrupt(CPUState *cpu, int mask);
#endif /* USER_ONLY */
+void cpu_vmstate_register(CPUState *cpu);
+
#ifdef CONFIG_SOFTMMU
static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
bool is_write, bool is_exec,
diff --git a/qom/cpu.c b/qom/cpu.c
index 83d7766..8e37045 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -302,6 +302,10 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cpu = CPU(dev);
+#if !defined(CONFIG_USER_ONLY)
+ cpu_vmstate_register(cpu);
+#endif
+
if (dev->hotplugged) {
cpu_synchronize_post_init(cpu);
cpu_resume(cpu);
--
1.9.3
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v4 05/10] qom/cpu: move register_vmstate to common CPUClass.realizefn
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 05/10] qom/cpu: move register_vmstate to common CPUClass.realizefn Zhu Guihua
@ 2015-03-05 18:32 ` Eduardo Habkost
2015-03-06 8:53 ` Igor Mammedov
1 sibling, 0 replies; 26+ messages in thread
From: Eduardo Habkost @ 2015-03-05 18:32 UTC (permalink / raw)
To: Zhu Guihua
Cc: qemu-devel, tangchen, chen.fan.fnst, isimatu.yasuaki, imammedo,
guz.fnst, anshul.makkar, afaerber
On Fri, Feb 13, 2015 at 06:25:28PM +0800, Zhu Guihua wrote:
> From: Gu Zheng <guz.fnst@cn.fujitsu.com>
>
> Move cpu vmstate register from cpu_exec_init into cpu_common_realizefn,
> and use cc->get_arch_id as the instance id that suggested by Igor to
> fix the migration issue.
If you are implementing something new, please do that in a separate patch,
either before or after moving the code. Makes it easier to review and easier to
revert in case something goes wrong.
See two additional issues below:
>
> Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
> Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
> ---
> exec.c | 25 ++++++++++++++++++-------
> include/qom/cpu.h | 2 ++
> qom/cpu.c | 4 ++++
> 3 files changed, 24 insertions(+), 7 deletions(-)
>
> diff --git a/exec.c b/exec.c
> index 6dff7bc..8361591 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -513,10 +513,26 @@ void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as)
> }
> #endif
>
> +void cpu_vmstate_register(CPUState *cpu)
> +{
> + CPUClass *cc = CPU_GET_CLASS(cpu);
> + int cpu_index = cc->get_arch_id(cpu) + max_cpus;
Breaks linux-user build:
LINK x86_64-linux-user/qemu-x86_64
exec.o: In function `cpu_vmstate_register':
/home/ehabkost/rh/proj/virt/qemu/exec.c:533: undefined reference to `max_cpus'
collect2: error: ld returned 1 exit status
Makefile:182: recipe for target 'qemu-x86_64' failed
make[1]: *** [qemu-x86_64] Error 1
Makefile:169: recipe for target 'subdir-x86_64-linux-user' failed
make: *** [subdir-x86_64-linux-user] Error 2
> + int compat_index = cc->get_compat_arch_id(cpu);
> +
> + if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
> + vmstate_register_with_alias_id(NULL, cpu_index, &vmstate_cpu_common,
> + cpu, compat_index, 3);
> + }
> +
> + if (cc->vmsd != NULL) {
> + vmstate_register_with_alias_id(NULL, cpu_index, cc->vmsd,
> + cpu, compat_index, 3);
> + }
> +}
> +
> void cpu_exec_init(CPUArchState *env)
> {
> CPUState *cpu = ENV_GET_CPU(env);
> - CPUClass *cc = CPU_GET_CLASS(cpu);
> CPUState *some_cpu;
> int cpu_index;
>
> @@ -539,18 +555,13 @@ void cpu_exec_init(CPUArchState *env)
> #if defined(CONFIG_USER_ONLY)
> cpu_list_unlock();
> #endif
> - if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
> - vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu);
> - }
> #if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
> + CPUClass *cc = CPU_GET_CLASS(cpu);
> register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION,
> cpu_save, cpu_load, env);
> assert(cc->vmsd == NULL);
> assert(qdev_get_vmsd(DEVICE(cpu)) == NULL);
> #endif
> - if (cc->vmsd != NULL) {
> - vmstate_register(NULL, cpu_index, cc->vmsd, cpu);
> - }
> }
>
> #if defined(CONFIG_USER_ONLY)
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index 2e68dd2..d0a50e2 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -565,6 +565,8 @@ void cpu_interrupt(CPUState *cpu, int mask);
>
> #endif /* USER_ONLY */
>
> +void cpu_vmstate_register(CPUState *cpu);
> +
> #ifdef CONFIG_SOFTMMU
> static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
> bool is_write, bool is_exec,
> diff --git a/qom/cpu.c b/qom/cpu.c
> index 83d7766..8e37045 100644
> --- a/qom/cpu.c
> +++ b/qom/cpu.c
> @@ -302,6 +302,10 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp)
> {
> CPUState *cpu = CPU(dev);
>
> +#if !defined(CONFIG_USER_ONLY)
> + cpu_vmstate_register(cpu);
> +#endif
CONFIG_USER_ONLY is never set on qom/cpu.c because it is target-independent
code.
Good news is that we already have vmstate stubs, so you shouldn't need any
CONFIG_USER_ONLY ifdefs around the vmstate code (but it looks like we will need
a max_cpus stub).
> +
> if (dev->hotplugged) {
> cpu_synchronize_post_init(cpu);
> cpu_resume(cpu);
> --
> 1.9.3
>
>
--
Eduardo
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v4 05/10] qom/cpu: move register_vmstate to common CPUClass.realizefn
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 05/10] qom/cpu: move register_vmstate to common CPUClass.realizefn Zhu Guihua
2015-03-05 18:32 ` Eduardo Habkost
@ 2015-03-06 8:53 ` Igor Mammedov
2015-03-06 9:31 ` Chen Fan
1 sibling, 1 reply; 26+ messages in thread
From: Igor Mammedov @ 2015-03-06 8:53 UTC (permalink / raw)
To: Zhu Guihua
Cc: qemu-devel, tangchen, chen.fan.fnst, isimatu.yasuaki, guz.fnst,
anshul.makkar, afaerber
On Fri, 13 Feb 2015 18:25:28 +0800
Zhu Guihua <zhugh.fnst@cn.fujitsu.com> wrote:
> From: Gu Zheng <guz.fnst@cn.fujitsu.com>
>
> Move cpu vmstate register from cpu_exec_init into cpu_common_realizefn,
> and use cc->get_arch_id as the instance id that suggested by Igor to
> fix the migration issue.
>
> Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
> Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
> ---
> exec.c | 25 ++++++++++++++++++-------
> include/qom/cpu.h | 2 ++
> qom/cpu.c | 4 ++++
> 3 files changed, 24 insertions(+), 7 deletions(-)
>
> diff --git a/exec.c b/exec.c
> index 6dff7bc..8361591 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -513,10 +513,26 @@ void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as)
> }
> #endif
>
> +void cpu_vmstate_register(CPUState *cpu)
> +{
> + CPUClass *cc = CPU_GET_CLASS(cpu);
> + int cpu_index = cc->get_arch_id(cpu) + max_cpus;
Why do you add max_cpus here?
> + int compat_index = cc->get_compat_arch_id(cpu);
> +
> + if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
> + vmstate_register_with_alias_id(NULL, cpu_index, &vmstate_cpu_common,
> + cpu, compat_index, 3);
> + }
> +
> + if (cc->vmsd != NULL) {
> + vmstate_register_with_alias_id(NULL, cpu_index, cc->vmsd,
> + cpu, compat_index, 3);
> + }
> +}
> +
> void cpu_exec_init(CPUArchState *env)
> {
> CPUState *cpu = ENV_GET_CPU(env);
> - CPUClass *cc = CPU_GET_CLASS(cpu);
> CPUState *some_cpu;
> int cpu_index;
>
> @@ -539,18 +555,13 @@ void cpu_exec_init(CPUArchState *env)
> #if defined(CONFIG_USER_ONLY)
> cpu_list_unlock();
> #endif
> - if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
> - vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu);
> - }
> #if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
> + CPUClass *cc = CPU_GET_CLASS(cpu);
> register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION,
> cpu_save, cpu_load, env);
> assert(cc->vmsd == NULL);
> assert(qdev_get_vmsd(DEVICE(cpu)) == NULL);
> #endif
> - if (cc->vmsd != NULL) {
> - vmstate_register(NULL, cpu_index, cc->vmsd, cpu);
> - }
> }
>
> #if defined(CONFIG_USER_ONLY)
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index 2e68dd2..d0a50e2 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -565,6 +565,8 @@ void cpu_interrupt(CPUState *cpu, int mask);
>
> #endif /* USER_ONLY */
>
> +void cpu_vmstate_register(CPUState *cpu);
> +
> #ifdef CONFIG_SOFTMMU
> static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
> bool is_write, bool is_exec,
> diff --git a/qom/cpu.c b/qom/cpu.c
> index 83d7766..8e37045 100644
> --- a/qom/cpu.c
> +++ b/qom/cpu.c
> @@ -302,6 +302,10 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp)
> {
> CPUState *cpu = CPU(dev);
>
> +#if !defined(CONFIG_USER_ONLY)
> + cpu_vmstate_register(cpu);
> +#endif
> +
> if (dev->hotplugged) {
> cpu_synchronize_post_init(cpu);
> cpu_resume(cpu);
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v4 05/10] qom/cpu: move register_vmstate to common CPUClass.realizefn
2015-03-06 8:53 ` Igor Mammedov
@ 2015-03-06 9:31 ` Chen Fan
0 siblings, 0 replies; 26+ messages in thread
From: Chen Fan @ 2015-03-06 9:31 UTC (permalink / raw)
To: Igor Mammedov, Zhu Guihua
Cc: qemu-devel, tangchen, isimatu.yasuaki, guz.fnst, anshul.makkar,
afaerber
On 03/06/2015 04:53 PM, Igor Mammedov wrote:
> On Fri, 13 Feb 2015 18:25:28 +0800
> Zhu Guihua <zhugh.fnst@cn.fujitsu.com> wrote:
>
>> From: Gu Zheng <guz.fnst@cn.fujitsu.com>
>>
>> Move cpu vmstate register from cpu_exec_init into cpu_common_realizefn,
>> and use cc->get_arch_id as the instance id that suggested by Igor to
>> fix the migration issue.
>>
>> Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
>> Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
>> ---
>> exec.c | 25 ++++++++++++++++++-------
>> include/qom/cpu.h | 2 ++
>> qom/cpu.c | 4 ++++
>> 3 files changed, 24 insertions(+), 7 deletions(-)
>>
>> diff --git a/exec.c b/exec.c
>> index 6dff7bc..8361591 100644
>> --- a/exec.c
>> +++ b/exec.c
>> @@ -513,10 +513,26 @@ void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as)
>> }
>> #endif
>>
>> +void cpu_vmstate_register(CPUState *cpu)
>> +{
>> + CPUClass *cc = CPU_GET_CLASS(cpu);
>> + int cpu_index = cc->get_arch_id(cpu) + max_cpus;
> Why do you add max_cpus here?
Adding max_cpus is to avoid cpu_index equals comat_index which would
cause migration fails, this reason is that find_se() always compares
instance_id
with se->instance_id or se->alias_id when do migration.
Thanks,
Chen
>
>> + int compat_index = cc->get_compat_arch_id(cpu);
>> +
>> + if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
>> + vmstate_register_with_alias_id(NULL, cpu_index, &vmstate_cpu_common,
>> + cpu, compat_index, 3);
>> + }
>> +
>> + if (cc->vmsd != NULL) {
>> + vmstate_register_with_alias_id(NULL, cpu_index, cc->vmsd,
>> + cpu, compat_index, 3);
>> + }
>> +}
>> +
>> void cpu_exec_init(CPUArchState *env)
>> {
>> CPUState *cpu = ENV_GET_CPU(env);
>> - CPUClass *cc = CPU_GET_CLASS(cpu);
>> CPUState *some_cpu;
>> int cpu_index;
>>
>> @@ -539,18 +555,13 @@ void cpu_exec_init(CPUArchState *env)
>> #if defined(CONFIG_USER_ONLY)
>> cpu_list_unlock();
>> #endif
>> - if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
>> - vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu);
>> - }
>> #if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
>> + CPUClass *cc = CPU_GET_CLASS(cpu);
>> register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION,
>> cpu_save, cpu_load, env);
>> assert(cc->vmsd == NULL);
>> assert(qdev_get_vmsd(DEVICE(cpu)) == NULL);
>> #endif
>> - if (cc->vmsd != NULL) {
>> - vmstate_register(NULL, cpu_index, cc->vmsd, cpu);
>> - }
>> }
>>
>> #if defined(CONFIG_USER_ONLY)
>> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
>> index 2e68dd2..d0a50e2 100644
>> --- a/include/qom/cpu.h
>> +++ b/include/qom/cpu.h
>> @@ -565,6 +565,8 @@ void cpu_interrupt(CPUState *cpu, int mask);
>>
>> #endif /* USER_ONLY */
>>
>> +void cpu_vmstate_register(CPUState *cpu);
>> +
>> #ifdef CONFIG_SOFTMMU
>> static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
>> bool is_write, bool is_exec,
>> diff --git a/qom/cpu.c b/qom/cpu.c
>> index 83d7766..8e37045 100644
>> --- a/qom/cpu.c
>> +++ b/qom/cpu.c
>> @@ -302,6 +302,10 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp)
>> {
>> CPUState *cpu = CPU(dev);
>>
>> +#if !defined(CONFIG_USER_ONLY)
>> + cpu_vmstate_register(cpu);
>> +#endif
>> +
>> if (dev->hotplugged) {
>> cpu_synchronize_post_init(cpu);
>> cpu_resume(cpu);
> .
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [Qemu-devel] [PATCH v4 06/10] qom/cpu: move apic vmstate register into x86_cpu_apic_realize
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
` (4 preceding siblings ...)
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 05/10] qom/cpu: move register_vmstate to common CPUClass.realizefn Zhu Guihua
@ 2015-02-13 10:25 ` Zhu Guihua
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 07/10] monitor: use cc->get_arch_id as the cpu index Zhu Guihua
` (5 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Zhu Guihua @ 2015-02-13 10:25 UTC (permalink / raw)
To: qemu-devel
Cc: Zhu Guihua, tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar,
chen.fan.fnst, imammedo, afaerber
From: Gu Zheng <guz.fnst@cn.fujitsu.com>
move apic vmstate register into x86_cpu_apic_realize, and use
cc->get_arch_id as the instance id to avoid using the auto-id which will
break the migration if we add device not in order.
Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
---
hw/intc/apic_common.c | 3 +--
include/hw/i386/apic_internal.h | 3 +++
target-i386/cpu.c | 10 +++++++++-
3 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index bfaebe2..3b420a6 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -387,7 +387,7 @@ static const VMStateDescription vmstate_apic_common_sipi = {
}
};
-static const VMStateDescription vmstate_apic_common = {
+const VMStateDescription vmstate_apic_common = {
.name = "apic",
.version_id = 3,
.minimum_version_id = 3,
@@ -440,7 +440,6 @@ static void apic_common_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- dc->vmsd = &vmstate_apic_common;
dc->reset = apic_reset_common;
dc->props = apic_properties_common;
dc->realize = apic_common_realize;
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 0421c20..578a616 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -22,6 +22,7 @@
#include "exec/memory.h"
#include "qemu/timer.h"
+#include "migration/vmstate.h"
/* APIC Local Vector Table */
#define APIC_LVT_TIMER 0
@@ -136,6 +137,8 @@ typedef struct VAPICState {
extern bool apic_report_tpr_access;
+extern const VMStateDescription vmstate_apic_common;
+
void apic_report_irq_delivered(int delivered);
bool apic_next_timer(APICCommonState *s, int64_t current_time);
void apic_enable_tpr_access_reporting(DeviceState *d, bool enable);
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 25f4f54..028063c 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2737,10 +2737,18 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
{
- if (cpu->apic_state == NULL) {
+ DeviceState *apic_state = cpu->apic_state;
+ CPUClass *cc = CPU_GET_CLASS(CPU(cpu));
+ int cpu_index = cc->get_arch_id(CPU(cpu)) + max_cpus;
+ int compat_index = cc->get_compat_arch_id(CPU(cpu));
+
+ if (apic_state == NULL) {
return;
}
+ vmstate_register_with_alias_id(NULL, cpu_index, &vmstate_apic_common,
+ apic_state, compat_index, 3);
+
if (qdev_init(cpu->apic_state)) {
error_setg(errp, "APIC device '%s' could not be initialized",
object_get_typename(OBJECT(cpu->apic_state)));
--
1.9.3
^ permalink raw reply related [flat|nested] 26+ messages in thread* [Qemu-devel] [PATCH v4 07/10] monitor: use cc->get_arch_id as the cpu index
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
` (5 preceding siblings ...)
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 06/10] qom/cpu: move apic vmstate register into x86_cpu_apic_realize Zhu Guihua
@ 2015-02-13 10:25 ` Zhu Guihua
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 08/10] acpi: introduce acpi_send_gpe_event() Zhu Guihua
` (4 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Zhu Guihua @ 2015-02-13 10:25 UTC (permalink / raw)
To: qemu-devel
Cc: Zhu Guihua, tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar,
chen.fan.fnst, imammedo, afaerber
From: Gu Zheng <guz.fnst@cn.fujitsu.com>
Use cc->get_arch_id as the cpu index to avoid the cpu index duplicated
issue in the QMP/HMP command output.
Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
---
cpus.c | 4 +++-
monitor.c | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/cpus.c b/cpus.c
index 0cdd1d7..67d10a7 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1403,6 +1403,7 @@ CpuInfoList *qmp_query_cpus(Error **errp)
CPU_FOREACH(cpu) {
CpuInfoList *info;
+ CPUClass *cc;
#if defined(TARGET_I386)
X86CPU *x86_cpu = X86_CPU(cpu);
CPUX86State *env = &x86_cpu->env;
@@ -1420,11 +1421,12 @@ CpuInfoList *qmp_query_cpus(Error **errp)
CPUTriCoreState *env = &tricore_cpu->env;
#endif
+ cc = CPU_GET_CLASS(cpu);
cpu_synchronize_state(cpu);
info = g_malloc0(sizeof(*info));
info->value = g_malloc0(sizeof(*info->value));
- info->value->CPU = cpu->cpu_index;
+ info->value->CPU = cc->get_arch_id(cpu);
info->value->current = (cpu == first_cpu);
info->value->halted = cpu->halted;
info->value->thread_id = cpu->thread_id;
diff --git a/monitor.c b/monitor.c
index c3cc060..e57ae27 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1024,7 +1024,9 @@ static CPUArchState *mon_get_cpu(void)
int monitor_get_cpu_index(void)
{
CPUState *cpu = ENV_GET_CPU(mon_get_cpu());
- return cpu->cpu_index;
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+
+ return cc->get_arch_id(cpu);
}
static void do_info_registers(Monitor *mon, const QDict *qdict)
--
1.9.3
^ permalink raw reply related [flat|nested] 26+ messages in thread* [Qemu-devel] [PATCH v4 08/10] acpi: introduce acpi_send_gpe_event()
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
` (6 preceding siblings ...)
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 07/10] monitor: use cc->get_arch_id as the cpu index Zhu Guihua
@ 2015-02-13 10:25 ` Zhu Guihua
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 09/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
` (3 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Zhu Guihua @ 2015-02-13 10:25 UTC (permalink / raw)
To: qemu-devel
Cc: Zhu Guihua, tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar,
chen.fan.fnst, imammedo, afaerber
acpi_send_gpe_event() is introduced to do a generic for acpi
to send gpe event, and it can be reused by CPU and PCI hotplug.
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
---
hw/acpi/core.c | 7 +++++++
include/hw/acpi/acpi.h | 3 +++
2 files changed, 10 insertions(+)
diff --git a/hw/acpi/core.c b/hw/acpi/core.c
index 51913d6..98ca994 100644
--- a/hw/acpi/core.c
+++ b/hw/acpi/core.c
@@ -666,6 +666,13 @@ uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr)
return val;
}
+void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
+ unsigned int hotplug_status)
+{
+ ar->gpe.sts[0] |= hotplug_status;
+ acpi_update_sci(ar, irq);
+}
+
void acpi_update_sci(ACPIREGS *regs, qemu_irq irq)
{
int sci_level, pm1a_sts;
diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h
index 1f678b4..7a0a209 100644
--- a/include/hw/acpi/acpi.h
+++ b/include/hw/acpi/acpi.h
@@ -172,6 +172,9 @@ void acpi_gpe_reset(ACPIREGS *ar);
void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
+void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
+ unsigned int hotplug_status);
+
void acpi_update_sci(ACPIREGS *acpi_regs, qemu_irq irq);
/* acpi.c */
--
1.9.3
^ permalink raw reply related [flat|nested] 26+ messages in thread* [Qemu-devel] [PATCH v4 09/10] cpu: add device_add foo-x86_64-cpu support
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
` (7 preceding siblings ...)
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 08/10] acpi: introduce acpi_send_gpe_event() Zhu Guihua
@ 2015-02-13 10:25 ` Zhu Guihua
2015-03-05 18:43 ` Eduardo Habkost
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 10/10] i386/cpu: add instance finalize callback Zhu Guihua
` (2 subsequent siblings)
11 siblings, 1 reply; 26+ messages in thread
From: Zhu Guihua @ 2015-02-13 10:25 UTC (permalink / raw)
To: qemu-devel
Cc: Zhu Guihua, tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar,
chen.fan.fnst, imammedo, afaerber
From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Add support to device_add foo-x86_64-cpu, and additional checks of
apic id are added into x86_cpuid_set_apic_id() to avoid duplicate.
Besides, in order to support "device/device_add foo-x86_64-cpu"
which without specified apic id, we assign cpuid_apic_id with a
default broadcast value (0xFFFFFFFF) in initfn, and a new function
get_free_apic_id() to provide a free apid id to cpuid_apic_id if
it still has the default at realize time (e.g. hot add foo-cpu without
a specified apic id) to avoid apic id duplicates.
Thanks very much for Igor's suggestion.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
---
hw/acpi/cpu_hotplug.c | 6 ++++--
hw/i386/pc.c | 6 ------
target-i386/cpu.c | 48 +++++++++++++++++++++++++++++++++++++++++++++---
3 files changed, 49 insertions(+), 11 deletions(-)
diff --git a/hw/acpi/cpu_hotplug.c b/hw/acpi/cpu_hotplug.c
index b8ebfad..8e4ed6e 100644
--- a/hw/acpi/cpu_hotplug.c
+++ b/hw/acpi/cpu_hotplug.c
@@ -59,8 +59,10 @@ void acpi_cpu_plug_cb(ACPIREGS *ar, qemu_irq irq,
return;
}
- ar->gpe.sts[0] |= ACPI_CPU_HOTPLUG_STATUS;
- acpi_update_sci(ar, irq);
+ /* Only trigger sci if cpu is hotplugged */
+ if (dev->hotplugged) {
+ acpi_send_gpe_event(ar, irq, ACPI_CPU_HOTPLUG_STATUS);
+ }
}
void acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner,
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 500d369..1187e12 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1637,13 +1637,7 @@ static void pc_cpu_plug(HotplugHandler *hotplug_dev,
Error *local_err = NULL;
PCMachineState *pcms = PC_MACHINE(hotplug_dev);
- if (!dev->hotplugged) {
- goto out;
- }
-
if (!pcms->acpi_dev) {
- error_setg(&local_err,
- "cpu hotplug is not enabled: missing acpi device");
goto out;
}
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 028063c..68a6aa4 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1703,6 +1703,7 @@ static void x86_cpuid_set_apic_id(Object *obj, Visitor *v, void *opaque,
const int64_t max = UINT32_MAX;
Error *error = NULL;
int64_t value;
+ X86CPUTopoInfo topo;
if (dev->realized) {
error_setg(errp, "Attempt to set property '%s' on '%s' after "
@@ -1722,6 +1723,19 @@ static void x86_cpuid_set_apic_id(Object *obj, Visitor *v, void *opaque,
return;
}
+ if (value > x86_cpu_apic_id_from_index(max_cpus - 1)) {
+ error_setg(errp, "CPU with APIC ID %" PRIi64
+ " is more than MAX APIC ID limits", value);
+ return;
+ }
+
+ x86_topo_ids_from_apic_id(smp_cores, smp_threads, value, &topo);
+ if (topo.smt_id >= smp_threads || topo.core_id >= smp_cores) {
+ error_setg(errp, "CPU with APIC ID %" PRIi64 " does not match "
+ "topology configuration.", value);
+ return;
+ }
+
if ((value != cpu->env.cpuid_apic_id) && cpu_exists(value)) {
error_setg(errp, "CPU with APIC ID %" PRIi64 " exists", value);
return;
@@ -2166,8 +2180,10 @@ static void x86_cpu_cpudef_class_init(ObjectClass *oc, void *data)
{
X86CPUDefinition *cpudef = data;
X86CPUClass *xcc = X86_CPU_CLASS(oc);
+ DeviceClass *dc = DEVICE_CLASS(oc);
xcc->cpu_def = cpudef;
+ dc->cannot_instantiate_with_device_add_yet = false;
}
static void x86_register_cpudef_type(X86CPUDefinition *def)
@@ -2176,6 +2192,7 @@ static void x86_register_cpudef_type(X86CPUDefinition *def)
TypeInfo ti = {
.name = typename,
.parent = TYPE_X86_CPU,
+ .instance_size = sizeof(X86CPU),
.class_init = x86_cpu_cpudef_class_init,
.class_data = def,
};
@@ -2709,11 +2726,28 @@ static void mce_init(X86CPU *cpu)
}
#ifndef CONFIG_USER_ONLY
+static uint32_t get_free_apic_id(void)
+{
+ int i;
+
+ for (i = 0; i < max_cpus; i++) {
+ uint32_t id = x86_cpu_apic_id_from_index(i);
+
+ if (!cpu_exists(id)) {
+ return id;
+ }
+ }
+
+ return x86_cpu_apic_id_from_index(max_cpus);
+}
+
+#define APIC_ID_NOT_SET (~0U)
+
static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
{
- CPUX86State *env = &cpu->env;
APICCommonState *apic;
const char *apic_type = "apic";
+ uint32_t apic_id;
if (kvm_irqchip_in_kernel()) {
apic_type = "kvm-apic";
@@ -2729,7 +2763,15 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
object_property_add_child(OBJECT(cpu), "apic",
OBJECT(cpu->apic_state), NULL);
- qdev_prop_set_uint8(cpu->apic_state, "id", env->cpuid_apic_id);
+
+ apic_id = object_property_get_int(OBJECT(cpu), "apic-id", NULL);
+ if (apic_id == APIC_ID_NOT_SET) {
+ apic_id = get_free_apic_id();
+ object_property_set_int(OBJECT(cpu), apic_id, "apic-id", errp);
+ }
+
+ qdev_prop_set_uint8(cpu->apic_state, "id", apic_id);
+
/* TODO: convert to link<> */
apic = APIC_COMMON(cpu->apic_state);
apic->cpu = cpu;
@@ -2920,7 +2962,7 @@ static void x86_cpu_initfn(Object *obj)
NULL, NULL, (void *)cpu->filtered_features, NULL);
cpu->hyperv_spinlock_attempts = HYPERV_SPINLOCK_NEVER_RETRY;
- env->cpuid_apic_id = x86_cpu_apic_id_from_index(cs->cpu_index);
+ env->cpuid_apic_id = APIC_ID_NOT_SET;
x86_cpu_load_def(cpu, xcc->cpu_def, &error_abort);
--
1.9.3
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v4 09/10] cpu: add device_add foo-x86_64-cpu support
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 09/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
@ 2015-03-05 18:43 ` Eduardo Habkost
0 siblings, 0 replies; 26+ messages in thread
From: Eduardo Habkost @ 2015-03-05 18:43 UTC (permalink / raw)
To: Zhu Guihua
Cc: qemu-devel, tangchen, chen.fan.fnst, isimatu.yasuaki, imammedo,
guz.fnst, anshul.makkar, afaerber
On Fri, Feb 13, 2015 at 06:25:32PM +0800, Zhu Guihua wrote:
> From: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
>
> Add support to device_add foo-x86_64-cpu, and additional checks of
> apic id are added into x86_cpuid_set_apic_id() to avoid duplicate.
> Besides, in order to support "device/device_add foo-x86_64-cpu"
> which without specified apic id, we assign cpuid_apic_id with a
> default broadcast value (0xFFFFFFFF) in initfn, and a new function
> get_free_apic_id() to provide a free apid id to cpuid_apic_id if
> it still has the default at realize time (e.g. hot add foo-cpu without
> a specified apic id) to avoid apic id duplicates.
>
> Thanks very much for Igor's suggestion.
>
> Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
> Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
> Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
> ---
> hw/acpi/cpu_hotplug.c | 6 ++++--
> hw/i386/pc.c | 6 ------
> target-i386/cpu.c | 48 +++++++++++++++++++++++++++++++++++++++++++++---
> 3 files changed, 49 insertions(+), 11 deletions(-)
>
> diff --git a/hw/acpi/cpu_hotplug.c b/hw/acpi/cpu_hotplug.c
> index b8ebfad..8e4ed6e 100644
> --- a/hw/acpi/cpu_hotplug.c
> +++ b/hw/acpi/cpu_hotplug.c
> @@ -59,8 +59,10 @@ void acpi_cpu_plug_cb(ACPIREGS *ar, qemu_irq irq,
> return;
> }
>
> - ar->gpe.sts[0] |= ACPI_CPU_HOTPLUG_STATUS;
> - acpi_update_sci(ar, irq);
> + /* Only trigger sci if cpu is hotplugged */
> + if (dev->hotplugged) {
> + acpi_send_gpe_event(ar, irq, ACPI_CPU_HOTPLUG_STATUS);
> + }
> }
>
> void acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner,
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 500d369..1187e12 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -1637,13 +1637,7 @@ static void pc_cpu_plug(HotplugHandler *hotplug_dev,
> Error *local_err = NULL;
> PCMachineState *pcms = PC_MACHINE(hotplug_dev);
>
> - if (!dev->hotplugged) {
> - goto out;
> - }
> -
> if (!pcms->acpi_dev) {
> - error_setg(&local_err,
> - "cpu hotplug is not enabled: missing acpi device");
> goto out;
> }
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 028063c..68a6aa4 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -1703,6 +1703,7 @@ static void x86_cpuid_set_apic_id(Object *obj, Visitor *v, void *opaque,
> const int64_t max = UINT32_MAX;
> Error *error = NULL;
> int64_t value;
> + X86CPUTopoInfo topo;
>
> if (dev->realized) {
> error_setg(errp, "Attempt to set property '%s' on '%s' after "
> @@ -1722,6 +1723,19 @@ static void x86_cpuid_set_apic_id(Object *obj, Visitor *v, void *opaque,
> return;
> }
>
> + if (value > x86_cpu_apic_id_from_index(max_cpus - 1)) {
> + error_setg(errp, "CPU with APIC ID %" PRIi64
> + " is more than MAX APIC ID limits", value);
> + return;
> + }
> +
> + x86_topo_ids_from_apic_id(smp_cores, smp_threads, value, &topo);
> + if (topo.smt_id >= smp_threads || topo.core_id >= smp_cores) {
> + error_setg(errp, "CPU with APIC ID %" PRIi64 " does not match "
> + "topology configuration.", value);
> + return;
> + }
> +
> if ((value != cpu->env.cpuid_apic_id) && cpu_exists(value)) {
> error_setg(errp, "CPU with APIC ID %" PRIi64 " exists", value);
> return;
> @@ -2166,8 +2180,10 @@ static void x86_cpu_cpudef_class_init(ObjectClass *oc, void *data)
> {
> X86CPUDefinition *cpudef = data;
> X86CPUClass *xcc = X86_CPU_CLASS(oc);
> + DeviceClass *dc = DEVICE_CLASS(oc);
>
> xcc->cpu_def = cpudef;
> + dc->cannot_instantiate_with_device_add_yet = false;
> }
>
> static void x86_register_cpudef_type(X86CPUDefinition *def)
> @@ -2176,6 +2192,7 @@ static void x86_register_cpudef_type(X86CPUDefinition *def)
> TypeInfo ti = {
> .name = typename,
> .parent = TYPE_X86_CPU,
> + .instance_size = sizeof(X86CPU),
> .class_init = x86_cpu_cpudef_class_init,
> .class_data = def,
> };
> @@ -2709,11 +2726,28 @@ static void mce_init(X86CPU *cpu)
> }
>
> #ifndef CONFIG_USER_ONLY
> +static uint32_t get_free_apic_id(void)
> +{
> + int i;
> +
> + for (i = 0; i < max_cpus; i++) {
> + uint32_t id = x86_cpu_apic_id_from_index(i);
> +
> + if (!cpu_exists(id)) {
> + return id;
> + }
> + }
> +
> + return x86_cpu_apic_id_from_index(max_cpus);
> +}
> +
> +#define APIC_ID_NOT_SET (~0U)
This is inside CONFIG_USER_ONLY...
> +
[...]
> @@ -2920,7 +2962,7 @@ static void x86_cpu_initfn(Object *obj)
> NULL, NULL, (void *)cpu->filtered_features, NULL);
>
> cpu->hyperv_spinlock_attempts = HYPERV_SPINLOCK_NEVER_RETRY;
> - env->cpuid_apic_id = x86_cpu_apic_id_from_index(cs->cpu_index);
> + env->cpuid_apic_id = APIC_ID_NOT_SET;
...but this is not.
CC x86_64-linux-user/target-i386/cpu.o
/home/ehabkost/rh/proj/virt/qemu/target-i386/cpu.c: In function ‘x86_cpu_initfn’:
/home/ehabkost/rh/proj/virt/qemu/target-i386/cpu.c:2964:26: error: ‘APIC_ID_NOT_SET’ undeclared (first use in this function)
env->cpuid_apic_id = APIC_ID_NOT_SET;
^
/home/ehabkost/rh/proj/virt/qemu/target-i386/cpu.c:2964:26: note: each undeclared identifier is reported only once for each function it appears in
/home/ehabkost/rh/proj/virt/qemu/rules.mak:57: recipe for target 'target-i386/cpu.o' failed
make[1]: *** [target-i386/cpu.o] Error 1
Makefile:169: recipe for target 'subdir-x86_64-linux-user' failed
make: *** [subdir-x86_64-linux-user] Error 2
Also, this will need to be rebased on top of the APIC ID cleanups from
my x86 tree, located at:
https://github.com/ehabkost/qemu.git x86
>
> x86_cpu_load_def(cpu, xcc->cpu_def, &error_abort);
>
> --
> 1.9.3
>
>
--
Eduardo
^ permalink raw reply [flat|nested] 26+ messages in thread
* [Qemu-devel] [PATCH v4 10/10] i386/cpu: add instance finalize callback
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
` (8 preceding siblings ...)
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 09/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
@ 2015-02-13 10:25 ` Zhu Guihua
2015-02-24 1:25 ` [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Gu Zheng
2015-03-13 6:17 ` Zhu Guihua
11 siblings, 0 replies; 26+ messages in thread
From: Zhu Guihua @ 2015-02-13 10:25 UTC (permalink / raw)
To: qemu-devel
Cc: Zhu Guihua, tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar,
chen.fan.fnst, imammedo, afaerber
From: Gu Zheng <guz.fnst@cn.fujitsu.com>
Add a func to finalize a cpu's instance. When cpu's device_add failed,
and cpu's device_del executed, this func would be invoked.
Signed-off-by: Gu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com>
---
include/qom/cpu.h | 1 +
target-i386/cpu.c | 8 ++++++++
2 files changed, 9 insertions(+)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index d0a50e2..518f234 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -308,6 +308,7 @@ struct CPUState {
QTAILQ_HEAD(CPUTailQ, CPUState);
extern struct CPUTailQ cpus;
#define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
+#define CPU_REMOVE(cpu) QTAILQ_REMOVE(&cpus, cpu, node)
#define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
#define CPU_FOREACH_SAFE(cpu, next_cpu) \
QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 68a6aa4..6df948f 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2973,6 +2973,13 @@ static void x86_cpu_initfn(Object *obj)
}
}
+static void x86_cpu_finalizefn(Object *obj)
+{
+ CPUState *cs = CPU(obj);
+
+ CPU_REMOVE(cs);
+}
+
static int64_t x86_cpu_get_arch_id(CPUState *cs)
{
X86CPU *cpu = X86_CPU(cs);
@@ -3094,6 +3101,7 @@ static const TypeInfo x86_cpu_type_info = {
.parent = TYPE_CPU,
.instance_size = sizeof(X86CPU),
.instance_init = x86_cpu_initfn,
+ .instance_finalize = x86_cpu_finalizefn,
.abstract = true,
.class_size = sizeof(X86CPUClass),
.class_init = x86_cpu_common_class_init,
--
1.9.3
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
` (9 preceding siblings ...)
2015-02-13 10:25 ` [Qemu-devel] [PATCH v4 10/10] i386/cpu: add instance finalize callback Zhu Guihua
@ 2015-02-24 1:25 ` Gu Zheng
2015-02-24 16:56 ` Andreas Färber
2015-03-13 6:17 ` Zhu Guihua
11 siblings, 1 reply; 26+ messages in thread
From: Gu Zheng @ 2015-02-24 1:25 UTC (permalink / raw)
To: imammedo, afaerber
Cc: Zhu Guihua, qemu-devel, tangchen, isimatu.yasuaki, chen.fan.fnst,
anshul.makkar
Hi Igor, Andreas,
The issues you commented in the previous version have been fixed in this one.
Could you please help to review it?
Regards,
Gu
On 02/13/2015 06:25 PM, Zhu Guihua wrote:
> This series is based on the previous patchset from Chen Fan:
> https://lists.nongnu.org/archive/html/qemu-devel/2014-05/msg02360.html
>
> We try to make cpu hotplug with device_add, and make
> "-device foo-x86_64-cpu" available, also we can set apic-id
> property with command line, if without setting apic-id property,
> we offer the first unoccupied apic id as the default new apic id.
> When hotplug cpu with device_add, additional check of APIC ID will be
> done after cpu object initialization which was different from
> 'cpu_add' command that check 'ids' at the beginning.
>
> The is the first half of the previous series:
> [RFC V2 00/10] cpu: add device_add foo-x86_64-cpu and i386 cpu hot remove support
> https://lists.nongnu.org/archive/html/qemu-devel/2014-08/msg04779.html
>
> ---
> Changelog since v3:
> -fix cross version migration issue
> -drop ICC bus impl
> -do a generic for apic to send gpe event
> -do not use migration code for CONFIG_USER_ONLY target
>
> Changelog since v2:
> -rebase on latest upstream.
> -add cpu instance finalize.
>
> Changelog since v1:
> -rebased on latest upstream.
> -introduce a help function to hide the access to icc_bus.
> -use a macro ACPI_ID_NOT_SET to replace the magic number(0xFFFFFFFF).
>
> Changelog since RFC:
> -split out APIC vmstate/QMP-monitor changes into separate patches.
> -add the handle of the startup cpus(-device foo).
> -remove duplicated checking about env->cpuid_apic_id.
> -do actual APIC ID allocation at realize time if it is not set before.
> -remove the unneeded x86_cpu_cpudef_instance_init().
> -split off device_del support out here.
> ---
>
> Chen Fan (4):
> cpu/apic: drop icc bus/bridge/
> icc_bus: remove icc related files
> cpu: introduce CpuTopoInfo structure for argument simplification
> cpu: add device_add foo-x86_64-cpu support
>
> Gu Zheng (4):
> qom/cpu: move register_vmstate to common CPUClass.realizefn
> qom/cpu: move apic vmstate register into x86_cpu_apic_realize
> monitor: use cc->get_arch_id as the cpu index
> i386/cpu: add instance finalize callback
>
> Zhu Guihua (2):
> cpu: introduce get_compat_arch_id() method and override it for X86CPU
> acpi: introduce acpi_send_gpe_event()
>
> MAINTAINERS | 6 --
> cpus.c | 4 +-
> default-configs/i386-softmmu.mak | 1 -
> default-configs/x86_64-softmmu.mak | 1 -
> exec.c | 25 +++++---
> hw/acpi/core.c | 7 +++
> hw/acpi/cpu_hotplug.c | 6 +-
> hw/cpu/Makefile.objs | 2 -
> hw/cpu/icc_bus.c | 118 -------------------------------------
> hw/i386/kvm/apic.c | 10 +++-
> hw/i386/pc.c | 27 ++-------
> hw/i386/pc_piix.c | 9 +--
> hw/i386/pc_q35.c | 9 +--
> hw/intc/apic.c | 16 +++--
> hw/intc/apic_common.c | 17 +++---
> include/hw/acpi/acpi.h | 3 +
> include/hw/cpu/icc_bus.h | 82 --------------------------
> include/hw/i386/apic_internal.h | 9 +--
> include/hw/i386/pc.h | 3 +-
> include/qom/cpu.h | 6 ++
> monitor.c | 4 +-
> qom/cpu.c | 10 ++++
> target-i386/cpu.c | 95 ++++++++++++++++++++++-------
> target-i386/cpu.h | 3 +-
> target-i386/topology.h | 66 ++++++++++++++++-----
> 25 files changed, 223 insertions(+), 316 deletions(-)
> delete mode 100644 hw/cpu/icc_bus.c
> delete mode 100644 include/hw/cpu/icc_bus.h
>
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support
2015-02-24 1:25 ` [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Gu Zheng
@ 2015-02-24 16:56 ` Andreas Färber
2015-02-25 9:58 ` Chen Fan
2015-02-26 4:42 ` Bharata B Rao
0 siblings, 2 replies; 26+ messages in thread
From: Andreas Färber @ 2015-02-24 16:56 UTC (permalink / raw)
To: Gu Zheng
Cc: Zhu Guihua, Bharata B Rao, qemu-devel, tangchen, isimatu.yasuaki,
anshul.makkar, chen.fan.fnst, imammedo
Hi Gu,
Am 24.02.2015 um 02:25 schrieb Gu Zheng:
> The issues you commented in the previous version have been fixed in this one.
What I have repeatedly rejected is "device_add foo-x86_64-cpu". This is
still in 00/10 and 09/10. Most of the actual changes however do look to
be going in the right direction of making 'realize' work as expected for
foo-x86_64-cpu.
As for the socket-based device_add I mentioned, I had pushed a work
branch qom-cpu-x86 and had some off-list discussions for some of the
other architectures but did not submit it as an RFC yet. What I am still
working on is dynamic properties to allocate cores (threads TBD) for
"device_add x86_64-cpu-socket,cores=n".
> Could you please help to review it?
Will get to it Friday earliest.
Regards,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Jennifer Guild, Dilip Upmanyu,
Graham Norton; HRB 21284 (AG Nürnberg)
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support
2015-02-24 16:56 ` Andreas Färber
@ 2015-02-25 9:58 ` Chen Fan
2015-02-26 9:35 ` Andreas Färber
2015-02-26 4:42 ` Bharata B Rao
1 sibling, 1 reply; 26+ messages in thread
From: Chen Fan @ 2015-02-25 9:58 UTC (permalink / raw)
To: Andreas Färber, Gu Zheng
Cc: Zhu Guihua, Bharata B Rao, qemu-devel, tangchen, isimatu.yasuaki,
anshul.makkar, imammedo
Hi Andreas,
On 02/25/2015 12:56 AM, Andreas Färber wrote:
> Hi Gu,
>
> Am 24.02.2015 um 02:25 schrieb Gu Zheng:
>> The issues you commented in the previous version have been fixed in this one.
> What I have repeatedly rejected is "device_add foo-x86_64-cpu". This is
> still in 00/10 and 09/10. Most of the actual changes however do look to
> be going in the right direction of making 'realize' work as expected for
> foo-x86_64-cpu.
>
> As for the socket-based device_add I mentioned, I had pushed a work
> branch qom-cpu-x86 and had some off-list discussions for some of the
> other architectures but did not submit it as an RFC yet. What I am still
> working on is dynamic properties to allocate cores (threads TBD) for
> "device_add x86_64-cpu-socket,cores=n".
Can you explain all your thoughts about cpu hotplug feature with
socket-based,
or how goals do you want to see?
and what is the status of "device_add x86_64-cpu-socket" ?
after that, I think we can do somethings to help you to achieve your ideas.
Thanks,
Chen
>
>> Could you please help to review it?
> Will get to it Friday earliest.
>
> Regards,
> Andreas
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support
2015-02-25 9:58 ` Chen Fan
@ 2015-02-26 9:35 ` Andreas Färber
2015-02-26 10:02 ` Chen Fan
0 siblings, 1 reply; 26+ messages in thread
From: Andreas Färber @ 2015-02-26 9:35 UTC (permalink / raw)
To: Chen Fan, Gu Zheng
Cc: Zhu Guihua, Bharata B Rao, qemu-devel, tangchen, isimatu.yasuaki,
anshul.makkar, imammedo
Hi,
Am 25.02.2015 um 10:58 schrieb Chen Fan:
> On 02/25/2015 12:56 AM, Andreas Färber wrote:
>> Am 24.02.2015 um 02:25 schrieb Gu Zheng:
>>> The issues you commented in the previous version have been fixed in
>>> this one.
>> What I have repeatedly rejected is "device_add foo-x86_64-cpu". This is
>> still in 00/10 and 09/10. Most of the actual changes however do look to
>> be going in the right direction of making 'realize' work as expected for
>> foo-x86_64-cpu.
>>
>> As for the socket-based device_add I mentioned, I had pushed a work
>> branch qom-cpu-x86 and had some off-list discussions for some of the
>> other architectures but did not submit it as an RFC yet. What I am still
>> working on is dynamic properties to allocate cores (threads TBD) for
>> "device_add x86_64-cpu-socket,cores=n".
> Can you explain all your thoughts about cpu hotplug feature with
> socket-based,
> or how goals do you want to see?
Basically I am implementing Anthony's suggestion from a year or two
back, that is moving towards using real building blocks such as
Xeon-E5-4242 as shortcut for a 6-core, 2-HT device, ultimately replacing
-cpu. Think of what can be plugged in real servers - a socket is atomic
in reality, you can't add cores or hyperthreads dynamically. And the QOM
realize model then forces me to use child<> properties inside the socket
object for consistent recursive processing.
Regards,
Andreas
>
> and what is the status of "device_add x86_64-cpu-socket" ?
>
> after that, I think we can do somethings to help you to achieve your ideas.
>
> Thanks,
> Chen
>
>>
>>> Could you please help to review it?
>> Will get to it Friday earliest.
>>
>> Regards,
>> Andreas
>>
>
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Jennifer Guild, Dilip Upmanyu,
Graham Norton; HRB 21284 (AG Nürnberg)
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support
2015-02-26 9:35 ` Andreas Färber
@ 2015-02-26 10:02 ` Chen Fan
0 siblings, 0 replies; 26+ messages in thread
From: Chen Fan @ 2015-02-26 10:02 UTC (permalink / raw)
To: Andreas Färber, Gu Zheng
Cc: Zhu Guihua, Bharata B Rao, qemu-devel, tangchen, isimatu.yasuaki,
anshul.makkar, imammedo
On 02/26/2015 05:35 PM, Andreas Färber wrote:
> Hi,
>
> Am 25.02.2015 um 10:58 schrieb Chen Fan:
>> On 02/25/2015 12:56 AM, Andreas Färber wrote:
>>> Am 24.02.2015 um 02:25 schrieb Gu Zheng:
>>>> The issues you commented in the previous version have been fixed in
>>>> this one.
>>> What I have repeatedly rejected is "device_add foo-x86_64-cpu". This is
>>> still in 00/10 and 09/10. Most of the actual changes however do look to
>>> be going in the right direction of making 'realize' work as expected for
>>> foo-x86_64-cpu.
>>>
>>> As for the socket-based device_add I mentioned, I had pushed a work
>>> branch qom-cpu-x86 and had some off-list discussions for some of the
>>> other architectures but did not submit it as an RFC yet. What I am still
>>> working on is dynamic properties to allocate cores (threads TBD) for
>>> "device_add x86_64-cpu-socket,cores=n".
>> Can you explain all your thoughts about cpu hotplug feature with
>> socket-based,
>> or how goals do you want to see?
> Basically I am implementing Anthony's suggestion from a year or two
> back, that is moving towards using real building blocks such as
> Xeon-E5-4242 as shortcut for a 6-core, 2-HT device, ultimately replacing
> -cpu. Think of what can be plugged in real servers - a socket is atomic
> in reality, you can't add cores or hyperthreads dynamically. And the QOM
> realize model then forces me to use child<> properties inside the socket
> object for consistent recursive processing.
yes, I agree with you.
but the existed command 'cpu-add' is adding one logic processor each time.
it will cause compatibility with the socket-based cpu device. and what
do you think to solve this problem ?
Thanks,
Chen
>
> Regards,
> Andreas
>
>> and what is the status of "device_add x86_64-cpu-socket" ?
>>
>> after that, I think we can do somethings to help you to achieve your ideas.
>>
>> Thanks,
>> Chen
>>
>>>> Could you please help to review it?
>>> Will get to it Friday earliest.
>>>
>>> Regards,
>>> Andreas
>>>
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support
2015-02-24 16:56 ` Andreas Färber
2015-02-25 9:58 ` Chen Fan
@ 2015-02-26 4:42 ` Bharata B Rao
2015-02-26 9:08 ` Andreas Färber
1 sibling, 1 reply; 26+ messages in thread
From: Bharata B Rao @ 2015-02-26 4:42 UTC (permalink / raw)
To: Andreas Färber
Cc: Zhu Guihua, qemu-devel, tangchen, chen.fan.fnst, isimatu.yasuaki,
anshul.makkar, Gu Zheng, imammedo
On Tue, Feb 24, 2015 at 05:56:45PM +0100, Andreas Färber wrote:
> Hi Gu,
>
> Am 24.02.2015 um 02:25 schrieb Gu Zheng:
> > The issues you commented in the previous version have been fixed in this one.
>
> What I have repeatedly rejected is "device_add foo-x86_64-cpu". This is
> still in 00/10 and 09/10. Most of the actual changes however do look to
> be going in the right direction of making 'realize' work as expected for
> foo-x86_64-cpu.
>
> As for the socket-based device_add I mentioned, I had pushed a work
> branch qom-cpu-x86 and had some off-list discussions for some of the
> other architectures but did not submit it as an RFC yet. What I am still
> working on is dynamic properties to allocate cores (threads TBD) for
> "device_add x86_64-cpu-socket,cores=n".
If you have started a VM with -smp sockets=1,cores=4,threads=2, will you
allow addition of a socket with just 2 cores like
device_add x86_64-cpu-socket,cores=2,id=sock2 ?
If so, will there be semantics to populate the remaining cores of that
socket ? If so, would that look like below ?
device-add x86_64-cpu-core,sock=sock2
Regards,
Bharata.
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support
2015-02-26 4:42 ` Bharata B Rao
@ 2015-02-26 9:08 ` Andreas Färber
0 siblings, 0 replies; 26+ messages in thread
From: Andreas Färber @ 2015-02-26 9:08 UTC (permalink / raw)
To: bharata
Cc: Zhu Guihua, Eduardo Habkost, qemu-devel, tangchen, chen.fan.fnst,
isimatu.yasuaki, anshul.makkar, Gu Zheng, imammedo
Am 26.02.2015 um 05:42 schrieb Bharata B Rao:
> On Tue, Feb 24, 2015 at 05:56:45PM +0100, Andreas Färber wrote:
>> Am 24.02.2015 um 02:25 schrieb Gu Zheng:
>>> The issues you commented in the previous version have been fixed in this one.
>>
>> What I have repeatedly rejected is "device_add foo-x86_64-cpu". This is
>> still in 00/10 and 09/10. Most of the actual changes however do look to
>> be going in the right direction of making 'realize' work as expected for
>> foo-x86_64-cpu.
>>
>> As for the socket-based device_add I mentioned, I had pushed a work
>> branch qom-cpu-x86 and had some off-list discussions for some of the
>> other architectures but did not submit it as an RFC yet. What I am still
>> working on is dynamic properties to allocate cores (threads TBD) for
>> "device_add x86_64-cpu-socket,cores=n".
>
> If you have started a VM with -smp sockets=1,cores=4,threads=2, will you
> allow addition of a socket with just 2 cores like
>
> device_add x86_64-cpu-socket,cores=2,id=sock2 ?
In my implementation it is not yet working; with your patch it might,
from a QEMU perspective. Whether that is sensible to do on x86
ACPI-/guest-wise is a different question. I didn't want to rule it out,
as it seems possible in hardware when Intel/AMD socket types are
compatible, and today cpu-add adds them one by one so it's possible.
On PowerPC the modeling could be done slightly differently, but as for
x86 we'll have to keep in mind that there's not just sPAPR but also
baremetal.
> If so, will there be semantics to populate the remaining cores of that
> socket ? If so, would that look like below ?
>
> device-add x86_64-cpu-core,sock=sock2
No, that is not possible with my modeling. Hotplug possibilities
correspond to link<> properties, whereas my socket proposal uses child<>
properties. This in turn has implications on CPU initialization
functions, needing to not set realized=true. For non-x86 that will
involve taking realized=true out of cpu_init() and moving it into call
sites.
Regards,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Jennifer Guild, Dilip Upmanyu,
Graham Norton; HRB 21284 (AG Nürnberg)
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support
2015-02-13 10:25 [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Zhu Guihua
` (10 preceding siblings ...)
2015-02-24 1:25 ` [Qemu-devel] [PATCH v4 00/10] cpu: add device_add foo-x86_64-cpu support Gu Zheng
@ 2015-03-13 6:17 ` Zhu Guihua
11 siblings, 0 replies; 26+ messages in thread
From: Zhu Guihua @ 2015-03-13 6:17 UTC (permalink / raw)
To: qemu-devel
Cc: tangchen, guz.fnst, isimatu.yasuaki, anshul.makkar, chen.fan.fnst,
imammedo, afaerber
Any other comments about this series?
cc Andreas,
Any progress about your socket model?
Thanks,
Zhu
On 02/13/2015 06:25 PM, Zhu Guihua wrote:
> This series is based on the previous patchset from Chen Fan:
> https://lists.nongnu.org/archive/html/qemu-devel/2014-05/msg02360.html
>
> We try to make cpu hotplug with device_add, and make
> "-device foo-x86_64-cpu" available, also we can set apic-id
> property with command line, if without setting apic-id property,
> we offer the first unoccupied apic id as the default new apic id.
> When hotplug cpu with device_add, additional check of APIC ID will be
> done after cpu object initialization which was different from
> 'cpu_add' command that check 'ids' at the beginning.
>
> The is the first half of the previous series:
> [RFC V2 00/10] cpu: add device_add foo-x86_64-cpu and i386 cpu hot remove support
> https://lists.nongnu.org/archive/html/qemu-devel/2014-08/msg04779.html
>
> ---
> Changelog since v3:
> -fix cross version migration issue
> -drop ICC bus impl
> -do a generic for apic to send gpe event
> -do not use migration code for CONFIG_USER_ONLY target
>
> Changelog since v2:
> -rebase on latest upstream.
> -add cpu instance finalize.
>
> Changelog since v1:
> -rebased on latest upstream.
> -introduce a help function to hide the access to icc_bus.
> -use a macro ACPI_ID_NOT_SET to replace the magic number(0xFFFFFFFF).
>
> Changelog since RFC:
> -split out APIC vmstate/QMP-monitor changes into separate patches.
> -add the handle of the startup cpus(-device foo).
> -remove duplicated checking about env->cpuid_apic_id.
> -do actual APIC ID allocation at realize time if it is not set before.
> -remove the unneeded x86_cpu_cpudef_instance_init().
> -split off device_del support out here.
> ---
>
> Chen Fan (4):
> cpu/apic: drop icc bus/bridge/
> icc_bus: remove icc related files
> cpu: introduce CpuTopoInfo structure for argument simplification
> cpu: add device_add foo-x86_64-cpu support
>
> Gu Zheng (4):
> qom/cpu: move register_vmstate to common CPUClass.realizefn
> qom/cpu: move apic vmstate register into x86_cpu_apic_realize
> monitor: use cc->get_arch_id as the cpu index
> i386/cpu: add instance finalize callback
>
> Zhu Guihua (2):
> cpu: introduce get_compat_arch_id() method and override it for X86CPU
> acpi: introduce acpi_send_gpe_event()
>
> MAINTAINERS | 6 --
> cpus.c | 4 +-
> default-configs/i386-softmmu.mak | 1 -
> default-configs/x86_64-softmmu.mak | 1 -
> exec.c | 25 +++++---
> hw/acpi/core.c | 7 +++
> hw/acpi/cpu_hotplug.c | 6 +-
> hw/cpu/Makefile.objs | 2 -
> hw/cpu/icc_bus.c | 118 -------------------------------------
> hw/i386/kvm/apic.c | 10 +++-
> hw/i386/pc.c | 27 ++-------
> hw/i386/pc_piix.c | 9 +--
> hw/i386/pc_q35.c | 9 +--
> hw/intc/apic.c | 16 +++--
> hw/intc/apic_common.c | 17 +++---
> include/hw/acpi/acpi.h | 3 +
> include/hw/cpu/icc_bus.h | 82 --------------------------
> include/hw/i386/apic_internal.h | 9 +--
> include/hw/i386/pc.h | 3 +-
> include/qom/cpu.h | 6 ++
> monitor.c | 4 +-
> qom/cpu.c | 10 ++++
> target-i386/cpu.c | 95 ++++++++++++++++++++++-------
> target-i386/cpu.h | 3 +-
> target-i386/topology.h | 66 ++++++++++++++++-----
> 25 files changed, 223 insertions(+), 316 deletions(-)
> delete mode 100644 hw/cpu/icc_bus.c
> delete mode 100644 include/hw/cpu/icc_bus.h
>
^ permalink raw reply [flat|nested] 26+ messages in thread