From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39708) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVR79-0007lM-1J for qemu-devel@nongnu.org; Tue, 10 Mar 2015 16:50:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YVR75-0006Zt-O1 for qemu-devel@nongnu.org; Tue, 10 Mar 2015 16:50:54 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33760) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVR75-0006Zp-Eb for qemu-devel@nongnu.org; Tue, 10 Mar 2015 16:50:51 -0400 Message-ID: <54FF5928.1050607@redhat.com> Date: Tue, 10 Mar 2015 16:50:48 -0400 From: John Snow MIME-Version: 1.0 References: <1424795655-16952-1-git-send-email-marc.mari.barcelo@gmail.com> <54ECBE3D.3060808@redhat.com> In-Reply-To: <54ECBE3D.3060808@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] libqos: Solve bug in interrupt checking when using MSIX in virtio-pci.c List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: stefanha@redhat.com Cc: =?UTF-8?B?TWFyYyBNYXLDrQ==?= , qemu-devel@nongnu.org, afaerber@suse.de On 02/24/2015 01:09 PM, John Snow wrote: > > > On 02/24/2015 11:34 AM, Marc Mar=C3=AD wrote: >> The MSIX interrupt was always acked without checking its value, which >> caused a >> race condition. If the ISR was raised between the read and the acking, >> the ISR >> was never detected and it timed out. >> >> Signed-off-by: Marc Mar=C3=AD >> --- >> tests/libqos/virtio-pci.c | 16 ++++++++++++---- >> 1 file changed, 12 insertions(+), 4 deletions(-) >> >> diff --git a/tests/libqos/virtio-pci.c b/tests/libqos/virtio-pci.c >> index 788ebaf..c74a669 100644 >> --- a/tests/libqos/virtio-pci.c >> +++ b/tests/libqos/virtio-pci.c >> @@ -140,8 +140,12 @@ static bool >> qvirtio_pci_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq) >> return qpci_msix_pending(dev->pdev, vqpci->msix_entry); >> } else { >> data =3D readl(vqpci->msix_addr); >> - writel(vqpci->msix_addr, 0); >> - return data =3D=3D vqpci->msix_data; >> + if (data =3D=3D vqpci->msix_data) { >> + writel(vqpci->msix_addr, 0); >> + return true; >> + } else { >> + return false; >> + } >> } >> } else { >> return qpci_io_readb(dev->pdev, dev->addr + >> QVIRTIO_ISR_STATUS) & 1; >> @@ -160,8 +164,12 @@ static bool >> qvirtio_pci_get_config_isr_status(QVirtioDevice *d) >> return qpci_msix_pending(dev->pdev, >> dev->config_msix_entry); >> } else { >> data =3D readl(dev->config_msix_addr); >> - writel(dev->config_msix_addr, 0); >> - return data =3D=3D dev->config_msix_data; >> + if (data =3D=3D dev->config_msix_data) { >> + writel(dev->config_msix_addr, 0); >> + return true; >> + } else { >> + return false; >> + } >> } >> } else { >> return qpci_io_readb(dev->pdev, dev->addr + >> QVIRTIO_ISR_STATUS) & 2; >> > > 1,600+ runs and no hang, thanks :) > > Tested-by: John Snow > Reviewed-by: John Snow > Ping? Still hitting this failure upstream.