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From: Thomas Huth <thuth@redhat.com>
To: David Gibson <david@gibson.dropbear.id.au>, groug@kaod.org, clg@kaod.org
Cc: qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, qemu-ppc@nongnu.org
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH for-2.10 2/2] target/ppc: Add stub implementation of the PSSCR
Date: Tue, 8 Aug 2017 13:49:52 +0200	[thread overview]
Message-ID: <54c9ef1f-b41c-3ac6-9497-6bec8e5a3a8c@redhat.com> (raw)
In-Reply-To: <20170808060817.2832-3-david@gibson.dropbear.id.au>

On 08.08.2017 08:08, David Gibson wrote:
> The PSSCR register added in POWER9 controls certain power saving mode
> behaviours.  Mostly, it's not relevant to TCG, however because qemu
> doesn't know about it yet, it doesn't synchronize the state with KVM,
> and thus it doesn't get migrated.
> 
> To fix that, this adds a minimal stub implementation of the register.
> This isn't complete, even to the extent that an implementation is
> possible in TCG, just enough to get migration working.  We need to
> come back later and at least properly filter the various fields in the
> register based on privilege level.
> 
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
>  target/ppc/cpu.h            | 1 +
>  target/ppc/translate_init.c | 5 +++++
>  2 files changed, 6 insertions(+)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index f6e5413fad..46d3dd88f6 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1771,6 +1771,7 @@ void ppc_compat_add_property(Object *obj, const char *name,
>  #define SPR_IC                (0x350)
>  #define SPR_VTB               (0x351)
>  #define SPR_MMCRC             (0x353)
> +#define SPR_PSSCR             (0x357)
>  #define SPR_440_INV0          (0x370)
>  #define SPR_440_INV1          (0x371)
>  #define SPR_440_INV2          (0x372)
> diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> index 94800cd29d..8fb407ed73 100644
> --- a/target/ppc/translate_init.c
> +++ b/target/ppc/translate_init.c
> @@ -8846,6 +8846,11 @@ static void init_proc_POWER9(CPUPPCState *env)
>                       spr_read_generic, spr_write_generic,
>                       KVM_REG_PPC_TIDR, 0);
>  
> +    /* FIXME: Filter fields properly based on privilege level */
> +    spr_register_kvm_hv(env, SPR_PSSCR, "PSSCR", NULL, NULL, NULL, NULL,
> +                        spr_read_generic, spr_write_generic,
> +                        KVM_REG_PPC_PSSCR, 0);
> +
>      /* env variables */
>  #if !defined(CONFIG_USER_ONLY)
>      env->slb_nr = 32;
> 

Reviewed-by: Thomas Huth <thuth@redhat.com>

      parent reply	other threads:[~2017-08-08 11:50 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-08  6:08 [Qemu-devel] [PATCH for-2.10 0/2] Add some missing POWER9 SPRs for migration David Gibson
2017-08-08  6:08 ` [Qemu-devel] [PATCH for-2.10 1/2] target/ppc: Implement TIDR David Gibson
2017-08-08  9:13   ` Cédric Le Goater
2017-08-08 10:23     ` Greg Kurz
2017-08-08 11:08   ` [Qemu-devel] [Qemu-ppc] " Thomas Huth
2017-08-08  6:08 ` [Qemu-devel] [PATCH for-2.10 2/2] target/ppc: Add stub implementation of the PSSCR David Gibson
2017-08-08  9:19   ` Cédric Le Goater
2017-08-08 10:54     ` Greg Kurz
2017-08-08 12:44       ` David Gibson
2017-08-08 11:49   ` Thomas Huth [this message]

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