qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-devel@nongnu.org,
	Jean-Philippe Brucker <jean-philippe@linaro.org>
Subject: Re: [PULL 31/33] tests/acpi: add test case for VIOT
Date: Wed, 15 Dec 2021 16:59:10 -0800	[thread overview]
Message-ID: <54ed293c-9f7a-f82d-7a6d-35d51eb45b77@linaro.org> (raw)
In-Reply-To: <20211215104049.2030475-32-peter.maydell@linaro.org>

On 12/15/21 2:40 AM, Peter Maydell wrote:
> From: Jean-Philippe Brucker <jean-philippe@linaro.org>
> 
> Add two test cases for VIOT, one on the q35 machine and the other on
> virt. To test complex topologies the q35 test has two PCIe buses that
> bypass the IOMMU (and are therefore not described by VIOT), and two
> buses that are translated by virtio-iommu.
> 
> Reviewed-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
> Message-id: 20211210170415.583179-7-jean-philippe@linaro.org
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   tests/qtest/bios-tables-test.c | 38 ++++++++++++++++++++++++++++++++++
>   1 file changed, 38 insertions(+)

I should have been more careful while applying.  The aarch64 host failure for this is not 
transient as I first assumed:

PASS 5 qtest-aarch64/bios-tables-test /aarch64/acpi/virt/oem-fields
qemu-system-aarch64: kvm_init_vcpu: kvm_arch_init_vcpu failed (0): Invalid argument
Broken pipe
ERROR qtest-aarch64/bios-tables-test - too few tests run (expected 6, got 5)
make: *** [Makefile.mtest:312: run-test-37] Error 1


r~

> 
> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> index 258874167ef..58df53b15b5 100644
> --- a/tests/qtest/bios-tables-test.c
> +++ b/tests/qtest/bios-tables-test.c
> @@ -1465,6 +1465,42 @@ static void test_acpi_virt_tcg(void)
>       free_test_data(&data);
>   }
>   
> +static void test_acpi_q35_viot(void)
> +{
> +    test_data data = {
> +        .machine = MACHINE_Q35,
> +        .variant = ".viot",
> +    };
> +
> +    /*
> +     * To keep things interesting, two buses bypass the IOMMU.
> +     * VIOT should only describes the other two buses.
> +     */
> +    test_acpi_one("-machine default_bus_bypass_iommu=on "
> +                  "-device virtio-iommu-pci "
> +                  "-device pxb-pcie,bus_nr=0x10,id=pcie.100,bus=pcie.0 "
> +                  "-device pxb-pcie,bus_nr=0x20,id=pcie.200,bus=pcie.0,bypass_iommu=on "
> +                  "-device pxb-pcie,bus_nr=0x30,id=pcie.300,bus=pcie.0",
> +                  &data);
> +    free_test_data(&data);
> +}
> +
> +static void test_acpi_virt_viot(void)
> +{
> +    test_data data = {
> +        .machine = "virt",
> +        .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd",
> +        .uefi_fl2 = "pc-bios/edk2-arm-vars.fd",
> +        .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2",
> +        .ram_start = 0x40000000ULL,
> +        .scan_len = 128ULL * 1024 * 1024,
> +    };
> +
> +    test_acpi_one("-cpu cortex-a57 "
> +                  "-device virtio-iommu-pci", &data);
> +    free_test_data(&data);
> +}
> +
>   static void test_oem_fields(test_data *data)
>   {
>       int i;
> @@ -1639,6 +1675,7 @@ int main(int argc, char *argv[])
>               qtest_add_func("acpi/q35/kvm/xapic", test_acpi_q35_kvm_xapic);
>               qtest_add_func("acpi/q35/kvm/dmar", test_acpi_q35_kvm_dmar);
>           }
> +        qtest_add_func("acpi/q35/viot", test_acpi_q35_viot);
>       } else if (strcmp(arch, "aarch64") == 0) {
>           if (has_tcg) {
>               qtest_add_func("acpi/virt", test_acpi_virt_tcg);
> @@ -1646,6 +1683,7 @@ int main(int argc, char *argv[])
>               qtest_add_func("acpi/virt/memhp", test_acpi_virt_tcg_memhp);
>               qtest_add_func("acpi/virt/pxb", test_acpi_virt_tcg_pxb);
>               qtest_add_func("acpi/virt/oem-fields", test_acpi_oem_fields_virt);
> +            qtest_add_func("acpi/virt/viot", test_acpi_virt_viot);
>           }
>       }
>       ret = g_test_run();
> 



  reply	other threads:[~2021-12-16  1:00 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-15 10:40 [PULL 00/33] target-arm queue Peter Maydell
2021-12-15 10:40 ` [PULL 01/33] hw/intc: clean-up error reporting for failed ITS cmd Peter Maydell
2021-12-15 10:40 ` [PULL 02/33] docs: aspeed: Add new boards Peter Maydell
2021-12-15 10:40 ` [PULL 03/33] docs: aspeed: Update OpenBMC image URL Peter Maydell
2021-12-15 10:40 ` [PULL 04/33] docs: aspeed: Give an example of booting a kernel Peter Maydell
2021-12-15 10:40 ` [PULL 05/33] docs: aspeed: ADC is now modelled Peter Maydell
2021-12-15 10:40 ` [PULL 06/33] Fix STM32F2XX USART data register readout Peter Maydell
2021-12-15 10:40 ` [PULL 07/33] hw/intc/arm_gicv3: Extract gicv3_set_gicv3state from arm_gicv3_cpuif.c Peter Maydell
2021-12-15 10:40 ` [PULL 08/33] hw/intc/arm_gicv3: Introduce CONFIG_ARM_GIC_TCG Kconfig selector Peter Maydell
2021-12-15 10:40 ` [PULL 09/33] target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insn Peter Maydell
2021-12-15 10:40 ` [PULL 10/33] target/arm: Hoist pc_next to a local variable in arm_tr_translate_insn Peter Maydell
2021-12-15 10:40 ` [PULL 11/33] target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insn Peter Maydell
2021-12-15 10:40 ` [PULL 12/33] target/arm: Split arm_pre_translate_insn Peter Maydell
2021-12-15 10:40 ` [PULL 13/33] target/arm: Advance pc for arch single-step exception Peter Maydell
2021-12-15 10:40 ` [PULL 14/33] target/arm: Split compute_fsr_fsc out of arm_deliver_fault Peter Maydell
2021-12-15 10:40 ` [PULL 15/33] target/arm: Take an exception if PC is misaligned Peter Maydell
2021-12-15 10:40 ` [PULL 16/33] target/arm: Assert thumb pc is aligned Peter Maydell
2021-12-15 10:40 ` [PULL 17/33] target/arm: Suppress bp for exceptions with more priority Peter Maydell
2021-12-15 10:40 ` [PULL 18/33] tests/tcg: Add arm and aarch64 pc alignment tests Peter Maydell
2021-12-15 10:40 ` [PULL 19/33] target/i386: Use assert() to sanity-check b1 in SSE decode Peter Maydell
2021-12-15 10:40 ` [PULL 20/33] include/hw/i386: Don't include qemu-common.h in .h files Peter Maydell
2021-12-15 10:40 ` [PULL 21/33] target/hexagon/cpu.h: don't include qemu-common.h Peter Maydell
2021-12-15 10:40 ` [PULL 22/33] target/rx/cpu.h: Don't " Peter Maydell
2021-12-15 10:40 ` [PULL 23/33] hw/arm: Don't include qemu-common.h unnecessarily Peter Maydell
2021-12-15 10:40 ` [PULL 24/33] target/arm: Correct calculation of tlb range invalidate length Peter Maydell
2021-12-15 10:40 ` [PULL 25/33] hw/net: npcm7xx_emc fix missing queue_flush Peter Maydell
2021-12-15 10:40 ` [PULL 26/33] hw/arm/virt-acpi-build: Add VIOT table for virtio-iommu Peter Maydell
2021-12-15 10:40 ` [PULL 27/33] hw/arm/virt: Remove device tree restriction " Peter Maydell
2021-12-15 10:40 ` [PULL 28/33] hw/arm/virt: Reject instantiation of multiple IOMMUs Peter Maydell
2021-12-15 10:40 ` [PULL 29/33] hw/arm/virt: Use object_property_set instead of qdev_prop_set Peter Maydell
2021-12-15 10:40 ` [PULL 30/33] tests/acpi: allow updates of VIOT expected data files Peter Maydell
2021-12-15 10:40 ` [PULL 31/33] tests/acpi: add test case for VIOT Peter Maydell
2021-12-16  0:59   ` Richard Henderson [this message]
2021-12-16  9:57     ` Jean-Philippe Brucker
2021-12-16 11:28       ` Peter Maydell
2021-12-16 12:26         ` Richard Henderson
2021-12-16 12:56         ` Jean-Philippe Brucker
2021-12-15 10:40 ` [PULL 32/33] tests/acpi: add expected blobs for VIOT test on q35 machine Peter Maydell
2021-12-15 10:40 ` [PULL 33/33] tests/acpi: add expected blob for VIOT test on virt machine Peter Maydell
2021-12-15 20:12 ` [PULL 00/33] target-arm queue Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=54ed293c-9f7a-f82d-7a6d-35d51eb45b77@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=jean-philippe@linaro.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).