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([2001:8004:2728:2ad6:e985:c1c8:a4fc:508]) by smtp.gmail.com with ESMTPSA id jv3-20020a170903058300b001bb750189desm3621844plb.255.2024.01.12.13.54.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 12 Jan 2024 13:54:06 -0800 (PST) Message-ID: <551dac95-3346-41eb-aa8c-d22b19f8c4fd@linaro.org> Date: Sat, 13 Jan 2024 08:54:01 +1100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 4/9] target/hppa: Fix PDC address translation on PA2.0 with PSW.W=0 Content-Language: en-US To: deller@kernel.org, qemu-devel@nongnu.org Cc: Helge Deller , Bruno Haible References: <20240112102927.35406-1-deller@kernel.org> <20240112102927.35406-5-deller@kernel.org> From: Richard Henderson In-Reply-To: <20240112102927.35406-5-deller@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42b; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/12/24 21:29, deller@kernel.org wrote: > From: Helge Deller > > Fix the address translation for PDC space on PA2.0 if PSW.W=0. > Basically, for any address in the 32-bit PDC range from 0xf0000000 to > 0xf1000000 keep the lower 32-bits and just set the upper 32-bits to > 0xfffffff0. > > This mapping fixes the emulated power button in PDC space for 32- and > 64-bit machines and is how the physical C3700 machine seems to map > PDC. > > Figures H-10 and H-11 in the parisc2.0 spec [1] show that the 32-bit > region will be mapped somewhere into a higher and bigger 64-bit PDC > space. The start and end of this 64-bit space is defined by the > physical address bits. But the figures don't specifiy where exactly the > mapping will start inside that region. Tests on a real HP C3700 > regarding the address of the power button indicate, that the lower > 32-bits will stay the same though. > [1] https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf > > Signed-off-by: Helge Deller > Tested-by: Bruno Haible > --- > target/hppa/mem_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c > index 08abd1a9f9..011b192406 100644 > --- a/target/hppa/mem_helper.c > +++ b/target/hppa/mem_helper.c > @@ -56,7 +56,7 @@ hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr) > addr = (int32_t)addr; > } else { > /* PDC address space */ > - addr &= MAKE_64BIT_MASK(0, 24); > + addr = (uint32_t)addr; > addr |= -1ull << (TARGET_PHYS_ADDR_SPACE_BITS - 4); > } > return addr; Please adjust the code comment that immediately precedes this, not just within the commit message. r~