qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Paolo Bonzini <pbonzini@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: "Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
	patches@linaro.org, "Greg Bellows" <greg.bellows@linaro.org>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH 02/14] memory: Add MemTxAttrs, MemTxResult to io_mem_read and io_mem_write
Date: Wed, 08 Apr 2015 12:51:48 +0200	[thread overview]
Message-ID: <55250844.8080702@redhat.com> (raw)
In-Reply-To: <1428437400-8474-3-git-send-email-peter.maydell@linaro.org>



On 07/04/2015 22:09, Peter Maydell wrote:
> Add a MemTxAttrs argument to the io_mem_read() and io_mem_write()
> functions, and make them return MemTxResult rather than bool,
> thus pushing these new arguments out one level of the callstack
> (all the callers callers currently pass MEMTXATTRS_UNSPECIFIED
> and convert the return value back to bool or ignore it).
> 
> Note that this involves moving the io_mem_read and io_mem_write
> prototypes from exec-all.h to memory.h. This allows them to
> see the MemTxResult type, and is a better location anyway,
> since they are implemented in memory.c and are operations on
> MemoryRegions.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  exec.c                   | 33 +++++++++++++++++----------------
>  hw/s390x/s390-pci-inst.c |  7 ++++---
>  hw/vfio/pci.c            |  4 ++--
>  include/exec/exec-all.h  |  4 ----
>  include/exec/memory.h    | 12 ++++++++++++
>  memory.c                 | 13 ++++++-------
>  softmmu_template.h       |  4 ++--
>  7 files changed, 43 insertions(+), 34 deletions(-)
> 
> diff --git a/exec.c b/exec.c
> index 874ecfc..52e7a2a 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -2312,7 +2312,8 @@ bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
>      uint64_t val;
>      hwaddr addr1;
>      MemoryRegion *mr;
> -    bool error = false;
> +    MemTxResult result = MEMTX_OK;
> +    MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
>  
>      while (len > 0) {
>          l = len;
> @@ -2327,22 +2328,22 @@ bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
>                  case 8:
>                      /* 64 bit write access */
>                      val = ldq_p(buf);
> -                    error |= io_mem_write(mr, addr1, val, 8);
> +                    result |= io_mem_write(mr, addr1, val, 8, attrs);
>                      break;
>                  case 4:
>                      /* 32 bit write access */
>                      val = ldl_p(buf);
> -                    error |= io_mem_write(mr, addr1, val, 4);
> +                    result |= io_mem_write(mr, addr1, val, 4, attrs);
>                      break;
>                  case 2:
>                      /* 16 bit write access */
>                      val = lduw_p(buf);
> -                    error |= io_mem_write(mr, addr1, val, 2);
> +                    result |= io_mem_write(mr, addr1, val, 2, attrs);
>                      break;
>                  case 1:
>                      /* 8 bit write access */
>                      val = ldub_p(buf);
> -                    error |= io_mem_write(mr, addr1, val, 1);
> +                    result |= io_mem_write(mr, addr1, val, 1, attrs);
>                      break;
>                  default:
>                      abort();
> @@ -2361,22 +2362,22 @@ bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
>                  switch (l) {
>                  case 8:
>                      /* 64 bit read access */
> -                    error |= io_mem_read(mr, addr1, &val, 8);
> +                    result |= io_mem_read(mr, addr1, &val, 8, attrs);
>                      stq_p(buf, val);
>                      break;
>                  case 4:
>                      /* 32 bit read access */
> -                    error |= io_mem_read(mr, addr1, &val, 4);
> +                    result |= io_mem_read(mr, addr1, &val, 4, attrs);
>                      stl_p(buf, val);
>                      break;
>                  case 2:
>                      /* 16 bit read access */
> -                    error |= io_mem_read(mr, addr1, &val, 2);
> +                    result |= io_mem_read(mr, addr1, &val, 2, attrs);
>                      stw_p(buf, val);
>                      break;
>                  case 1:
>                      /* 8 bit read access */
> -                    error |= io_mem_read(mr, addr1, &val, 1);
> +                    result |= io_mem_read(mr, addr1, &val, 1, attrs);
>                      stb_p(buf, val);
>                      break;
>                  default:
> @@ -2393,7 +2394,7 @@ bool address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
>          addr += l;
>      }
>  
> -    return error;
> +    return result;
>  }
>  
>  bool address_space_write(AddressSpace *as, hwaddr addr,
> @@ -2669,7 +2670,7 @@ static inline uint32_t ldl_phys_internal(AddressSpace *as, hwaddr addr,
>      mr = address_space_translate(as, addr, &addr1, &l, false);
>      if (l < 4 || !memory_access_is_direct(mr, false)) {
>          /* I/O case */
> -        io_mem_read(mr, addr1, &val, 4);
> +        io_mem_read(mr, addr1, &val, 4, MEMTXATTRS_UNSPECIFIED);
>  #if defined(TARGET_WORDS_BIGENDIAN)
>          if (endian == DEVICE_LITTLE_ENDIAN) {
>              val = bswap32(val);
> @@ -2728,7 +2729,7 @@ static inline uint64_t ldq_phys_internal(AddressSpace *as, hwaddr addr,
>                                   false);
>      if (l < 8 || !memory_access_is_direct(mr, false)) {
>          /* I/O case */
> -        io_mem_read(mr, addr1, &val, 8);
> +        io_mem_read(mr, addr1, &val, 8, MEMTXATTRS_UNSPECIFIED);
>  #if defined(TARGET_WORDS_BIGENDIAN)
>          if (endian == DEVICE_LITTLE_ENDIAN) {
>              val = bswap64(val);
> @@ -2795,7 +2796,7 @@ static inline uint32_t lduw_phys_internal(AddressSpace *as, hwaddr addr,
>                                   false);
>      if (l < 2 || !memory_access_is_direct(mr, false)) {
>          /* I/O case */
> -        io_mem_read(mr, addr1, &val, 2);
> +        io_mem_read(mr, addr1, &val, 2, MEMTXATTRS_UNSPECIFIED);
>  #if defined(TARGET_WORDS_BIGENDIAN)
>          if (endian == DEVICE_LITTLE_ENDIAN) {
>              val = bswap16(val);
> @@ -2853,7 +2854,7 @@ void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val)
>      mr = address_space_translate(as, addr, &addr1, &l,
>                                   true);
>      if (l < 4 || !memory_access_is_direct(mr, true)) {
> -        io_mem_write(mr, addr1, val, 4);
> +        io_mem_write(mr, addr1, val, 4, MEMTXATTRS_UNSPECIFIED);
>      } else {
>          addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
>          ptr = qemu_get_ram_ptr(addr1);
> @@ -2892,7 +2893,7 @@ static inline void stl_phys_internal(AddressSpace *as,
>              val = bswap32(val);
>          }
>  #endif
> -        io_mem_write(mr, addr1, val, 4);
> +        io_mem_write(mr, addr1, val, 4, MEMTXATTRS_UNSPECIFIED);
>      } else {
>          /* RAM case */
>          addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
> @@ -2955,7 +2956,7 @@ static inline void stw_phys_internal(AddressSpace *as,
>              val = bswap16(val);
>          }
>  #endif
> -        io_mem_write(mr, addr1, val, 2);
> +        io_mem_write(mr, addr1, val, 2, MEMTXATTRS_UNSPECIFIED);
>      } else {
>          /* RAM case */
>          addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
> diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c
> index 08d8aa6..78ff9c0 100644
> --- a/hw/s390x/s390-pci-inst.c
> +++ b/hw/s390x/s390-pci-inst.c
> @@ -331,7 +331,7 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2)
>              return 0;
>          }
>          MemoryRegion *mr = pbdev->pdev->io_regions[pcias].memory;
> -        io_mem_read(mr, offset, &data, len);
> +        io_mem_read(mr, offset, &data, len, MEMTXATTRS_UNSPECIFIED);
>      } else if (pcias == 15) {
>          if ((4 - (offset & 0x3)) < len) {
>              program_interrupt(env, PGM_OPERAND, 4);
> @@ -456,7 +456,7 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2)
>              mr = pbdev->pdev->io_regions[pcias].memory;
>          }
>  
> -        io_mem_write(mr, offset, data, len);
> +        io_mem_write(mr, offset, data, len, MEMTXATTRS_UNSPECIFIED);
>      } else if (pcias == 15) {
>          if ((4 - (offset & 0x3)) < len) {
>              program_interrupt(env, PGM_OPERAND, 4);
> @@ -606,7 +606,8 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr)
>      }
>  
>      for (i = 0; i < len / 8; i++) {
> -        io_mem_write(mr, env->regs[r3] + i * 8, ldq_p(buffer + i * 8), 8);
> +        io_mem_write(mr, env->regs[r3] + i * 8, ldq_p(buffer + i * 8), 8,
> +                     MEMTXATTRS_UNSPECIFIED);
>      }
>  
>      setcc(cpu, ZPCI_PCI_LS_OK);
> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
> index 6b80539..3e1df0c 100644
> --- a/hw/vfio/pci.c
> +++ b/hw/vfio/pci.c
> @@ -1533,7 +1533,7 @@ static uint64_t vfio_rtl8168_window_quirk_read(void *opaque,
>  
>              io_mem_read(&vdev->pdev.msix_table_mmio,
>                          (hwaddr)(quirk->data.address_match & 0xfff),
> -                        &val, size);
> +                        &val, size, MEMTXATTRS_UNSPECIFIED);
>              return val;
>          }
>      }
> @@ -1563,7 +1563,7 @@ static void vfio_rtl8168_window_quirk_write(void *opaque, hwaddr addr,
>  
>                  io_mem_write(&vdev->pdev.msix_table_mmio,
>                               (hwaddr)(quirk->data.address_match & 0xfff),
> -                             data, size);
> +                             data, size, MEMTXATTRS_UNSPECIFIED);
>              }
>  
>              quirk->data.flags = 1;
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 8eb0db3..ff1bc3e 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -341,10 +341,6 @@ void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align));
>  
>  struct MemoryRegion *iotlb_to_region(CPUState *cpu,
>                                       hwaddr index);
> -bool io_mem_read(struct MemoryRegion *mr, hwaddr addr,
> -                 uint64_t *pvalue, unsigned size);
> -bool io_mem_write(struct MemoryRegion *mr, hwaddr addr,
> -                  uint64_t value, unsigned size);
>  
>  void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx,
>                uintptr_t retaddr);
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index 703d9e5..de2849d 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
> @@ -1053,6 +1053,18 @@ void memory_global_dirty_log_stop(void);
>  void mtree_info(fprintf_function mon_printf, void *f);
>  
>  /**
> + * io_mem_read: perform an IO read directly to the specified MemoryRegion
> + */
> +MemTxResult io_mem_read(struct MemoryRegion *mr, hwaddr addr,
> +                        uint64_t *pvalue, unsigned size, MemTxAttrs attrs);
> +
> +/**
> + * io_mem_write: perform an IO write directly to the specified MemoryRegion
> + */
> +MemTxResult io_mem_write(struct MemoryRegion *mr, hwaddr addr,
> +                         uint64_t value, unsigned size, MemTxAttrs attrs);
> +
> +/**
>   * address_space_init: initializes an address space
>   *
>   * @as: an uninitialized #AddressSpace
> diff --git a/memory.c b/memory.c
> index 9bb5674..14cda7f 100644
> --- a/memory.c
> +++ b/memory.c
> @@ -2063,17 +2063,16 @@ void address_space_destroy(AddressSpace *as)
>      call_rcu(as, do_address_space_destroy, rcu);
>  }
>  
> -bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
> +MemTxResult io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval,
> +                        unsigned size, MemTxAttrs attrs)
>  {
> -    return memory_region_dispatch_read(mr, addr, pval, size,
> -                                       MEMTXATTRS_UNSPECIFIED);
> +    return memory_region_dispatch_read(mr, addr, pval, size, attrs);
>  }
>  
> -bool io_mem_write(MemoryRegion *mr, hwaddr addr,
> -                  uint64_t val, unsigned size)
> +MemTxResult io_mem_write(MemoryRegion *mr, hwaddr addr,
> +                         uint64_t val, unsigned size, MemTxAttrs attrs)
>  {
> -    return memory_region_dispatch_write(mr, addr, val, size,
> -                                        MEMTXATTRS_UNSPECIFIED);
> +    return memory_region_dispatch_write(mr, addr, val, size, attrs);
>  }
>  
>  typedef struct MemoryRegionList MemoryRegionList;
> diff --git a/softmmu_template.h b/softmmu_template.h
> index 0e3dd35..4b9bae7 100644
> --- a/softmmu_template.h
> +++ b/softmmu_template.h
> @@ -158,7 +158,7 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env,
>      }
>  
>      cpu->mem_io_vaddr = addr;
> -    io_mem_read(mr, physaddr, &val, 1 << SHIFT);
> +    io_mem_read(mr, physaddr, &val, 1 << SHIFT, MEMTXATTRS_UNSPECIFIED);
>      return val;
>  }
>  #endif
> @@ -378,7 +378,7 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
>  
>      cpu->mem_io_vaddr = addr;
>      cpu->mem_io_pc = retaddr;
> -    io_mem_write(mr, physaddr, val, 1 << SHIFT);
> +    io_mem_write(mr, physaddr, val, 1 << SHIFT, MEMTXATTRS_UNSPECIFIED);
>  }
>  
>  void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
> 

This could be the occasion to drop io_mem_read/io_mem_write and use
memory_region_dispatch_read/memory_region_dispatch_write altogether.  As
you prefer.

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>

  reply	other threads:[~2015-04-08 10:51 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-07 20:09 [Qemu-devel] [PATCH 00/14] Add memory attributes and use them in ARM Peter Maydell
2015-04-07 20:09 ` [Qemu-devel] [PATCH 01/14] memory: Define API for MemoryRegionOps to take attrs and return status Peter Maydell
2015-04-08 10:49   ` Paolo Bonzini
2015-04-09  8:55   ` Edgar E. Iglesias
2015-04-09  9:04     ` Peter Maydell
2015-04-09  9:21       ` Paolo Bonzini
2015-04-10  2:07         ` Edgar E. Iglesias
2015-04-10 14:51           ` Peter Maydell
2015-04-11 10:27             ` Edgar E. Iglesias
2015-04-09  9:32       ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 02/14] memory: Add MemTxAttrs, MemTxResult to io_mem_read and io_mem_write Peter Maydell
2015-04-08 10:51   ` Paolo Bonzini [this message]
2015-04-08 10:59     ` Peter Maydell
2015-04-08 11:13       ` Paolo Bonzini
2015-04-09  8:59   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 03/14] Make CPU iotlb a structure rather than a plain hwaddr Peter Maydell
2015-04-08 10:52   ` Paolo Bonzini
2015-04-09  9:02   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 04/14] Add MemTxAttrs to the IOTLB Peter Maydell
2015-04-08 10:53   ` Paolo Bonzini
2015-04-09  9:04   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 05/14] exec.c: Convert subpage memory ops to _with_attrs Peter Maydell
2015-04-08 10:54   ` Paolo Bonzini
2015-04-09  9:07   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 06/14] exec.c: Make address_space_rw take transaction attributes Peter Maydell
2015-04-08 12:55   ` Paolo Bonzini
2015-04-09  9:59   ` Edgar E. Iglesias
2015-04-09 10:14     ` Peter Maydell
2015-04-09 10:21       ` Paolo Bonzini
2015-04-09 10:43         ` Peter Maydell
2015-04-09 11:40           ` Paolo Bonzini
2015-04-09 11:43             ` Peter Maydell
2015-04-07 20:09 ` [Qemu-devel] [PATCH 07/14] exec.c: Add new address_space_ld*/st* functions Peter Maydell
2015-04-08 11:03   ` Paolo Bonzini
2015-04-09 11:49     ` Peter Maydell
2015-04-09 12:00       ` Paolo Bonzini
2015-04-09 12:38         ` Peter Maydell
2015-04-09 12:42           ` Paolo Bonzini
2015-04-09 10:34   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 08/14] Switch non-CPU callers from ld/st*_phys to address_space_ld/st* Peter Maydell
2015-04-09 10:44   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 09/14] exec.c: Capture the memory attributes for a watchpoint hit Peter Maydell
2015-04-08 11:04   ` Paolo Bonzini
2015-04-08 11:14     ` Peter Maydell
2015-04-07 20:09 ` [Qemu-devel] [PATCH 10/14] target-arm: Honour NS bits in page tables Peter Maydell
2015-04-09 11:23   ` Edgar E. Iglesias
2015-04-09 14:14     ` Peter Maydell
2015-04-09 14:23       ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 11/14] target-arm: Use correct memory attributes for page table walks Peter Maydell
2015-04-09 11:34   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 12/14] target-arm: Add user-mode transaction attribute Peter Maydell
2015-04-07 20:09 ` [Qemu-devel] [PATCH 13/14] target-arm: Use attribute info to handle user-only watchpoints Peter Maydell
2015-04-09 11:37   ` Edgar E. Iglesias
2015-04-07 20:10 ` [Qemu-devel] [PATCH 14/14] target-arm: Check watchpoints against CPU security state Peter Maydell
2015-04-09 11:38   ` Edgar E. Iglesias
2015-04-09  9:37 ` [Qemu-devel] [PATCH 00/14] Add memory attributes and use them in ARM Edgar E. Iglesias

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=55250844.8080702@redhat.com \
    --to=pbonzini@redhat.com \
    --cc=alex.bennee@linaro.org \
    --cc=edgar.iglesias@gmail.com \
    --cc=greg.bellows@linaro.org \
    --cc=patches@linaro.org \
    --cc=peter.crosthwaite@xilinx.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=rth@twiddle.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).