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From: Paolo Bonzini <pbonzini@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: "Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
	patches@linaro.org, "Greg Bellows" <greg.bellows@linaro.org>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH 04/14] Add MemTxAttrs to the IOTLB
Date: Wed, 08 Apr 2015 12:53:21 +0200	[thread overview]
Message-ID: <552508A1.7040804@redhat.com> (raw)
In-Reply-To: <1428437400-8474-5-git-send-email-peter.maydell@linaro.org>



On 07/04/2015 22:09, Peter Maydell wrote:
> Add a MemTxAttrs field to the IOTLB, and allow target-specific
> code to set it via a new tlb_set_page_with_attrs() function;
> pass the attributes through to the device when making IO accesses.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  cputlb.c                | 18 +++++++++++++++---
>  include/exec/cpu-defs.h |  2 ++
>  include/exec/exec-all.h |  3 +++
>  softmmu_template.h      |  4 ++--
>  4 files changed, 22 insertions(+), 5 deletions(-)
> 
> diff --git a/cputlb.c b/cputlb.c
> index 5e1cb8f..7606548 100644
> --- a/cputlb.c
> +++ b/cputlb.c
> @@ -249,9 +249,9 @@ static void tlb_add_large_page(CPUArchState *env, target_ulong vaddr,
>   * Called from TCG-generated code, which is under an RCU read-side
>   * critical section.
>   */
> -void tlb_set_page(CPUState *cpu, target_ulong vaddr,
> -                  hwaddr paddr, int prot,
> -                  int mmu_idx, target_ulong size)
> +void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr,
> +                             hwaddr paddr, MemTxAttrs attrs, int prot,
> +                             int mmu_idx, target_ulong size)
>  {
>      CPUArchState *env = cpu->env_ptr;
>      MemoryRegionSection *section;
> @@ -302,6 +302,7 @@ void tlb_set_page(CPUState *cpu, target_ulong vaddr,
>  
>      /* refill the tlb */
>      env->iotlb[mmu_idx][index].addr = iotlb - vaddr;
> +    env->iotlb[mmu_idx][index].attrs = attrs;
>      te->addend = addend - vaddr;
>      if (prot & PAGE_READ) {
>          te->addr_read = address;
> @@ -331,6 +332,17 @@ void tlb_set_page(CPUState *cpu, target_ulong vaddr,
>      }
>  }
>  
> +/* Add a new TLB entry, but without specifying the memory
> + * transaction attributes to be used.
> + */
> +void tlb_set_page(CPUState *cpu, target_ulong vaddr,
> +                  hwaddr paddr, int prot,
> +                  int mmu_idx, target_ulong size)
> +{
> +    tlb_set_page_with_attrs(cpu, vaddr, paddr, MEMTXATTRS_UNSPECIFIED,
> +                            prot, mmu_idx, size);
> +}
> +
>  /* NOTE: this function can trigger an exception */
>  /* NOTE2: the returned address is not exactly the physical address: it
>   * is actually a ram_addr_t (in system mode; the user mode emulation
> diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
> index 7f88185..3f56546 100644
> --- a/include/exec/cpu-defs.h
> +++ b/include/exec/cpu-defs.h
> @@ -30,6 +30,7 @@
>  #ifndef CONFIG_USER_ONLY
>  #include "exec/hwaddr.h"
>  #endif
> +#include "exec/memattrs.h"
>  
>  #ifndef TARGET_LONG_BITS
>  #error TARGET_LONG_BITS must be defined before including this header
> @@ -109,6 +110,7 @@ QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS));
>   */
>  typedef struct CPUIOTLBEntry {
>      hwaddr addr;
> +    MemTxAttrs attrs;
>  } CPUIOTLBEntry;
>  
>  #define CPU_COMMON_TLB \
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index ff1bc3e..b58cd47 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -105,6 +105,9 @@ void tlb_flush(CPUState *cpu, int flush_global);
>  void tlb_set_page(CPUState *cpu, target_ulong vaddr,
>                    hwaddr paddr, int prot,
>                    int mmu_idx, target_ulong size);
> +void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr,
> +                             hwaddr paddr, MemTxAttrs attrs,
> +                             int prot, int mmu_idx, target_ulong size);
>  void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr);
>  #else
>  static inline void tlb_flush_page(CPUState *cpu, target_ulong addr)
> diff --git a/softmmu_template.h b/softmmu_template.h
> index 7a36550..7310a93 100644
> --- a/softmmu_template.h
> +++ b/softmmu_template.h
> @@ -159,7 +159,7 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env,
>      }
>  
>      cpu->mem_io_vaddr = addr;
> -    io_mem_read(mr, physaddr, &val, 1 << SHIFT, MEMTXATTRS_UNSPECIFIED);
> +    io_mem_read(mr, physaddr, &val, 1 << SHIFT, iotlbentry->attrs);
>      return val;
>  }
>  #endif
> @@ -380,7 +380,7 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
>  
>      cpu->mem_io_vaddr = addr;
>      cpu->mem_io_pc = retaddr;
> -    io_mem_write(mr, physaddr, val, 1 << SHIFT, MEMTXATTRS_UNSPECIFIED);
> +    io_mem_write(mr, physaddr, val, 1 << SHIFT, iotlbentry->attrs);
>  }
>  
>  void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
> 

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>

  reply	other threads:[~2015-04-08 10:53 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-07 20:09 [Qemu-devel] [PATCH 00/14] Add memory attributes and use them in ARM Peter Maydell
2015-04-07 20:09 ` [Qemu-devel] [PATCH 01/14] memory: Define API for MemoryRegionOps to take attrs and return status Peter Maydell
2015-04-08 10:49   ` Paolo Bonzini
2015-04-09  8:55   ` Edgar E. Iglesias
2015-04-09  9:04     ` Peter Maydell
2015-04-09  9:21       ` Paolo Bonzini
2015-04-10  2:07         ` Edgar E. Iglesias
2015-04-10 14:51           ` Peter Maydell
2015-04-11 10:27             ` Edgar E. Iglesias
2015-04-09  9:32       ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 02/14] memory: Add MemTxAttrs, MemTxResult to io_mem_read and io_mem_write Peter Maydell
2015-04-08 10:51   ` Paolo Bonzini
2015-04-08 10:59     ` Peter Maydell
2015-04-08 11:13       ` Paolo Bonzini
2015-04-09  8:59   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 03/14] Make CPU iotlb a structure rather than a plain hwaddr Peter Maydell
2015-04-08 10:52   ` Paolo Bonzini
2015-04-09  9:02   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 04/14] Add MemTxAttrs to the IOTLB Peter Maydell
2015-04-08 10:53   ` Paolo Bonzini [this message]
2015-04-09  9:04   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 05/14] exec.c: Convert subpage memory ops to _with_attrs Peter Maydell
2015-04-08 10:54   ` Paolo Bonzini
2015-04-09  9:07   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 06/14] exec.c: Make address_space_rw take transaction attributes Peter Maydell
2015-04-08 12:55   ` Paolo Bonzini
2015-04-09  9:59   ` Edgar E. Iglesias
2015-04-09 10:14     ` Peter Maydell
2015-04-09 10:21       ` Paolo Bonzini
2015-04-09 10:43         ` Peter Maydell
2015-04-09 11:40           ` Paolo Bonzini
2015-04-09 11:43             ` Peter Maydell
2015-04-07 20:09 ` [Qemu-devel] [PATCH 07/14] exec.c: Add new address_space_ld*/st* functions Peter Maydell
2015-04-08 11:03   ` Paolo Bonzini
2015-04-09 11:49     ` Peter Maydell
2015-04-09 12:00       ` Paolo Bonzini
2015-04-09 12:38         ` Peter Maydell
2015-04-09 12:42           ` Paolo Bonzini
2015-04-09 10:34   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 08/14] Switch non-CPU callers from ld/st*_phys to address_space_ld/st* Peter Maydell
2015-04-09 10:44   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 09/14] exec.c: Capture the memory attributes for a watchpoint hit Peter Maydell
2015-04-08 11:04   ` Paolo Bonzini
2015-04-08 11:14     ` Peter Maydell
2015-04-07 20:09 ` [Qemu-devel] [PATCH 10/14] target-arm: Honour NS bits in page tables Peter Maydell
2015-04-09 11:23   ` Edgar E. Iglesias
2015-04-09 14:14     ` Peter Maydell
2015-04-09 14:23       ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 11/14] target-arm: Use correct memory attributes for page table walks Peter Maydell
2015-04-09 11:34   ` Edgar E. Iglesias
2015-04-07 20:09 ` [Qemu-devel] [PATCH 12/14] target-arm: Add user-mode transaction attribute Peter Maydell
2015-04-07 20:09 ` [Qemu-devel] [PATCH 13/14] target-arm: Use attribute info to handle user-only watchpoints Peter Maydell
2015-04-09 11:37   ` Edgar E. Iglesias
2015-04-07 20:10 ` [Qemu-devel] [PATCH 14/14] target-arm: Check watchpoints against CPU security state Peter Maydell
2015-04-09 11:38   ` Edgar E. Iglesias
2015-04-09  9:37 ` [Qemu-devel] [PATCH 00/14] Add memory attributes and use them in ARM Edgar E. Iglesias

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