From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34657) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YimtY-0006KV-7T for qemu-devel@nongnu.org; Thu, 16 Apr 2015 12:44:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YimtT-00013u-Ux for qemu-devel@nongnu.org; Thu, 16 Apr 2015 12:44:04 -0400 Received: from e9.ny.us.ibm.com ([32.97.182.139]:46617) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YimtT-00012i-P8 for qemu-devel@nongnu.org; Thu, 16 Apr 2015 12:43:59 -0400 Received: from /spool/local by e9.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 16 Apr 2015 12:43:56 -0400 Message-ID: <552FE6C8.106@linux.vnet.ibm.com> Date: Thu, 16 Apr 2015 12:43:52 -0400 From: Stefan Berger MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] ppc64 not resuming with v2.3.0-rc3 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: agraf@suse.de, Mark Cave-Ayland , qemu-devel , qemu-ppc@nongnu.org The culprit patch seems to be the following commit. If I remove these changes from the tip of the tree it works again (on SLOF level): commit 2360b6e84f78d41fa0f76555a947148b73645259 Author: Mark Cave-Ayland Date: Mon Feb 9 22:40:48 2015 +0000 target-ppc: force update of msr bits in cpu_post_load Since env->msr has already been restored by the time cpu_post_load is called, make sure that ppc_store_msr() is explicitly called with all msr bits except MSR_TGPR marked as invalid. This solves the issue where MSR flags aren't set correctly when restoring a VM snapshot, in particular the internal env->excp_prefix value when MSR_EP has been altered by a guest. Signed-off-by: Mark Cave-Ayland Signed-off-by: Alexander Graf diff --git a/target-ppc/machine.c b/target-ppc/machine.c index c801b82..3921012 100644 --- a/target-ppc/machine.c +++ b/target-ppc/machine.c @@ -159,6 +159,7 @@ static int cpu_post_load(void *opaque, int version_id) PowerPCCPU *cpu = opaque; CPUPPCState *env = &cpu->env; int i; + target_ulong msr; /* * We always ignore the source PVR. The user or management @@ -190,7 +191,12 @@ static int cpu_post_load(void *opaque, int version_id) /* Restore htab_base and htab_mask variables */ ppc_store_sdr1(env, env->spr[SPR_SDR1]); } - hreg_compute_hflags(env); + + /* Mark msr bits except MSR_TGPR invalid before restoring */ + msr = env->msr; + env->msr ^= ~(1ULL << MSR_TGPR); + ppc_store_msr(env, msr); + hreg_compute_mem_idx(env); return 0; Stefan PS: Sorry for the late notice (-rc3), but I only started doing things with ppc64 a few days ago.