From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49761) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YkZz8-0005jB-1v for qemu-devel@nongnu.org; Tue, 21 Apr 2015 11:21:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YkZz3-00063b-V6 for qemu-devel@nongnu.org; Tue, 21 Apr 2015 11:21:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38556) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YkZz3-00063Q-ND for qemu-devel@nongnu.org; Tue, 21 Apr 2015 11:21:09 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id t3LFL8Ht023250 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Tue, 21 Apr 2015 11:21:09 -0400 Message-ID: <55366ADF.4000707@redhat.com> Date: Tue, 21 Apr 2015 17:21:03 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1429521560-2743-1-git-send-email-kraxel@redhat.com> <1429521560-2743-6-git-send-email-kraxel@redhat.com> <55365F05.1050402@redhat.com> <553660EC.4040902@redhat.com> <5536672A.6060809@redhat.com> In-Reply-To: <5536672A.6060809@redhat.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 6/6] [wip] tseg, part2, not (yet) tested List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Laszlo Ersek , Gerd Hoffmann Cc: qemu-devel@nongnu.org, mst@redhat.com On 21/04/2015 17:05, Laszlo Ersek wrote: > > Yet another question -- as far as I understand, I should have enough > info (with my pending questions of course) for EFI_SMM_ACCESS2_PROTOCOL. > I've now reviewed EFI_SMM_CONTROL2_PROTOCOL too, and AFAICS the only > thing I need to know for it is "how to raise an SMI, synchronously". > What are the plans for that? An ioport write perhaps? (I skimmed the > ICH9 spec, but whatever I found seemed to be quite inappropriate.) You can write to ioport 0xb2 in order to raise the SMI, or you can also write to the APIC ICR register with LOCAL_APIC_DELIVERY_MODE_SMI. I am not sure if the latter is synchronous. If you use the former, it probably should be protected by some kind of spinlock (I don't know the details of UEFI multi tasking) and you also have to set the APMC_EN and GBL_SMI_EN bits of the SMI_EN register. Paolo