From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38856) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YmyE4-0008Gl-6g for qemu-devel@nongnu.org; Tue, 28 Apr 2015 01:38:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YmyE1-0004T0-0O for qemu-devel@nongnu.org; Tue, 28 Apr 2015 01:38:32 -0400 Received: from mx2.parallels.com ([199.115.105.18]:43880) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YmyE0-0004SG-Qw for qemu-devel@nongnu.org; Tue, 28 Apr 2015 01:38:28 -0400 Message-ID: <553F1CC6.3080305@openvz.org> Date: Tue, 28 Apr 2015 08:38:14 +0300 From: "Denis V. Lunev" MIME-Version: 1.0 References: <1428414832-3104-1-git-send-email-den@openvz.org> In-Reply-To: <1428414832-3104-1-git-send-email-den@openvz.org> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 1/1] apic_common: improve readability of apic_reset_common List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , qemu-devel@nongnu.org, =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= On 07/04/15 16:53, Denis V. Lunev wrote: > Replace call of cpu_is_bsp(s->cpu) which really returns > !!(s->apicbase & MSR_IA32_APICBASE_BSP) > with directly collected value. Due to this the tracepoint > trace_cpu_get_apic_base((uint64_t)s->apicbase); > will not be hit anymore in apic_reset_common. > > Signed-off-by: Denis V. Lunev > CC: Andreas Färber > CC: Paolo Bonzini > --- > hw/intc/apic_common.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c > index 042e960..7a0c7e2 100644 > --- a/hw/intc/apic_common.c > +++ b/hw/intc/apic_common.c > @@ -233,11 +233,10 @@ static void apic_reset_common(DeviceState *dev) > { > APICCommonState *s = APIC_COMMON(dev); > APICCommonClass *info = APIC_COMMON_GET_CLASS(s); > - bool bsp; > + uint32_t bsp; > > - bsp = cpu_is_bsp(s->cpu); > - s->apicbase = APIC_DEFAULT_ADDRESS | > - (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; > + bsp = s->apicbase & MSR_IA32_APICBASE_BSP; > + s->apicbase = APIC_DEFAULT_ADDRESS | bsp | MSR_IA32_APICBASE_ENABLE; > > s->vapic_paddr = 0; > info->vapic_base_update(s); ping