From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57967) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yn2Wi-0003og-PT for qemu-devel@nongnu.org; Tue, 28 Apr 2015 06:14:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yn2Wf-0001IC-Ho for qemu-devel@nongnu.org; Tue, 28 Apr 2015 06:14:04 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54802) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yn2Wf-0001Hu-CW for qemu-devel@nongnu.org; Tue, 28 Apr 2015 06:14:01 -0400 Message-ID: <553F57AA.7010607@redhat.com> Date: Tue, 28 Apr 2015 11:49:30 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1428414832-3104-1-git-send-email-den@openvz.org> In-Reply-To: <1428414832-3104-1-git-send-email-den@openvz.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 1/1] apic_common: improve readability of apic_reset_common List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Denis V. Lunev" Cc: qemu-devel@nongnu.org, =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= On 07/04/2015 15:53, Denis V. Lunev wrote: > Replace call of cpu_is_bsp(s->cpu) which really returns > !!(s->apicbase & MSR_IA32_APICBASE_BSP) > with directly collected value. Due to this the tracepoint > trace_cpu_get_apic_base((uint64_t)s->apicbase); > will not be hit anymore in apic_reset_common. >=20 > Signed-off-by: Denis V. Lunev > CC: Andreas F=C3=A4rber > CC: Paolo Bonzini > --- > hw/intc/apic_common.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) >=20 > diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c > index 042e960..7a0c7e2 100644 > --- a/hw/intc/apic_common.c > +++ b/hw/intc/apic_common.c > @@ -233,11 +233,10 @@ static void apic_reset_common(DeviceState *dev) > { > APICCommonState *s =3D APIC_COMMON(dev); > APICCommonClass *info =3D APIC_COMMON_GET_CLASS(s); > - bool bsp; > + uint32_t bsp; > =20 > - bsp =3D cpu_is_bsp(s->cpu); > - s->apicbase =3D APIC_DEFAULT_ADDRESS | > - (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; > + bsp =3D s->apicbase & MSR_IA32_APICBASE_BSP; > + s->apicbase =3D APIC_DEFAULT_ADDRESS | bsp | MSR_IA32_APICBASE_ENA= BLE; > =20 > s->vapic_paddr =3D 0; > info->vapic_base_update(s); >=20 Applied, thanks. Paolo