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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id km12-20020a17090327cc00b001dd5ba34f3esm4066180plb.278.2024.03.15.10.06.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 15 Mar 2024 10:06:48 -0700 (PDT) Message-ID: <553e5eee-7af5-4ecf-b994-1bdd6ca8a820@linaro.org> Date: Fri, 15 Mar 2024 07:06:44 -1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V4 1/1] target/loongarch: Fixed tlb huge page loading issue Content-Language: en-US To: lixianglai , qemu-devel@nongnu.org Cc: maobibo@loongson.cn, Song Gao , Xiaojuan Yang , zhaotianrui@loongson.cn, yijun@loongson.cn, wuruiyang@loongson.cn References: <0e940b2aee9a5c29bb41d6a9611955482d250325.1710379781.git.lixianglai@loongson.cn> <60733d71-daba-4f4a-a184-357526a3b3a0@linaro.org> <05a4b109-6e86-6ecf-4399-c0f9d5fd1a6f@loongson.cn> <90bde2c9-46fd-458c-9c32-22dac25bb069@linaro.org> <874eb7af-d1a0-0777-bc10-555381b85118@loongson.cn> From: Richard Henderson In-Reply-To: <874eb7af-d1a0-0777-bc10-555381b85118@loongson.cn> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/14/24 23:01, lixianglai wrote: > Hi Richard : > >> On 3/14/24 20:22, lixianglai wrote: >>> Hi Richard: >>>> On 3/13/24 15:33, Xianglai Li wrote: >>>>> +    if (unlikely((level == 0) || (level > 4))) { >>>>> +        return base; >>>>> +    } >> ... >>>> Perhaps it would be worthwhile to add another for the level==0 or > 4 case above? >>>> >>> A normal level 4 page table should not print an error log, >>> >>> only if a level 4 page is large, so we should put it in >>> >>>      if (FIELD_EX64(base, TLBENTRY, HUGE)) { >>>          if (unlikely(level == 4)) { >>>              qemu_log_mask(LOG_GUEST_ERROR, >>>                            "Attempted use of level %lu huge page\n", level); >>>          } >>> >>>          if (FIELD_EX64(base, TLBENTRY, LEVEL)) { >>>              return base; >>>          } else { >>>              return  FIELD_DP64(base, TLBENTRY, LEVEL, level); >>>          } >>>      } >> >> A level 5 page table is not normal, nor is a level 0 lddir. >> > > We communicate with the hardware guys that the behavior above level 4 and lddir 0 is > undefined behavior. > > The result of our test on 3A5000 is that it has no any effect on "base", > > however in future chips the behavior may change since it may support 5-level page table > and width for level[13:14] may change also. > > > So in this context,I am not sure which level to use to print logs, > > which content to print, and where to add these prints, > > any more detailed advice? Yes, right there in the IF that I quoted at the top. What I was trying to spell out is if (unlikely(level == 0 || level > 4)) { qemu_log_mask(LOG_GUEST_ERROR, "Attepted LDDIR with level %"PRId64"\n", level); return base; } r~