From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54134) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yrkng-00045b-VB for qemu-devel@nongnu.org; Mon, 11 May 2015 06:19:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yrknc-0002lt-02 for qemu-devel@nongnu.org; Mon, 11 May 2015 06:19:04 -0400 Received: from cantor2.suse.de ([195.135.220.15]:36449 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yrknb-0002lP-QM for qemu-devel@nongnu.org; Mon, 11 May 2015 06:18:59 -0400 Message-ID: <55508206.5040206@suse.de> Date: Mon, 11 May 2015 12:18:46 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <6920fa40d097d15d0cfcaf63c26b6325ee5edc46.1431322749.git.crosthwaite.peter@gmail.com> In-Reply-To: <6920fa40d097d15d0cfcaf63c26b6325ee5edc46.1431322749.git.crosthwaite.peter@gmail.com> Content-Type: text/plain; charset=iso-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC PATCH 02/34] tcg+qom: QOMify core CPU defintions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, edgari@xilinx.com, Paolo Bonzini , sorenb@xilinx.com, rth@twiddle.net Am 11.05.2015 um 08:29 schrieb Peter Crosthwaite: > These definitions are defined per-target and globall linked/defined > between core code and target-foo. QOMify them. Provide weakly linked > conditional default implementations for the non-qomified global fns. > This means converted architectures which install a QOM hook do not need > to define a function for the old globals even the common code expects > to link against something. >=20 > The top level definition of some functions is still left up to the > individual target cpu.h files, making the QOMified code paths opt-in > per target. >=20 > Signed-off-by: Peter Crosthwaite > --- > include/qom/cpu.h | 24 ++++++++++++++++++++++++ > qom/cpu.c | 6 ++++++ > softmmu_template.h | 6 ++++++ > translate-all.c | 47 ++++++++++++++++++++++++++++++++++++++++++++--= - > 4 files changed, 80 insertions(+), 3 deletions(-) >=20 > diff --git a/include/qom/cpu.h b/include/qom/cpu.h > index 363c928..2cb89ab 100644 > --- a/include/qom/cpu.h > +++ b/include/qom/cpu.h > @@ -119,6 +119,7 @@ struct TranslationBlock; > * @cpu_exec_exit: Callback for cpu_exec cleanup. > * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec= . > * @disas_set_info: Setup architecture specific components of disassem= bly info > + * @cpu_mmu_index: Get MMU index for normal load stores > * > * Represents a CPU family or model. > */ > @@ -176,6 +177,17 @@ typedef struct CPUClass { > bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); > =20 > void (*disas_set_info)(CPUState *cpu, disassemble_info *info); > + int (*cpu_mmu_index)(CPUState *cpu); > + void (*cpu_get_tb_cpu_state)(CPUState *cpu, > + void *pc, /* target_long * */ > + void *cs_base, /* target_long */ > + int *flags); > + void (*gen_intermediate_code)(void *env, struct TranslationBlock *= tb); > + void (*gen_intermediate_code_pc)(void *env, struct TranslationBloc= k *tb); > + void (*restore_state_to_opc)(void *env, struct TranslationBlock *t= b, > + int pc_pos); > + void (*tlb_fill)(CPUState *cs, uint64_t addr, int is_write, int mm= u_idx, > + uintptr_t retaddr); > } CPUClass; > =20 > #ifdef HOST_WORDS_BIGENDIAN [snip] Paolo had objected to this when I tried it. The counter-suggestion was something about reworking how the cputlb code is built per target - please check the archives. Regards, Andreas --=20 SUSE Linux GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Felix Imend=F6rffer, Jane Smithard, Dilip Upmanyu, Graham Norton; HRB 21284 (AG N=FCrnberg)