From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34022) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YvoH3-0002Y2-CD for qemu-devel@nongnu.org; Fri, 22 May 2015 10:50:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YvoH0-00025W-5D for qemu-devel@nongnu.org; Fri, 22 May 2015 10:50:09 -0400 Received: from mail-qk0-x232.google.com ([2607:f8b0:400d:c09::232]:36044) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YvoH0-00024h-12 for qemu-devel@nongnu.org; Fri, 22 May 2015 10:50:06 -0400 Received: by qkx62 with SMTP id 62so12809881qkx.3 for ; Fri, 22 May 2015 07:50:05 -0700 (PDT) Sender: Richard Henderson Message-ID: <555F4219.4020509@twiddle.net> Date: Fri, 22 May 2015 07:50:01 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1432282979-24500-1-git-send-email-kbastian@mail.uni-paderborn.de> In-Reply-To: <1432282979-24500-1-git-send-email-kbastian@mail.uni-paderborn.de> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 00/10] TriCore v1.6.1 ISA and missing v1.6 instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bastian Koppelmann , qemu-devel@nongnu.org On 05/22/2015 01:22 AM, Bastian Koppelmann wrote: > Hi, > > the new Aurix platform introduces a new ISA version, so this patchset > adds a new feature bit and changes the generic Aurix cpu to a more specific > tc27x cpu model. While at this, it introduces a new cpu model tc1797 which > uses the v1.3.1 ISA and fixes the tc1796 to us the v1.3 ISA. > > It also adds the with v1.6.1 introduces instructions cmpswap, swapmsk and > crc32. While at this, it adds the missing instructions of the v1.6 ISA. > > Cheers, > Bastian > > v1->v2: > - FRET and FCALL don't create a wrong register state anymore, if the load traps. Reviewed-by: Richard Henderson r~