From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40764) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwzHc-0003Sa-ND for qemu-devel@nongnu.org; Mon, 25 May 2015 16:47:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YwzHZ-0001fM-II for qemu-devel@nongnu.org; Mon, 25 May 2015 16:47:36 -0400 Received: from cantor2.suse.de ([195.135.220.15]:56539 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwzHZ-0001fC-Ce for qemu-devel@nongnu.org; Mon, 25 May 2015 16:47:33 -0400 Message-ID: <55638A63.2030607@suse.de> Date: Mon, 25 May 2015 22:47:31 +0200 From: Alexander Graf MIME-Version: 1.0 References: <1432243971-26417-1-git-send-email-aurelien@aurel32.net> <555E512F.4050603@twiddle.net> <20150523075906.GA25414@aurel32.net> <5560D607.7080101@twiddle.net> In-Reply-To: <5560D607.7080101@twiddle.net> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-s390x: fix LOAD MULTIPLE instruction on page boundary List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , qemu-devel@nongnu.org On 23.05.15 21:33, Richard Henderson wrote: > On 05/23/2015 12:59 AM, Aurelien Jarno wrote: >> On 2015-05-21 14:42, Richard Henderson wrote: >>> Hmm. Seems to be un/under-specified in the PoO. That said, >> >> There is a small sentence in the PoO, in chapter "Program Execution", >> section "Sequence of Storage Reference": >> >> It can normally be assumed that the execution of >> each instruction occurs as an indivisible event. > > Ah, I didn't think to look in a different chapter. ;-) > >>> It would be nice to know if there ought to be similar up-front access >>> checking >>> for STM, to avoid errant partial stores. >> >> I have just checked, the same is also true for STM instructions, though >> it's probably more difficult to fix that in QEMU. Maybe we need a way to >> check if a load/store will succeed, preferably without using a helper. > > I did just suggest a new helper in the "unaligned stores for mips r6" > thread. Therein we provide a probe_write helper that does assert that > the given page is writable, or raise the usual exception. It leaves the > TLB updated, so a subsequent write should take the fast path. > > It should be easy enough to extend that with an opcode so that we can > implement this for s390 as > > probe_write addr + n * size - 1 > qemu_st r0, addr > qemu_st r1, addr + 1*size > ... > > Hopefully for the edge case where both pages are unmapped, producing an > exception pointing to the last byte, rather than the first byte, is > acceptable. So that means we should hold off on this patch for now as well and rather go for the probe approach? Alex