[Qemu-devel] [PATCH] mips_malta: provide ememsize env variable to kernels

[Qemu-devel] [PATCH] mips_malta: provide ememsize env variable to kernels

[Paul Burton]

Commit 94c2b6aff43c (mips_malta: support up to 2GiB RAM) provided
support for using over 256MB of RAM with the MIPS Malta board, including
capping the memsize variable that QEMUs pseudo-bootloader provides to
the kernel at 256MB in order to match YAMON. It didn't however provide
the ememsize variable which kernels supporting memory outside of the
unmapped address spaces (ie. EVA or highmem) may use to determine the
true size of the RAM present in the system.

Set ememsize to the size of RAM so that such kernels may use all
available memory without the user having to manually specifying its size
& location.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Leon Alrae <leon.alrae@imgtec.com>
---
Note that in order for Linux kernels to make use of all memory
automatically when using highmem rather than EVA, the following patchset
is required:

  http://www.linux-mips.org/archives/linux-mips/2015-05/msg00377.html
---
 hw/mips/mips_malta.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 482250d..affdb04 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -97,7 +97,7 @@ typedef struct {
 static ISADevice *pit;
 
 static struct _loaderparams {
-    int ram_size;
+    int ram_size, ram_low_size;
     const char *kernel_filename;
     const char *kernel_cmdline;
     const char *initrd_filename;
@@ -641,8 +641,8 @@ static void write_bootloader (CPUMIPSState *env, uint8_t *base,
     stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));               /* ori a1, a1, low(ENVP_ADDR) */
     stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
     stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));         /* ori a2, a2, low(ENVP_ADDR + 8) */
-    stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));     /* lui a3, high(ram_size) */
-    stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));  /* ori a3, a3, low(ram_size) */
+    stl_p(p++, 0x3c070000 | (loaderparams.ram_low_size >> 16));     /* lui a3, high(ram_low_size) */
+    stl_p(p++, 0x34e70000 | (loaderparams.ram_low_size & 0xffff));  /* ori a3, a3, low(ram_low_size) */
 
     /* Load BAR registers as done by YAMON */
     stl_p(p++, 0x3c09b400);                                      /* lui t1, 0xb400 */
@@ -851,8 +851,10 @@ static int64_t load_kernel (void)
     }
 
     prom_set(prom_buf, prom_index++, "memsize");
-    prom_set(prom_buf, prom_index++, "%i",
-             MIN(loaderparams.ram_size, 256 << 20));
+    prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_low_size);
+
+    prom_set(prom_buf, prom_index++, "ememsize");
+    prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_size);
 
     prom_set(prom_buf, prom_index++, "modetty0");
     prom_set(prom_buf, prom_index++, "38400n8r");
@@ -1054,7 +1056,8 @@ void mips_malta_init(MachineState *machine)
         }
 
         /* Write a small bootloader to the flash location. */
-        loaderparams.ram_size = ram_low_size;
+        loaderparams.ram_size = ram_size;
+        loaderparams.ram_low_size = ram_low_size;
         loaderparams.kernel_filename = kernel_filename;
         loaderparams.kernel_cmdline = kernel_cmdline;
         loaderparams.initrd_filename = initrd_filename;
-- 
2.4.1

Re: [Qemu-devel] [PATCH] mips_malta: provide ememsize env variable to kernels

[Leon Alrae]

On 25/05/2015 14:21, Paul Burton wrote:
> Commit 94c2b6aff43c (mips_malta: support up to 2GiB RAM) provided
> support for using over 256MB of RAM with the MIPS Malta board, including
> capping the memsize variable that QEMUs pseudo-bootloader provides to
> the kernel at 256MB in order to match YAMON. It didn't however provide
> the ememsize variable which kernels supporting memory outside of the
> unmapped address spaces (ie. EVA or highmem) may use to determine the
> true size of the RAM present in the system.
> 
> Set ememsize to the size of RAM so that such kernels may use all
> available memory without the user having to manually specifying its size
> & location.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> Cc: Leon Alrae <leon.alrae@imgtec.com>
> ---

Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>

Re: [Qemu-devel] [PATCH] mips_malta: provide ememsize env variable to kernels

[Aurelien Jarno]

On 2015-05-25 14:21, Paul Burton wrote:
> Commit 94c2b6aff43c (mips_malta: support up to 2GiB RAM) provided
> support for using over 256MB of RAM with the MIPS Malta board, including
> capping the memsize variable that QEMUs pseudo-bootloader provides to
> the kernel at 256MB in order to match YAMON. It didn't however provide
> the ememsize variable which kernels supporting memory outside of the
> unmapped address spaces (ie. EVA or highmem) may use to determine the
> true size of the RAM present in the system.
> 
> Set ememsize to the size of RAM so that such kernels may use all
> available memory without the user having to manually specifying its size
> & location.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> Cc: Leon Alrae <leon.alrae@imgtec.com>
> ---
> Note that in order for Linux kernels to make use of all memory
> automatically when using highmem rather than EVA, the following patchset
> is required:
> 
>   http://www.linux-mips.org/archives/linux-mips/2015-05/msg00377.html
> ---
>  hw/mips/mips_malta.c | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index 482250d..affdb04 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -97,7 +97,7 @@ typedef struct {
>  static ISADevice *pit;
>  
>  static struct _loaderparams {
> -    int ram_size;
> +    int ram_size, ram_low_size;
>      const char *kernel_filename;
>      const char *kernel_cmdline;
>      const char *initrd_filename;
> @@ -641,8 +641,8 @@ static void write_bootloader (CPUMIPSState *env, uint8_t *base,
>      stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));               /* ori a1, a1, low(ENVP_ADDR) */
>      stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
>      stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));         /* ori a2, a2, low(ENVP_ADDR + 8) */
> -    stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));     /* lui a3, high(ram_size) */
> -    stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));  /* ori a3, a3, low(ram_size) */
> +    stl_p(p++, 0x3c070000 | (loaderparams.ram_low_size >> 16));     /* lui a3, high(ram_low_size) */
> +    stl_p(p++, 0x34e70000 | (loaderparams.ram_low_size & 0xffff));  /* ori a3, a3, low(ram_low_size) */
>  
>      /* Load BAR registers as done by YAMON */
>      stl_p(p++, 0x3c09b400);                                      /* lui t1, 0xb400 */
> @@ -851,8 +851,10 @@ static int64_t load_kernel (void)
>      }
>  
>      prom_set(prom_buf, prom_index++, "memsize");
> -    prom_set(prom_buf, prom_index++, "%i",
> -             MIN(loaderparams.ram_size, 256 << 20));
> +    prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_low_size);
> +
> +    prom_set(prom_buf, prom_index++, "ememsize");
> +    prom_set(prom_buf, prom_index++, "%u", loaderparams.ram_size);
>  
>      prom_set(prom_buf, prom_index++, "modetty0");
>      prom_set(prom_buf, prom_index++, "38400n8r");
> @@ -1054,7 +1056,8 @@ void mips_malta_init(MachineState *machine)
>          }
>  
>          /* Write a small bootloader to the flash location. */
> -        loaderparams.ram_size = ram_low_size;
> +        loaderparams.ram_size = ram_size;
> +        loaderparams.ram_low_size = ram_low_size;
>          loaderparams.kernel_filename = kernel_filename;
>          loaderparams.kernel_cmdline = kernel_cmdline;
>          loaderparams.initrd_filename = initrd_filename;

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net