From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47771) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YxIBs-0001wC-Te for qemu-devel@nongnu.org; Tue, 26 May 2015 12:58:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YxIBn-0005tw-Vp for qemu-devel@nongnu.org; Tue, 26 May 2015 12:58:56 -0400 Received: from cantor2.suse.de ([195.135.220.15]:40248 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YxIBn-0005tZ-N6 for qemu-devel@nongnu.org; Tue, 26 May 2015 12:58:51 -0400 Message-ID: <5564A649.6070206@suse.de> Date: Tue, 26 May 2015 18:58:49 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1432658961-48553-1-git-send-email-yongbok.kim@imgtec.com> <1432658961-48553-3-git-send-email-yongbok.kim@imgtec.com> In-Reply-To: <1432658961-48553-3-git-send-email-yongbok.kim@imgtec.com> Content-Type: text/plain; charset=iso-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v5 2/3] softmmu: Add probe_write() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Yongbok Kim , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Peter Crosthwaite , Paolo Bonzini , leon.alrae@imgtec.com, rth@twiddle.net Am 26.05.2015 um 18:49 schrieb Yongbok Kim: > Add probe_write() forces a tlb_fill if the specified guest virtual > index isn't in the TCG softmmu TLB. >=20 > Signed-off-by: Yongbok Kim > --- > include/exec/exec-all.h | 2 ++ > softmmu_template.h | 20 ++++++++++++++++++++ > 2 files changed, 22 insertions(+), 0 deletions(-) >=20 > diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h > index b58cd47..af51203 100644 > --- a/include/exec/exec-all.h > +++ b/include/exec/exec-all.h > @@ -109,6 +109,8 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_= ulong vaddr, > hwaddr paddr, MemTxAttrs attrs, > int prot, int mmu_idx, target_ulong size)= ; > void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr); > +void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx, > + uintptr_t retaddr); > #else > static inline void tlb_flush_page(CPUState *cpu, target_ulong addr) > { > diff --git a/softmmu_template.h b/softmmu_template.h > index 9cb1659..1a1de4a 100644 > --- a/softmmu_template.h > +++ b/softmmu_template.h > @@ -548,6 +548,26 @@ glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchSt= ate *env, target_ulong addr, > helper_te_st_name(env, addr, val, oi, GETRA()); > } > =20 > +#if DATA_SIZE =3D=3D 1 > +/* > + * Force a tlb_fill if the specified guest virtual index isn't in the = TCG > + * softmmu TLB. > + */ > +void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx, > + uintptr_t retaddr) > +{ > + int index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); > + target_ulong tlb_addr =3D env->tlb_table[mmu_idx][index].addr_writ= e; > + > + if ((addr & TARGET_PAGE_MASK) > + !=3D (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { > + /* TLB entry is for a different page */ > + if (!VICTIM_TLB_HIT(addr_write)) { > + tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, = retaddr); Isn't the use of ENV_GET_CPU() here contradicting Peter C.'s series? Regards, Andreas > + } > + } > +} > +#endif > #endif /* !defined(SOFTMMU_CODE_ACCESS) */ > =20 > #undef READ_ACCESS_TYPE --=20 SUSE Linux GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Felix Imend=F6rffer, Jane Smithard, Dilip Upmanyu, Graham Norton; HRB 21284 (AG N=FCrnberg)