From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45645) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyWYG-00088o-De for qemu-devel@nongnu.org; Fri, 29 May 2015 22:31:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YyWYB-0006Nx-7a for qemu-devel@nongnu.org; Fri, 29 May 2015 22:31:08 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:6598) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyWYA-0006Mo-Jc for qemu-devel@nongnu.org; Fri, 29 May 2015 22:31:03 -0400 Message-ID: <556920C9.4040703@huawei.com> Date: Sat, 30 May 2015 10:30:33 +0800 From: Shannon Zhao MIME-Version: 1.0 References: <011801d0947a$a9e1e8a0$fda5b9e0$@samsung.com> <20150529103652.30d30a3d@nial.brq.redhat.com> <011d01d099ec$f4f5b7a0$dee126e0$@samsung.com> <20150529111858.4b7b0db9@nial.brq.redhat.com> <01ab01d09a0a$c1bdb450$45391cf0$@samsung.com> <20150529150326.451478f4@nial.brq.redhat.com> <024b01d09a36$1ba8c060$52fa4120$@samsung.com> In-Reply-To: <024b01d09a36$1ba8c060$52fa4120$@samsung.com> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] Use Aff1 with mpidr List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Pavel Fedin , 'Igor Mammedov' Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org, 'Ashok Kumar' , 'Shlomo Pongratz' On 2015/5/30 1:37, Pavel Fedin wrote: > Hi! > >> Well KVM side should be fixed instead of driving us along wrong route. > > I have studied the question a bit more, and i discovered that MPIDR access on ARM is not > trapped by KVM. And guest would always get the same value as host would. Theoretically you Yes, it doesn't trap but there is one register "vmpidr_el2" which is used for virtualization. When guest reads mpidr, it will get the value of vmpidr_el2. And when context switching, hyp will restore the value of vmpidr_el2 and the value is got from MPIDR_EL1 which is set by reset_mpidr(). hyp.s: .macro restore_sysregs // x2: base address for cpu context // x3: tmp register add x3, x2, #CPU_SYSREG_OFFSET(MPIDR_EL1) ----cut---- msr vmpidr_el2, x4 ----cut---- .endm -- Shannon