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From: Laszlo Ersek <lersek@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: "Michael S. Tsirkin" <mst@redhat.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Gerd Hoffmann <kraxel@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2 08/23] pflash_cfi01: change to new-style MMIO accessors
Date: Thu, 04 Jun 2015 14:51:03 +0200	[thread overview]
Message-ID: <557049B7.4010801@redhat.com> (raw)
In-Reply-To: <55700630.7090006@redhat.com>

On 06/04/15 10:02, Paolo Bonzini wrote:
> 
> 
> On 04/06/2015 08:19, Peter Crosthwaite wrote:
>> On Wed, Jun 3, 2015 at 10:08 AM, Paolo Bonzini <pbonzini@redhat.com> wrote:
>>> This is a required step to implement read_with_attrs and write_with_attrs.
>>>
>>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>>> ---
>>>  hw/block/pflash_cfi01.c | 96 ++++++-------------------------------------------
>>
>> Nice stats.
>>
>>>  1 file changed, 10 insertions(+), 86 deletions(-)
>>>
>>> diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
>>> index 7507a15..0b3667a 100644
>>> --- a/hw/block/pflash_cfi01.c
>>> +++ b/hw/block/pflash_cfi01.c
>>> @@ -650,101 +650,25 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
>>>  }
>>>
>>>
>>> -static uint32_t pflash_readb_be(void *opaque, hwaddr addr)
>>> -{
>>> -    return pflash_read(opaque, addr, 1, 1);
>>> -}
>>> -
>>> -static uint32_t pflash_readb_le(void *opaque, hwaddr addr)
>>> -{
>>> -    return pflash_read(opaque, addr, 1, 0);
>>> -}
>>> -
>>> -static uint32_t pflash_readw_be(void *opaque, hwaddr addr)
>>> +static uint64_t pflash_mem_read(void *opaque, hwaddr addr, unsigned len)
>>>  {
>>>      pflash_t *pfl = opaque;
>>> +    bool be = !!(pfl->features & (1 << PFLASH_BE));
>>
>> !!() not needed. Otherwise
> 
> I don't like magic bool-ification...  Is there a coding style item that
> forbids this idiom in bool assignments?

(Side remark: in edk2, BOOLEAN is actually UINT8. !!(expr) -- or,
((expr) != 0) -- is a necessity there.)

Thanks
Laszlo


> 
> Paolo
> 
>> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.om>
>>
>>>
>>> -    return pflash_read(pfl, addr, 2, 1);
>>> +    return pflash_read(pfl, addr, len, be);
>>>  }
>>>
>>> -static uint32_t pflash_readw_le(void *opaque, hwaddr addr)
>>> +static void pflash_mem_write(void *opaque, hwaddr addr, uint64_t value, unsigned len)
>>>  {
>>>      pflash_t *pfl = opaque;
>>> +    bool be = !!(pfl->features & (1 << PFLASH_BE));
>>>
>>> -    return pflash_read(pfl, addr, 2, 0);
>>> +    pflash_write(pfl, addr, value, len, be);
>>>  }
>>>
>>> -static uint32_t pflash_readl_be(void *opaque, hwaddr addr)
>>> -{
>>> -    pflash_t *pfl = opaque;
>>> -
>>> -    return pflash_read(pfl, addr, 4, 1);
>>> -}
>>> -
>>> -static uint32_t pflash_readl_le(void *opaque, hwaddr addr)
>>> -{
>>> -    pflash_t *pfl = opaque;
>>> -
>>> -    return pflash_read(pfl, addr, 4, 0);
>>> -}
>>> -
>>> -static void pflash_writeb_be(void *opaque, hwaddr addr,
>>> -                             uint32_t value)
>>> -{
>>> -    pflash_write(opaque, addr, value, 1, 1);
>>> -}
>>> -
>>> -static void pflash_writeb_le(void *opaque, hwaddr addr,
>>> -                             uint32_t value)
>>> -{
>>> -    pflash_write(opaque, addr, value, 1, 0);
>>> -}
>>> -
>>> -static void pflash_writew_be(void *opaque, hwaddr addr,
>>> -                             uint32_t value)
>>> -{
>>> -    pflash_t *pfl = opaque;
>>> -
>>> -    pflash_write(pfl, addr, value, 2, 1);
>>> -}
>>> -
>>> -static void pflash_writew_le(void *opaque, hwaddr addr,
>>> -                             uint32_t value)
>>> -{
>>> -    pflash_t *pfl = opaque;
>>> -
>>> -    pflash_write(pfl, addr, value, 2, 0);
>>> -}
>>> -
>>> -static void pflash_writel_be(void *opaque, hwaddr addr,
>>> -                             uint32_t value)
>>> -{
>>> -    pflash_t *pfl = opaque;
>>> -
>>> -    pflash_write(pfl, addr, value, 4, 1);
>>> -}
>>> -
>>> -static void pflash_writel_le(void *opaque, hwaddr addr,
>>> -                             uint32_t value)
>>> -{
>>> -    pflash_t *pfl = opaque;
>>> -
>>> -    pflash_write(pfl, addr, value, 4, 0);
>>> -}
>>> -
>>> -static const MemoryRegionOps pflash_cfi01_ops_be = {
>>> -    .old_mmio = {
>>> -        .read = { pflash_readb_be, pflash_readw_be, pflash_readl_be, },
>>> -        .write = { pflash_writeb_be, pflash_writew_be, pflash_writel_be, },
>>> -    },
>>> -    .endianness = DEVICE_NATIVE_ENDIAN,
>>> -};
>>> -
>>> -static const MemoryRegionOps pflash_cfi01_ops_le = {
>>> -    .old_mmio = {
>>> -        .read = { pflash_readb_le, pflash_readw_le, pflash_readl_le, },
>>> -        .write = { pflash_writeb_le, pflash_writew_le, pflash_writel_le, },
>>> -    },
>>> +static const MemoryRegionOps pflash_cfi01_ops = {
>>> +    .read = pflash_mem_read,
>>> +    .write = pflash_mem_write,
>>>      .endianness = DEVICE_NATIVE_ENDIAN,
>>>  };
>>>
>>> @@ -775,7 +699,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp)
>>>
>>>      memory_region_init_rom_device(
>>>          &pfl->mem, OBJECT(dev),
>>> -        pfl->features & (1 << PFLASH_BE) ? &pflash_cfi01_ops_be : &pflash_cfi01_ops_le,
>>> +        &pflash_cfi01_ops,
>>>          pfl,
>>>          pfl->name, total_len, &local_err);
>>>      if (local_err) {
>>> --
>>> 2.4.1
>>>
>>>
>>>

  reply	other threads:[~2015-06-04 12:51 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-03 17:08 [Qemu-devel] [PATCH v2 00/23] SMM improvements (chipset and TCG parts) Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 01/23] target-i386: introduce cpu_get_mem_attrs Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 02/23] target-i386: Use correct memory attributes for memory accesses Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 03/23] target-i386: Use correct memory attributes for ioport accesses Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 04/23] target-i386: mask NMIs on entry to SMM Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 05/23] target-i386: set G=1 in SMM big real mode selectors Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 06/23] target-i386: wake up processors that receive an SMI Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 07/23] pflash_cfi01: change big-endian property to BIT type Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 08/23] pflash_cfi01: change to new-style MMIO accessors Paolo Bonzini
2015-06-04  6:19   ` Peter Crosthwaite
2015-06-04  8:02     ` Paolo Bonzini
2015-06-04 12:51       ` Laszlo Ersek [this message]
2015-06-09 18:08       ` Richard Henderson
2015-06-09 18:47         ` Michael S. Tsirkin
2015-06-17  7:56         ` Paolo Bonzini
2015-06-17  8:22           ` Markus Armbruster
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 09/23] pflash_cfi01: add secure property Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 10/23] vl: allow full-blown QemuOpts syntax for -global Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 11/23] qom: add object_property_add_const_link Paolo Bonzini
2015-06-04  6:33   ` Peter Crosthwaite
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 12/23] vl: run "late" notifiers immediately Paolo Bonzini
2015-06-04  6:39   ` Peter Crosthwaite
2015-06-04  8:03     ` Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 13/23] target-i386: create a separate AddressSpace for each CPU Paolo Bonzini
2015-06-03 17:58   ` Peter Crosthwaite
2015-06-04  8:02     ` Paolo Bonzini
2015-06-04 12:48       ` Laszlo Ersek
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 14/23] hw/i386: add a separate region that tracks the SMRAME bit Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 15/23] target-i386: use memory API to implement SMRAM Paolo Bonzini
2015-06-04  7:19   ` Peter Crosthwaite
2015-06-04  8:05     ` Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 16/23] hw/i386: remove smram_update Paolo Bonzini
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 17/23] q35: implement high SMRAM Paolo Bonzini
2015-06-04 12:50   ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 18/23] q35: fix ESMRAMC default Paolo Bonzini
2015-06-04 12:51   ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 19/23] q35: add config space wmask for SMRAM and ESMRAMC Paolo Bonzini
2015-06-04 12:51   ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 20/23] q35: implement SMRAM.D_LCK Paolo Bonzini
2015-06-04 12:51   ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 21/23] q35: add test for SMRAM.D_LCK Paolo Bonzini
2015-06-04 12:52   ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 22/23] q35: implement TSEG Paolo Bonzini
2015-06-04 12:53   ` Michael S. Tsirkin
2015-06-03 17:08 ` [Qemu-devel] [PATCH v2 23/23] ich9: implement SMI_LOCK Paolo Bonzini
2015-06-04 12:53   ` Michael S. Tsirkin
2015-06-03 17:41 ` [Qemu-devel] [PATCH v2 00/23] SMM improvements (chipset and TCG parts) Laszlo Ersek
2015-06-03 17:44   ` Paolo Bonzini
2015-06-04 12:54 ` Michael S. Tsirkin

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