From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49438) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0WAN-0005Tc-6F for qemu-devel@nongnu.org; Thu, 04 Jun 2015 10:30:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0WAH-0003xf-OL for qemu-devel@nongnu.org; Thu, 04 Jun 2015 10:30:43 -0400 Received: from mail-pa0-f42.google.com ([209.85.220.42]:34294) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0WAH-0003xN-Js for qemu-devel@nongnu.org; Thu, 04 Jun 2015 10:30:37 -0400 Received: by payr10 with SMTP id r10so30885030pay.1 for ; Thu, 04 Jun 2015 07:30:36 -0700 (PDT) Message-ID: <55706108.9070903@linaro.org> Date: Thu, 04 Jun 2015 22:30:32 +0800 From: Shannon Zhao MIME-Version: 1.0 References: <1432972477-13504-1-git-send-email-zhaoshenglong@huawei.com> <1432972477-13504-3-git-send-email-zhaoshenglong@huawei.com> <55705E46.4010106@msgid.tls.msk.ru> In-Reply-To: <55705E46.4010106@msgid.tls.msk.ru> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [Qemu-trivial] [PATCH v2 2/7] hw/mips/mips_jazz.c: Store irq array in MachineState to fix memory leak List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Michael Tokarev , Shannon Zhao , qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org, peter.maydell@linaro.org On 2015/6/4 22:18, Michael Tokarev wrote: > 30.05.2015 10:54, Shannon Zhao пишет: >> >From: Shannon Zhao >> > >> >Signed-off-by: Shannon Zhao >> >Signed-off-by: Shannon Zhao >> >--- >> > hw/mips/mips_jazz.c | 28 ++++++++++++++-------------- >> > 1 file changed, 14 insertions(+), 14 deletions(-) >> > >> >diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c >> >index 2c153e0..259458b 100644 >> >--- a/hw/mips/mips_jazz.c >> >+++ b/hw/mips/mips_jazz.c >> >@@ -135,7 +135,7 @@ static void mips_jazz_init(MachineState *machine, >> > MIPSCPU *cpu; >> > CPUClass *cc; >> > CPUMIPSState *env; >> >- qemu_irq *rc4030, *i8259; >> >+ qemu_irq *i8259; > Hm. Why do you only cover rc4030, not i8259? > As i8259 is stored in ISABus->irqs by function isa_bus_irqs. void isa_bus_irqs(ISABus *bus, qemu_irq *irqs) { if (!bus) { hw_error("Can't set isa irqs with no isa bus present."); } bus->irqs = irqs; } > Besides, in order to keep the changes smaller, I think it is okay to > keep the variables like that, here and in the rest of the function, > and only add assignment of it to machine->irqs. This way, we also > keep semantic names of the variables, rc4030[i] is easier to understand > than machine->irqs[i], the former's more specific. > Agree. > BTW, there's also cpu_exit_irq in this function whose allocation also > suffers from qemu_allocate_irqs(..., 1) API abuse. Yeah, missed this one. -- Shannon