From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35869) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3Nu0-0000iz-1x for qemu-devel@nongnu.org; Fri, 12 Jun 2015 08:17:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z3Nts-0005JS-OI for qemu-devel@nongnu.org; Fri, 12 Jun 2015 08:17:39 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50114) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3Nts-0005J6-JK for qemu-devel@nongnu.org; Fri, 12 Jun 2015 08:17:32 -0400 Message-ID: <557ACDD7.9060801@redhat.com> Date: Fri, 12 Jun 2015 15:17:27 +0300 From: Marcel Apfelbaum MIME-Version: 1.0 References: <1434029828-31954-1-git-send-email-marcel@redhat.com> <20150611135841.GA7998@morn.localdomain> <55799751.1030904@redhat.com> <20150611142425.GA10763@morn.localdomain> <55799CD6.1060506@redhat.com> <20150611165404.GB20655@morn.localdomain> <5579C959.8020607@redhat.com> <20150611191058.GA28252@morn.localdomain> <1434088832.28479.7.camel@redhat.com> In-Reply-To: <1434088832.28479.7.camel@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH V2] pci: fixes to allow booting from extra root pci buses. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann , Kevin O'Connor Cc: seabios@seabios.org, lersek@redhat.com, qemu-devel@nongnu.org, mst@redhat.com On 06/12/2015 09:00 AM, Gerd Hoffmann wrote: > Hi, > >> On each boot, coreboot might decide to assign a different bus id to >> the extra roots (for example, if a device with a PCI bridge is >> inserted and it's bus allocation causes bus ids to shift). >> Technically, coreboot could even change the order extra buses are >> assigned bus ids, but doesn't today. >> >> This was seen on several AMD systems - I'm told at least some Intel >> systems have multiple root buses, but the bus numbers are just hard >> wired. > > This is how the qemu pxb works: root bus numbers are a config option for > the root bridge device, i.e. from the guest point of view they are > hard-wired. Exactly. In our case, the HW assigns the PXB bus bumber, and again, I saw this also on real HW with multiple buses, the bus nr comes from ACPI, meaning the vendor. Let's focus on the problem in hand: We need a way for QEMU to write some fw path on bootorder fw_config file and both Seabios/OVMF need to know how to correctly map this to the actual device. If the boot device is behind a PXI extra root bus, there is a need not only to differentiate the root bus but also to know *which one*. So we need the bus number, what other way is there? As Gerd mentioned, the PXB bus number is provided in QEMU command line, meaning hard-wired. We can of course, as Laszlo suggested, add an extra condition the use of this path: /pci-root@bus-br/ on running in QEMU in order not to interfere with other HW. Less pretty but more robust. Thanks, Marcel > > cheers, > Gerd > >