From: Marcel Apfelbaum <marcel@redhat.com>
To: Laszlo Ersek <lersek@redhat.com>, qemu-devel@nongnu.org
Cc: Kevin O'Connor <kevin@koconnor.net>,
"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v4 4/4] hw/pci-bridge: format SeaBIOS-compliant OFW device node for PXB
Date: Sun, 14 Jun 2015 13:08:06 +0300 [thread overview]
Message-ID: <557D5286.2010901@redhat.com> (raw)
In-Reply-To: <1434203538-8075-5-git-send-email-lersek@redhat.com>
On 06/13/2015 04:52 PM, Laszlo Ersek wrote:
> SeaBIOS expects OpenFirmware device paths in the "bootorder" fw_cfg file
> to follow the pattern
>
> /pci-root@N/pci@i0cf8/...
>
> for devices that live behind an extra root bus. The extra root bus in
> question is the N'th among the extra root bridges. (In other words, N
> gives the position of the affected extra root bus relative to the other
> extra root buses, in bus_nr order.) N starts at 1, and is formatted in
> hex.
>
> The "pci@i0cf8" node text is hardcoded in SeaBIOS (see the macro
> FW_PCI_DOMAIN).
>
> Cc: Kevin O'Connor <kevin@koconnor.net>
> Cc: Marcel Apfelbaum <marcel@redhat.com>
> Cc: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Laszlo Ersek <lersek@redhat.com>
> ---
>
> Notes:
> v4:
> - new in v4
>
> hw/pci-bridge/pci_expander_bridge.c | 39 ++++++++++++++++++++++++++++++++++++-
> 1 file changed, 38 insertions(+), 1 deletion(-)
>
> diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> index c7a085d..bed8ec9 100644
> --- a/hw/pci-bridge/pci_expander_bridge.c
> +++ b/hw/pci-bridge/pci_expander_bridge.c
> @@ -42,6 +42,8 @@ typedef struct PXBDev {
> uint16_t numa_node;
> } PXBDev;
>
> +static GList *pxb_dev_list;
> +
> #define TYPE_PXB_HOST "pxb-host"
>
> static int pxb_bus_num(PCIBus *bus)
> @@ -88,12 +90,29 @@ static const char *pxb_host_root_bus_path(PCIHostState *host_bridge,
> return bus->bus_path;
> }
>
> +static char *pxb_host_ofw_unit_address(SysBusDevice *dev)
> +{
> + PCIHostState *host = PCI_HOST_BRIDGE(dev);
> + PCIBus *bus;
> + PXBDev *pxb;
> + int position;
> +
> + bus = host->bus;
> + pxb = PXB_DEV(bus->parent_dev);
> + position = g_list_index(pxb_dev_list, pxb);
> + assert(position >= 0);
> +
> + return g_strdup_printf("%x/pci@i0cf8", position + 1);
> +}
> +
> static void pxb_host_class_init(ObjectClass *class, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(class);
> + SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(class);
> PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(class);
>
> - dc->fw_name = "pci";
> + dc->fw_name = "pci-root";
> + sbc->explicit_ofw_unit_address = pxb_host_ofw_unit_address;
> hc->root_bus_path = pxb_host_root_bus_path;
> }
>
> @@ -148,6 +167,15 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
> return pin - PCI_SLOT(pxb->devfn);
> }
>
> +static gint pxb_compare(gconstpointer a, gconstpointer b)
> +{
> + const PXBDev *pxb_a = a, *pxb_b = b;
> +
> + return pxb_a->bus_nr < pxb_b->bus_nr ? -1 :
> + pxb_a->bus_nr > pxb_b->bus_nr ? 1 :
> + 0;
> +}
return pxb_a->bus_nr - pxb_b->bus_nr ? :)
This will not hold the series... I can send a patch on top.
Thanks,
Marcel
> +
> static int pxb_dev_initfn(PCIDevice *dev)
> {
> PXBDev *pxb = PXB_DEV(dev);
> @@ -190,9 +218,17 @@ static int pxb_dev_initfn(PCIDevice *dev)
> PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
> pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_HOST);
>
> + pxb_dev_list = g_list_insert_sorted(pxb_dev_list, pxb, pxb_compare);
> return 0;
> }
>
> +static void pxb_dev_exitfn(PCIDevice *pci_dev)
> +{
> + PXBDev *pxb = PXB_DEV(pci_dev);
> +
> + pxb_dev_list = g_list_remove(pxb_dev_list, pxb);
> +}
> +
> static Property pxb_dev_properties[] = {
> /* Note: 0 is not a legal a PXB bus number. */
> DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
> @@ -206,6 +242,7 @@ static void pxb_dev_class_init(ObjectClass *klass, void *data)
> PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
>
> k->init = pxb_dev_initfn;
> + k->exit = pxb_dev_exitfn;
> k->vendor_id = PCI_VENDOR_ID_REDHAT;
> k->device_id = PCI_DEVICE_ID_REDHAT_PXB;
> k->class_id = PCI_CLASS_BRIDGE_HOST;
>
next prev parent reply other threads:[~2015-06-14 10:08 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-13 13:39 [Qemu-devel] PXB changes for QEMU, and extra root buses for OVMF, round 2 Laszlo Ersek
2015-06-13 13:52 ` [Qemu-devel] [PATCH v4 0/4] PXB changes Laszlo Ersek
2015-06-13 13:52 ` [Qemu-devel] [PATCH v4 1/4] hw/pci-bridge: create interrupt-less, hotplug-less bridge for PXB Laszlo Ersek
2015-06-15 14:10 ` Markus Armbruster
2015-06-15 14:35 ` Laszlo Ersek
2015-06-13 13:52 ` [Qemu-devel] [PATCH v4 2/4] hw/core: rebase sysbus_get_fw_dev_path() to g_strdup_printf() Laszlo Ersek
2015-06-15 14:23 ` Markus Armbruster
2015-06-15 14:39 ` Laszlo Ersek
2015-06-13 13:52 ` [Qemu-devel] [PATCH v4 3/4] hw/core: explicit OFW unit address callback for SysBusDeviceClass Laszlo Ersek
2015-06-15 14:33 ` Markus Armbruster
2015-06-15 14:45 ` Laszlo Ersek
2015-06-13 13:52 ` [Qemu-devel] [PATCH v4 4/4] hw/pci-bridge: format SeaBIOS-compliant OFW device node for PXB Laszlo Ersek
2015-06-14 10:08 ` Marcel Apfelbaum [this message]
2015-06-14 22:01 ` Laszlo Ersek
2015-06-14 10:09 ` [Qemu-devel] PXB changes for QEMU, and extra root buses for OVMF, round 2 Marcel Apfelbaum
2015-06-14 22:02 ` Laszlo Ersek
2015-06-15 14:35 ` Markus Armbruster
2015-06-15 14:47 ` Laszlo Ersek
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