From: Richard Henderson <rth@twiddle.net>
To: Artyom Tarasenko <atar4qemu@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: qemu-devel <qemu-devel@nongnu.org>, Alexander Graf <agraf@suse.de>
Subject: Re: [Qemu-devel] [PATCH v3 0/3] Support more than 8 MMU modes, speedup PPC by 10%
Date: Mon, 15 Jun 2015 08:50:16 -0700 [thread overview]
Message-ID: <557EF438.8050802@twiddle.net> (raw)
In-Reply-To: <CACXAS8CJ6ZcwKPtDb1prsUewRyHRWrXazDUnq75wLuiHVewphQ@mail.gmail.com>
On 06/11/2015 01:59 AM, Artyom Tarasenko wrote:
> This is a very promising approach. Would it also work on a large
> numbers of MMU modes?
> Particulary I wonder if it would work for SPARC, where 32-bit
> processors have up to 65536 MMU contexts.
No, it wouldn't.
r~
next prev parent reply other threads:[~2015-06-15 15:50 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-05 7:18 [Qemu-devel] [PATCH v3 0/3] Support more than 8 MMU modes, speedup PPC by 10% Paolo Bonzini
2015-05-05 7:18 ` [Qemu-devel] [PATCH v2 1/3] tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS Paolo Bonzini
2015-05-05 7:18 ` [Qemu-devel] [PATCH v2 2/3] softmmu: support up to 12 MMU modes Paolo Bonzini
2015-05-18 17:00 ` Alexander Graf
2015-05-05 7:18 ` [Qemu-devel] [PATCH v2 3/3] target-ppc: use separate indices for various translation modes Paolo Bonzini
2015-06-02 16:06 ` Alexander Graf
2015-05-05 15:49 ` [Qemu-devel] [PATCH v3 0/3] Support more than 8 MMU modes, speedup PPC by 10% Richard Henderson
2015-05-08 1:15 ` Alexander Graf
2015-05-07 22:26 ` Alexander Graf
2015-06-11 8:59 ` Artyom Tarasenko
2015-06-15 15:50 ` Richard Henderson [this message]
2015-06-15 16:00 ` Artyom Tarasenko
2015-06-15 16:29 ` Richard Henderson
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