From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60213) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z4w8o-0008MT-Up for qemu-devel@nongnu.org; Tue, 16 Jun 2015 15:03:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z4w8j-0000Y0-LM for qemu-devel@nongnu.org; Tue, 16 Jun 2015 15:03:22 -0400 Message-ID: <558072EC.1080208@redhat.com> Date: Tue, 16 Jun 2015 15:03:08 -0400 From: John Snow MIME-Version: 1.0 References: <1434470575-21625-1-git-send-email-jsnow@redhat.com> <1434470575-21625-2-git-send-email-jsnow@redhat.com> <55804DF7.40907@redhat.com> In-Reply-To: <55804DF7.40907@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2 1/4] ahci: Do not ignore memory access read size List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eric Blake , qemu-block@nongnu.org Cc: kwolf@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com On 06/16/2015 12:25 PM, Eric Blake wrote: > On 06/16/2015 10:02 AM, John Snow wrote: >> The only guidance the AHCI specification gives on memory access >> is: "Register accesses shall have a maximum size of 64-bits; >> 64-bit access must not cross an 8-byte alignment boundary." >>=20 >> I interpret this to mean that aligned or unaligned 1, 2 and 4 >> byte accesses should work, as well as aligned 8 byte accesses. >>=20 >> In practice, a real Q35/ICH9 responds to 1, 2, 4 and 8 byte >> reads regardless of alignment. Windows 7 can be observed making 1 >> byte reads to the middle of 32 bit registers to fetch error >> codes. >>=20 >> Introduce a wrapper to support unaligned accesses to AHCI. This >> wrapper will support aligned 8 byte reads, but will make no >> effort to support unaligned 8 byte reads, which although they=20 >> will work on real hardware, are not guaranteed to work and do not >> appear to be used by either Windows or Linux. >>=20 >> Signed-off-by: John Snow --- hw/ide/ahci.c | >> 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), >> 2 deletions(-) >>=20 >=20 >> +/** + * AHCI 1.3 section 3 ("HBA Memory Registers") + * Support >> unaligned 8/16/32 bit reads, and 64 bit aligned reads. + * Caller >> is responsible for masking unwanted higher order bytes. + */=20 >> +static uint64_t ahci_mem_read(void *opaque, hwaddr addr, >> unsigned size) +{ + hwaddr aligned =3D addr & ~0x3; >=20 > This actually supports 4-byte aligned 8-byte reads (which is an=20 > unaligned 8-byte read). Doesn't matter; no guest should be relying > on it. >=20 > Reviewed-by: Eric Blake >=20 Easier to say "indeterminate" than rely on wonko behavior, even if it sometimes accidentally works :) Thanks.