From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36498) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z58mi-0001yF-6D for qemu-devel@nongnu.org; Wed, 17 Jun 2015 04:33:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z58md-00066f-V0 for qemu-devel@nongnu.org; Wed, 17 Jun 2015 04:33:24 -0400 Received: from mx1.redhat.com ([209.132.183.28]:60467) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z58md-00066Z-Q7 for qemu-devel@nongnu.org; Wed, 17 Jun 2015 04:33:19 -0400 Message-ID: <558130CA.4030502@redhat.com> Date: Wed, 17 Jun 2015 10:33:14 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1434054631-32241-1-git-send-email-hpoussin@reactos.org> <20150611233006.GA14284@aurel32.net> <557F3943.1040300@reactos.org> <20150616174846.GA17031@aurel32.net> In-Reply-To: <20150616174846.GA17031@aurel32.net> Content-Type: text/plain; charset=iso-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] dma/rc4030: do multiple calls to address_space_rw when doing DMA transfers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno , =?ISO-8859-15?Q?Herv=E9_Pous?= =?ISO-8859-15?Q?sineau?= Cc: Peter Maydell , Leon Alrae , qemu-devel@nongnu.org On 16/06/2015 19:48, Aurelien Jarno wrote: > The code assumes that if you don't have an IOMMU, the address range in > the underlying memory region is linear. I think this is exactly what Peter Crosthwaite's infamous :) "exec: Respect as_translate_internal length clamp" patch was trying to fix. However, address_space_translate_internal uses section->mr->size instead of section->size. I'll post a patch once I'm through the email deluge from 1 week of absence. If I read correctly the patch that introduced address_space_translate, the bug has always been there. > One fix would be to adjust the > length even without IOMMU. That would have some performance impact > though, so maybe we want to make this assumption clear and always use a= n > IOMMU in that case. I don't think there would be a performance impact, except in buggy cases such as the one Herv=E9 is fixing. Paolo >>> I therefore wonder if >>> you therefore shouldn't model this DMA translation tables by using IO= MMU >>> ops instead of subregions. >>> >> No, in my opinion, that's an implementation detail. Paolo said that it= was OK: >> "Both are okay. The IOMMU makes address space changes faster; your >> scheme is basically a form of caching, it trades update performance fo= r >> improved translation performance." >> http://lists.gnu.org/archive/html/qemu-devel/2015-03/msg05486.html >=20 > It seems wrong with the current code. And if we fix the bug by adjustin= g > the length, the above sentence about the performances might becomes > wrong >=20 > Aurelien. >=20