From: Paolo Bonzini <pbonzini@redhat.com>
To: "Radim Krčmář" <rkrcmar@redhat.com>, qemu-devel@nongnu.org
Cc: bsd@redhat.com, ehabkost@redhat.com, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH 1/2] target-i386: emulate CPUID level of real hardware
Date: Thu, 18 Jun 2015 17:29:46 +0200 [thread overview]
Message-ID: <5582E3EA.2070407@redhat.com> (raw)
In-Reply-To: <1434641064-8405-2-git-send-email-rkrcmar@redhat.com>
On 18/06/2015 17:24, Radim Krčmář wrote:
> W10 insider has a bug where it ignores CPUID level and interprets
> CPUID.(EAX=07H, ECX=0H) incorrectly, because CPUID in fact returned
> CPUID.(EAX=04H, ECX=0H); this resulted in execution of unsupported
> instructions.
>
> While it's a Windows bug, there is no reason to emulate incorrect level;
> and amend xlevel while at it.
>
> I have used http://instlatx64.atw.hu/ as a source of CPUID and checked
> that it matches Penryn Xeon X5472, Westmere Xeon W3520, SandyBridge
> i5-2540M, and Haswell i5-4670T.
>
> kvm64 and qemu64 were bumped to 0xD to avoid similar problems.
This unfortunately has to be done only for new machine types. Old types
will remain buggy forever.
Paolo
> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
> ---
> target-i386/cpu.c | 37 ++++++++++++++++++-------------------
> 1 file changed, 18 insertions(+), 19 deletions(-)
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 4e7cdaaaa57e..d392cf46f517 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -677,7 +677,7 @@ struct X86CPUDefinition {
> static X86CPUDefinition builtin_x86_defs[] = {
> {
> .name = "qemu64",
> - .level = 4,
> + .level = 0xd,
> .vendor = CPUID_VENDOR_AMD,
> .family = 6,
> .model = 6,
> @@ -753,7 +753,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> },
> {
> .name = "kvm64",
> - .level = 5,
> + .level = 0xd,
> .vendor = CPUID_VENDOR_INTEL,
> .family = 15,
> .model = 6,
> @@ -864,7 +864,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> },
> {
> .name = "pentium3",
> - .level = 2,
> + .level = 3,
> .vendor = CPUID_VENDOR_INTEL,
> .family = 6,
> .model = 7,
> @@ -889,8 +889,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> },
> {
> .name = "n270",
> - /* original is on level 10 */
> - .level = 5,
> + .level = 10,
> .vendor = CPUID_VENDOR_INTEL,
> .family = 6,
> .model = 28,
> @@ -910,12 +909,12 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_EXT2_NX,
> .features[FEAT_8000_0001_ECX] =
> CPUID_EXT3_LAHF_LM,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Intel(R) Atom(TM) CPU N270 @ 1.60GHz",
> },
> {
> .name = "Conroe",
> - .level = 4,
> + .level = 10,
> .vendor = CPUID_VENDOR_INTEL,
> .family = 6,
> .model = 15,
> @@ -932,12 +931,12 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_EXT2_LM | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
> .features[FEAT_8000_0001_ECX] =
> CPUID_EXT3_LAHF_LM,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Intel Celeron_4x0 (Conroe/Merom Class Core 2)",
> },
> {
> .name = "Penryn",
> - .level = 4,
> + .level = 10,
> .vendor = CPUID_VENDOR_INTEL,
> .family = 6,
> .model = 23,
> @@ -955,12 +954,12 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_EXT2_LM | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
> .features[FEAT_8000_0001_ECX] =
> CPUID_EXT3_LAHF_LM,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Intel Core 2 Duo P9xxx (Penryn Class Core 2)",
> },
> {
> .name = "Nehalem",
> - .level = 4,
> + .level = 11,
> .vendor = CPUID_VENDOR_INTEL,
> .family = 6,
> .model = 26,
> @@ -978,7 +977,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> .features[FEAT_8000_0001_ECX] =
> CPUID_EXT3_LAHF_LM,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Intel Core i7 9xx (Nehalem Class Core i7)",
> },
> {
> @@ -1002,7 +1001,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
> .features[FEAT_8000_0001_ECX] =
> CPUID_EXT3_LAHF_LM,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Westmere E56xx/L56xx/X56xx (Nehalem-C)",
> },
> {
> @@ -1031,7 +1030,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_EXT3_LAHF_LM,
> .features[FEAT_XSAVE] =
> CPUID_XSAVE_XSAVEOPT,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Intel Xeon E312xx (Sandy Bridge)",
> },
> {
> @@ -1063,7 +1062,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_EXT3_LAHF_LM,
> .features[FEAT_XSAVE] =
> CPUID_XSAVE_XSAVEOPT,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Intel Xeon E3-12xx v2 (Ivy Bridge)",
> },
> {
> @@ -1097,7 +1096,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID,
> .features[FEAT_XSAVE] =
> CPUID_XSAVE_XSAVEOPT,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Intel Core Processor (Haswell, no TSX)",
> }, {
> .name = "Haswell",
> @@ -1131,7 +1130,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_7_0_EBX_RTM,
> .features[FEAT_XSAVE] =
> CPUID_XSAVE_XSAVEOPT,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Intel Core Processor (Haswell)",
> },
> {
> @@ -1167,7 +1166,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_7_0_EBX_SMAP,
> .features[FEAT_XSAVE] =
> CPUID_XSAVE_XSAVEOPT,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Intel Core Processor (Broadwell, no TSX)",
> },
> {
> @@ -1203,7 +1202,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> CPUID_7_0_EBX_SMAP,
> .features[FEAT_XSAVE] =
> CPUID_XSAVE_XSAVEOPT,
> - .xlevel = 0x8000000A,
> + .xlevel = 0x80000008,
> .model_id = "Intel Core Processor (Broadwell)",
> },
> {
>
next prev parent reply other threads:[~2015-06-18 15:29 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-18 15:24 [Qemu-devel] [PATCH 0/2] target-i386: fix W10 bug and bring CPUID levels closer to reality Radim Krčmář
2015-06-18 15:24 ` [Qemu-devel] [PATCH 1/2] target-i386: emulate CPUID level of real hardware Radim Krčmář
2015-06-18 15:29 ` Paolo Bonzini [this message]
2015-06-18 15:40 ` Radim Krčmář
2015-06-18 15:42 ` Paolo Bonzini
2015-06-18 17:26 ` Bandan Das
2015-06-18 15:24 ` [Qemu-devel] [PATCH 2/2] target-i386: automatically raise cpuid level to 0xd Radim Krčmář
2015-06-18 15:50 ` Eduardo Habkost
2015-06-18 17:12 ` Bandan Das
2015-06-18 17:26 ` Eduardo Habkost
2015-06-19 9:47 ` Radim Krčmář
2015-06-19 9:54 ` Radim Krčmář
2015-06-19 11:28 ` Radim Krčmář
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5582E3EA.2070407@redhat.com \
--to=pbonzini@redhat.com \
--cc=bsd@redhat.com \
--cc=ehabkost@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=rkrcmar@redhat.com \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).