From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53481) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z71QS-0006Ng-0i for qemu-devel@nongnu.org; Mon, 22 Jun 2015 09:06:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z71QO-0000Kp-Pc for qemu-devel@nongnu.org; Mon, 22 Jun 2015 09:06:11 -0400 Received: from mail-wg0-x233.google.com ([2a00:1450:400c:c00::233]:35517) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z71QO-0000Kj-IC for qemu-devel@nongnu.org; Mon, 22 Jun 2015 09:06:08 -0400 Received: by wgbhy7 with SMTP id hy7so140913513wgb.2 for ; Mon, 22 Jun 2015 06:06:08 -0700 (PDT) Sender: Paolo Bonzini Message-ID: <5588083E.1060605@redhat.com> Date: Mon, 22 Jun 2015 15:06:06 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <1432686530-14777-1-git-send-email-pcacjr@zytor.com> <55658F4B.5000204@redhat.com> In-Reply-To: <55658F4B.5000204@redhat.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC interface List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paulo Alcantara , seabios@seabios.org Cc: Paulo Alcantara , qemu-devel@nongnu.org, Gerd Hoffmann On 27/05/2015 11:32, Paolo Bonzini wrote: > > > On 27/05/2015 02:28, Paulo Alcantara wrote: >> This patch initialises root complex register block BAR in order to >> support TCO watchdog emulation features on QEMU. >> >> Signed-off-by: Paulo Alcantara >> --- >> src/fw/dev-q35.h | 3 +++ >> src/fw/pciinit.c | 4 ++++ >> 2 files changed, 7 insertions(+) >> >> diff --git a/src/fw/dev-q35.h b/src/fw/dev-q35.h >> index c6f8bd9..201825d 100644 >> --- a/src/fw/dev-q35.h >> +++ b/src/fw/dev-q35.h >> @@ -27,6 +27,9 @@ >> #define ICH9_LPC_GEN_PMCON_1_SMI_LOCK (1 << 4) >> #define ICH9_LPC_PORT_ELCR1 0x4d0 >> #define ICH9_LPC_PORT_ELCR2 0x4d1 >> +#define ICH9_LPC_RCBA 0xf0 >> +#define ICH9_LPC_RCBA_ADDR 0xfed1c000 >> +#define ICH9_LPC_RCBA_EN 0x1 >> #define PCI_DEVICE_ID_INTEL_ICH9_SMBUS 0x2930 >> #define ICH9_SMB_SMB_BASE 0x20 >> #define ICH9_SMB_HOSTC 0x40 >> diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c >> index ac39d23..defccf3 100644 >> --- a/src/fw/pciinit.c >> +++ b/src/fw/pciinit.c >> @@ -183,6 +183,10 @@ static void mch_isa_bridge_setup(struct pci_device *dev, void *arg) >> /* acpi enable, SCI: IRQ9 000b = irq9*/ >> pci_config_writeb(bdf, ICH9_LPC_ACPI_CTRL, ICH9_LPC_ACPI_CTRL_ACPI_EN); >> >> + /* set root complex register block BAR */ >> + pci_config_writel(bdf, ICH9_LPC_RCBA, >> + ICH9_LPC_RCBA_ADDR | ICH9_LPC_RCBA_EN); >> + >> acpi_pm1a_cnt = acpi_pm_base + 0x04; >> pmtimer_setup(acpi_pm_base + 0x08); >> } >> > > Reviewed-by: Paolo Bonzini > > Ping? If TCO support is added to QEMU 2.4, we need this patch too. Paolo