* [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC interface
@ 2015-05-27 0:28 Paulo Alcantara
2015-05-27 9:32 ` Paolo Bonzini
2015-07-10 0:04 ` [Qemu-devel] [PATCH v2] " Paulo Alcantara
0 siblings, 2 replies; 8+ messages in thread
From: Paulo Alcantara @ 2015-05-27 0:28 UTC (permalink / raw)
To: seabios; +Cc: pbonzini, Paulo Alcantara, qemu-devel
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features on QEMU.
Signed-off-by: Paulo Alcantara <pcacjr@zytor.com>
---
src/fw/dev-q35.h | 3 +++
src/fw/pciinit.c | 4 ++++
2 files changed, 7 insertions(+)
diff --git a/src/fw/dev-q35.h b/src/fw/dev-q35.h
index c6f8bd9..201825d 100644
--- a/src/fw/dev-q35.h
+++ b/src/fw/dev-q35.h
@@ -27,6 +27,9 @@
#define ICH9_LPC_GEN_PMCON_1_SMI_LOCK (1 << 4)
#define ICH9_LPC_PORT_ELCR1 0x4d0
#define ICH9_LPC_PORT_ELCR2 0x4d1
+#define ICH9_LPC_RCBA 0xf0
+#define ICH9_LPC_RCBA_ADDR 0xfed1c000
+#define ICH9_LPC_RCBA_EN 0x1
#define PCI_DEVICE_ID_INTEL_ICH9_SMBUS 0x2930
#define ICH9_SMB_SMB_BASE 0x20
#define ICH9_SMB_HOSTC 0x40
diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index ac39d23..defccf3 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -183,6 +183,10 @@ static void mch_isa_bridge_setup(struct pci_device *dev, void *arg)
/* acpi enable, SCI: IRQ9 000b = irq9*/
pci_config_writeb(bdf, ICH9_LPC_ACPI_CTRL, ICH9_LPC_ACPI_CTRL_ACPI_EN);
+ /* set root complex register block BAR */
+ pci_config_writel(bdf, ICH9_LPC_RCBA,
+ ICH9_LPC_RCBA_ADDR | ICH9_LPC_RCBA_EN);
+
acpi_pm1a_cnt = acpi_pm_base + 0x04;
pmtimer_setup(acpi_pm_base + 0x08);
}
--
2.1.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC interface
2015-05-27 0:28 [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC interface Paulo Alcantara
@ 2015-05-27 9:32 ` Paolo Bonzini
2015-06-22 13:06 ` Paolo Bonzini
2015-07-10 0:04 ` [Qemu-devel] [PATCH v2] " Paulo Alcantara
1 sibling, 1 reply; 8+ messages in thread
From: Paolo Bonzini @ 2015-05-27 9:32 UTC (permalink / raw)
To: Paulo Alcantara, seabios; +Cc: Paulo Alcantara, qemu-devel
On 27/05/2015 02:28, Paulo Alcantara wrote:
> This patch initialises root complex register block BAR in order to
> support TCO watchdog emulation features on QEMU.
>
> Signed-off-by: Paulo Alcantara <pcacjr@zytor.com>
> ---
> src/fw/dev-q35.h | 3 +++
> src/fw/pciinit.c | 4 ++++
> 2 files changed, 7 insertions(+)
>
> diff --git a/src/fw/dev-q35.h b/src/fw/dev-q35.h
> index c6f8bd9..201825d 100644
> --- a/src/fw/dev-q35.h
> +++ b/src/fw/dev-q35.h
> @@ -27,6 +27,9 @@
> #define ICH9_LPC_GEN_PMCON_1_SMI_LOCK (1 << 4)
> #define ICH9_LPC_PORT_ELCR1 0x4d0
> #define ICH9_LPC_PORT_ELCR2 0x4d1
> +#define ICH9_LPC_RCBA 0xf0
> +#define ICH9_LPC_RCBA_ADDR 0xfed1c000
> +#define ICH9_LPC_RCBA_EN 0x1
> #define PCI_DEVICE_ID_INTEL_ICH9_SMBUS 0x2930
> #define ICH9_SMB_SMB_BASE 0x20
> #define ICH9_SMB_HOSTC 0x40
> diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
> index ac39d23..defccf3 100644
> --- a/src/fw/pciinit.c
> +++ b/src/fw/pciinit.c
> @@ -183,6 +183,10 @@ static void mch_isa_bridge_setup(struct pci_device *dev, void *arg)
> /* acpi enable, SCI: IRQ9 000b = irq9*/
> pci_config_writeb(bdf, ICH9_LPC_ACPI_CTRL, ICH9_LPC_ACPI_CTRL_ACPI_EN);
>
> + /* set root complex register block BAR */
> + pci_config_writel(bdf, ICH9_LPC_RCBA,
> + ICH9_LPC_RCBA_ADDR | ICH9_LPC_RCBA_EN);
> +
> acpi_pm1a_cnt = acpi_pm_base + 0x04;
> pmtimer_setup(acpi_pm_base + 0x08);
> }
>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC interface
2015-05-27 9:32 ` Paolo Bonzini
@ 2015-06-22 13:06 ` Paolo Bonzini
2015-06-22 14:43 ` [Qemu-devel] [SeaBIOS] " Kevin O'Connor
2015-06-22 15:26 ` [Qemu-devel] " Gerd Hoffmann
0 siblings, 2 replies; 8+ messages in thread
From: Paolo Bonzini @ 2015-06-22 13:06 UTC (permalink / raw)
To: Paulo Alcantara, seabios; +Cc: Paulo Alcantara, qemu-devel, Gerd Hoffmann
On 27/05/2015 11:32, Paolo Bonzini wrote:
>
>
> On 27/05/2015 02:28, Paulo Alcantara wrote:
>> This patch initialises root complex register block BAR in order to
>> support TCO watchdog emulation features on QEMU.
>>
>> Signed-off-by: Paulo Alcantara <pcacjr@zytor.com>
>> ---
>> src/fw/dev-q35.h | 3 +++
>> src/fw/pciinit.c | 4 ++++
>> 2 files changed, 7 insertions(+)
>>
>> diff --git a/src/fw/dev-q35.h b/src/fw/dev-q35.h
>> index c6f8bd9..201825d 100644
>> --- a/src/fw/dev-q35.h
>> +++ b/src/fw/dev-q35.h
>> @@ -27,6 +27,9 @@
>> #define ICH9_LPC_GEN_PMCON_1_SMI_LOCK (1 << 4)
>> #define ICH9_LPC_PORT_ELCR1 0x4d0
>> #define ICH9_LPC_PORT_ELCR2 0x4d1
>> +#define ICH9_LPC_RCBA 0xf0
>> +#define ICH9_LPC_RCBA_ADDR 0xfed1c000
>> +#define ICH9_LPC_RCBA_EN 0x1
>> #define PCI_DEVICE_ID_INTEL_ICH9_SMBUS 0x2930
>> #define ICH9_SMB_SMB_BASE 0x20
>> #define ICH9_SMB_HOSTC 0x40
>> diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
>> index ac39d23..defccf3 100644
>> --- a/src/fw/pciinit.c
>> +++ b/src/fw/pciinit.c
>> @@ -183,6 +183,10 @@ static void mch_isa_bridge_setup(struct pci_device *dev, void *arg)
>> /* acpi enable, SCI: IRQ9 000b = irq9*/
>> pci_config_writeb(bdf, ICH9_LPC_ACPI_CTRL, ICH9_LPC_ACPI_CTRL_ACPI_EN);
>>
>> + /* set root complex register block BAR */
>> + pci_config_writel(bdf, ICH9_LPC_RCBA,
>> + ICH9_LPC_RCBA_ADDR | ICH9_LPC_RCBA_EN);
>> +
>> acpi_pm1a_cnt = acpi_pm_base + 0x04;
>> pmtimer_setup(acpi_pm_base + 0x08);
>> }
>>
>
> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
>
>
Ping? If TCO support is added to QEMU 2.4, we need this patch too.
Paolo
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Qemu-devel] [SeaBIOS] [PATCH] ich9: initialise RCBA register through LPC interface
2015-06-22 13:06 ` Paolo Bonzini
@ 2015-06-22 14:43 ` Kevin O'Connor
2015-06-22 15:26 ` [Qemu-devel] " Gerd Hoffmann
1 sibling, 0 replies; 8+ messages in thread
From: Kevin O'Connor @ 2015-06-22 14:43 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: seabios, Paulo Alcantara, qemu-devel, Gerd Hoffmann
On Mon, Jun 22, 2015 at 03:06:06PM +0200, Paolo Bonzini wrote:
> On 27/05/2015 11:32, Paolo Bonzini wrote:
> > On 27/05/2015 02:28, Paulo Alcantara wrote:
> >> This patch initialises root complex register block BAR in order to
> >> support TCO watchdog emulation features on QEMU.
> >>
> >> Signed-off-by: Paulo Alcantara <pcacjr@zytor.com>
> >> ---
> >> src/fw/dev-q35.h | 3 +++
> >> src/fw/pciinit.c | 4 ++++
> >> 2 files changed, 7 insertions(+)
> >>
> >> diff --git a/src/fw/dev-q35.h b/src/fw/dev-q35.h
> >> index c6f8bd9..201825d 100644
> >> --- a/src/fw/dev-q35.h
> >> +++ b/src/fw/dev-q35.h
> >> @@ -27,6 +27,9 @@
> >> #define ICH9_LPC_GEN_PMCON_1_SMI_LOCK (1 << 4)
> >> #define ICH9_LPC_PORT_ELCR1 0x4d0
> >> #define ICH9_LPC_PORT_ELCR2 0x4d1
> >> +#define ICH9_LPC_RCBA 0xf0
> >> +#define ICH9_LPC_RCBA_ADDR 0xfed1c000
> >> +#define ICH9_LPC_RCBA_EN 0x1
> >> #define PCI_DEVICE_ID_INTEL_ICH9_SMBUS 0x2930
> >> #define ICH9_SMB_SMB_BASE 0x20
> >> #define ICH9_SMB_HOSTC 0x40
> >> diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
> >> index ac39d23..defccf3 100644
> >> --- a/src/fw/pciinit.c
> >> +++ b/src/fw/pciinit.c
> >> @@ -183,6 +183,10 @@ static void mch_isa_bridge_setup(struct pci_device *dev, void *arg)
> >> /* acpi enable, SCI: IRQ9 000b = irq9*/
> >> pci_config_writeb(bdf, ICH9_LPC_ACPI_CTRL, ICH9_LPC_ACPI_CTRL_ACPI_EN);
> >>
> >> + /* set root complex register block BAR */
> >> + pci_config_writel(bdf, ICH9_LPC_RCBA,
> >> + ICH9_LPC_RCBA_ADDR | ICH9_LPC_RCBA_EN);
> >> +
> >> acpi_pm1a_cnt = acpi_pm_base + 0x04;
> >> pmtimer_setup(acpi_pm_base + 0x08);
> >> }
> >>
> >
> > Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
> >
> >
>
> Ping? If TCO support is added to QEMU 2.4, we need this patch too.
The patch looks fine to me. But, for patches that require both
SeaBIOS and QEMU support I generally prefer to see the QEMU code
committed before committing the SeaBIOS part.
Sorry for the delay in responding.
-Kevin
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC interface
2015-06-22 13:06 ` Paolo Bonzini
2015-06-22 14:43 ` [Qemu-devel] [SeaBIOS] " Kevin O'Connor
@ 2015-06-22 15:26 ` Gerd Hoffmann
1 sibling, 0 replies; 8+ messages in thread
From: Gerd Hoffmann @ 2015-06-22 15:26 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: Paulo Alcantara, seabios, Paulo Alcantara, qemu-devel
Hi,
> > Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
> >
> >
>
> Ping? If TCO support is added to QEMU 2.4, we need this patch too.
Hmm, should that happen we need a 1.8.3 release I guess ...
Can you ping me in case tco makes it into 2.4?
thanks,
Gerd
>
> Paolo
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Qemu-devel] [PATCH v2] ich9: initialise RCBA register through LPC interface
2015-05-27 0:28 [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC interface Paulo Alcantara
2015-05-27 9:32 ` Paolo Bonzini
@ 2015-07-10 0:04 ` Paulo Alcantara
2015-07-14 13:55 ` Gerd Hoffmann
1 sibling, 1 reply; 8+ messages in thread
From: Paulo Alcantara @ 2015-07-10 0:04 UTC (permalink / raw)
To: seabios
Cc: Paolo Bonzini, Kevin O'Connor, Paulo Alcantara, qemu-devel,
Gerd Hofmann
This patch initialises root complex register block BAR in order to
support TCO watchdog emulation features on QEMU.
Cc: Kevin O'Connor <kevin@koconnor.net>
Cc: Gerd Hofmann <kraxel@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Paulo Alcantara <pcacjr@zytor.com>
---
v1 -> v2:
- reserve RCBA address via e820 map
---
src/fw/dev-q35.h | 3 +++
src/fw/pciinit.c | 5 +++++
2 files changed, 8 insertions(+)
diff --git a/src/fw/dev-q35.h b/src/fw/dev-q35.h
index c6f8bd9..201825d 100644
--- a/src/fw/dev-q35.h
+++ b/src/fw/dev-q35.h
@@ -27,6 +27,9 @@
#define ICH9_LPC_GEN_PMCON_1_SMI_LOCK (1 << 4)
#define ICH9_LPC_PORT_ELCR1 0x4d0
#define ICH9_LPC_PORT_ELCR2 0x4d1
+#define ICH9_LPC_RCBA 0xf0
+#define ICH9_LPC_RCBA_ADDR 0xfed1c000
+#define ICH9_LPC_RCBA_EN 0x1
#define PCI_DEVICE_ID_INTEL_ICH9_SMBUS 0x2930
#define ICH9_SMB_SMB_BASE 0x20
#define ICH9_SMB_HOSTC 0x40
diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index 45870f2..3ad84ba 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -183,6 +183,11 @@ static void mch_isa_bridge_setup(struct pci_device *dev, void *arg)
/* acpi enable, SCI: IRQ9 000b = irq9*/
pci_config_writeb(bdf, ICH9_LPC_ACPI_CTRL, ICH9_LPC_ACPI_CTRL_ACPI_EN);
+ /* set root complex register block BAR */
+ pci_config_writel(bdf, ICH9_LPC_RCBA,
+ ICH9_LPC_RCBA_ADDR | ICH9_LPC_RCBA_EN);
+ add_e820(ICH9_LPC_RCBA_ADDR, 16*1024, E820_RESERVED);
+
acpi_pm1a_cnt = acpi_pm_base + 0x04;
pmtimer_setup(acpi_pm_base + 0x08);
}
--
2.1.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [Qemu-devel] [PATCH v2] ich9: initialise RCBA register through LPC interface
2015-07-10 0:04 ` [Qemu-devel] [PATCH v2] " Paulo Alcantara
@ 2015-07-14 13:55 ` Gerd Hoffmann
2015-07-14 20:45 ` Paulo Alcantara
0 siblings, 1 reply; 8+ messages in thread
From: Gerd Hoffmann @ 2015-07-14 13:55 UTC (permalink / raw)
To: Paulo Alcantara
Cc: Paolo Bonzini, Kevin O'Connor, seabios, Paulo Alcantara,
qemu-devel
On Do, 2015-07-09 at 21:04 -0300, Paulo Alcantara wrote:
> This patch initialises root complex register block BAR in order to
> support TCO watchdog emulation features on QEMU.
qemu patches are merged, committed this one too now.
Also cherry-picked into 1.8-stable.
So, time to roll 1.8.3? Anything else pending?
cheers,
Gerd
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Qemu-devel] [PATCH v2] ich9: initialise RCBA register through LPC interface
2015-07-14 13:55 ` Gerd Hoffmann
@ 2015-07-14 20:45 ` Paulo Alcantara
0 siblings, 0 replies; 8+ messages in thread
From: Paulo Alcantara @ 2015-07-14 20:45 UTC (permalink / raw)
To: Gerd Hoffmann
Cc: Paolo Bonzini, Kevin O'Connor, Paulo Alcantara, seabios,
qemu-devel
On Tue, 14 Jul 2015 15:55:24 +0200
Gerd Hoffmann <kraxel@redhat.com> wrote:
> On Do, 2015-07-09 at 21:04 -0300, Paulo Alcantara wrote:
> > This patch initialises root complex register block BAR in order to
> > support TCO watchdog emulation features on QEMU.
>
> qemu patches are merged, committed this one too now.
> Also cherry-picked into 1.8-stable.
Alright. Thanks!
> So, time to roll 1.8.3? Anything else pending?
Yep. No, that's all.
Paulo
--
Paulo Alcantara, C.E.S.A.R
Speaking for myself only.
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2015-07-14 20:46 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2015-05-27 0:28 [Qemu-devel] [PATCH] ich9: initialise RCBA register through LPC interface Paulo Alcantara
2015-05-27 9:32 ` Paolo Bonzini
2015-06-22 13:06 ` Paolo Bonzini
2015-06-22 14:43 ` [Qemu-devel] [SeaBIOS] " Kevin O'Connor
2015-06-22 15:26 ` [Qemu-devel] " Gerd Hoffmann
2015-07-10 0:04 ` [Qemu-devel] [PATCH v2] " Paulo Alcantara
2015-07-14 13:55 ` Gerd Hoffmann
2015-07-14 20:45 ` Paulo Alcantara
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