From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57325) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8AYO-0001GX-Qq for qemu-devel@nongnu.org; Thu, 25 Jun 2015 13:03:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z8AYL-0003cz-1e for qemu-devel@nongnu.org; Thu, 25 Jun 2015 13:03:08 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48377) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8AYK-0003ck-To for qemu-devel@nongnu.org; Thu, 25 Jun 2015 13:03:05 -0400 Message-ID: <558C343F.1090703@redhat.com> Date: Thu, 25 Jun 2015 19:02:55 +0200 From: Paolo Bonzini MIME-Version: 1.0 References: <4b8fc4d985de6c4f44509b9c47a6152add36d832.1435195913.git.zhugh.fnst@cn.fujitsu.com> <558C2583.1040501@suse.de> <558C2605.2070806@redhat.com> <558C27DF.5090800@suse.de> In-Reply-To: <558C27DF.5090800@suse.de> Content-Type: text/plain; charset=iso-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RESEND PATCH v8 1/4] apic: map APIC's MMIO region at each CPU's address space List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?ISO-8859-15?Q?Andreas_F=E4rber?= , qemu-devel@nongnu.org Cc: chen.fan.fnst@cn.fujitsu.com, imammedo@redhat.com, Zhu Guihua , ehabkost@redhat.com, izumi.taku@jp.fujitsu.com On 25/06/2015 18:10, Andreas F=E4rber wrote: > Am 25.06.2015 um 18:02 schrieb Paolo Bonzini: >> On 25/06/2015 18:00, Andreas F=E4rber wrote: >>>> - if (!mmio_registered) { >>>> - ICCBus *b =3D ICC_BUS(qdev_get_parent_bus(dev)); >>>> - memory_region_add_subregion(b->apic_address_space, 0, &s->i= o_memory); >>>> - mmio_registered =3D true; >>>> - } >>>> + >>>> + root =3D address_space_root_memory_region(cpu->as); >>>> + memory_region_add_subregion_overlap(root, >>>> + s->apicbase & MSR_IA32_APIC= BASE_BASE, >>>> + &s->io_memory, >>>> + 0x1000); >>>> =20 >> >> I had already remarked that this patch is wrong. cpu->as is completel= y >> unused on KVM, for example. >=20 > Ah, then I don't understand this [RESEND]. ;) > Either way, not on my plate ATM, it seems. >=20 > Did you also outline how it is supposed to be done instead? I said "I think this patch is incorrect, because you do not install a separate address space for each CPU. Also, the CPU address space is only used with TCG so it should be guarded by "if (tcg_enabled())"." By the way, now TCG _is_ installing a separate address space per CPU already, so the patch can simply guard the code with "if (tcg_enabled())"= . Paolo