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From: Paolo Bonzini <pbonzini@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Zhu Guihua" <zhugh.fnst@cn.fujitsu.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	izumi.taku@jp.fujitsu.com, ChenFan <chen.fan.fnst@cn.fujitsu.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Andreas Färber" <afaerber@suse.de>
Subject: Re: [Qemu-devel] [RESEND PATCH v8 1/4] apic: map APIC's MMIO region at each CPU's address space
Date: Thu, 25 Jun 2015 19:39:40 +0200	[thread overview]
Message-ID: <558C3CDC.2050907@redhat.com> (raw)
In-Reply-To: <CAFEAcA-b=kmhOSEczZgxTAJeEZTMwyAyH55yjZoCu2+Vm_CAZg@mail.gmail.com>



On 25/06/2015 19:32, Peter Maydell wrote:
> On 25 June 2015 at 18:27, Paolo Bonzini <pbonzini@redhat.com> wrote:
>> On 25/06/2015 19:08, Andreas Färber wrote:
>>> And is installing a separate address space per CPU for KVM difficult due
>>> to kernel limitations, or is this just a few lines of QEMU code that Zhu
>>> or someone would need to write? :)
>>
>> It's basically impossible.  Even though support for multiple address
>> spaces is going to be in Linux 4.2, there are going to be just two: SMM
>> and not SMM.  You don't really want to do O(#cpus) stuff in KVM, where
>> the number of CPUs can be 200 or more.
> 
> Can you explain what the issue is here? Shouldn't it just be a matter
> of kvm_cpu_exec() doing a dispatch to cpu->as rather than calling
> address_space_rw() ?  (Making it do that was one of the things on my
> todo list for ARM at some point.)

One example of the problem is that different CPU address spaces can have
MMIO in different places.  These MMIO areas can hide RAM depending on
where they're placed and their relative priorities.  If they do, KVM
cannot really assume that a single set of page tables are okay to
convert gpa->hpa for all guest CPUs.

If you can tie this to CPU state (e.g. in or out of system management
mode), you only get a small, constant number of such address spaces.

See http://thread.gmane.org/gmane.comp.emulators.qemu/345230 for the
QEMU part of the multiple-address-space support.

Paolo

> I'm happy to assume that RAM is shared by all CPUs I guess.
> 
>> TCG is okay because the #cpus is not really going to be more than 4-ish.
> 
> Well, it might be more than that in future...
> 
> -- PMM
> 

  reply	other threads:[~2015-06-25 17:39 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-25  2:17 [Qemu-devel] [RESEND PATCH v8 0/4] remove icc bus/bridge Zhu Guihua
2015-06-25  2:17 ` [Qemu-devel] [RESEND PATCH v8 1/4] apic: map APIC's MMIO region at each CPU's address space Zhu Guihua
2015-06-25 16:00   ` Andreas Färber
2015-06-25 16:02     ` Paolo Bonzini
2015-06-25 16:10       ` Andreas Färber
2015-06-25 17:02         ` Paolo Bonzini
2015-06-25 17:08           ` Andreas Färber
2015-06-25 17:27             ` Paolo Bonzini
2015-06-25 17:32               ` Peter Maydell
2015-06-25 17:39                 ` Paolo Bonzini [this message]
2015-06-26  9:01               ` Igor Mammedov
2015-06-26  9:05                 ` Paolo Bonzini
2015-06-25  2:17 ` [Qemu-devel] [RESEND PATCH v8 2/4] hw: add a wrapper for registering reset handler Zhu Guihua
2015-06-25 16:57   ` Andreas Färber
2015-06-25 17:00   ` Paolo Bonzini
2015-06-25 17:28     ` Andreas Färber
2015-06-26  9:19       ` Igor Mammedov
2015-06-26 10:05         ` Paolo Bonzini
2015-06-30  6:31       ` Zhu Guihua
2015-06-30  9:21         ` Igor Mammedov
2015-06-30 10:50           ` Zhu Guihua
2015-06-30 10:55             ` Peter Maydell
2015-06-30 18:38               ` Eduardo Habkost
2015-06-30 10:24         ` Andreas Färber
2015-06-30 18:30           ` Eduardo Habkost
2015-06-25  2:17 ` [Qemu-devel] [RESEND PATCH v8 3/4] cpu/apic: drop icc bus/bridge Zhu Guihua
2015-06-25 16:44   ` Andreas Färber
2015-06-25  2:17 ` [Qemu-devel] [RESEND PATCH v8 4/4] icc_bus: drop the unused files Zhu Guihua

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