From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57904) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8SIt-0008Lk-7i for qemu-devel@nongnu.org; Fri, 26 Jun 2015 08:00:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z8SIp-0007iq-SW for qemu-devel@nongnu.org; Fri, 26 Jun 2015 08:00:19 -0400 Received: from mail-wi0-f174.google.com ([209.85.212.174]:36324) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8SIp-0007iT-MJ for qemu-devel@nongnu.org; Fri, 26 Jun 2015 08:00:15 -0400 Received: by wicnd19 with SMTP id nd19so15610277wic.1 for ; Fri, 26 Jun 2015 05:00:15 -0700 (PDT) Message-ID: <558D3EBC.1010408@linaro.org> Date: Fri, 26 Jun 2015 13:59:56 +0200 From: Eric Auger MIME-Version: 1.0 References: <1434386038-9246-1-git-send-email-eric.auger@linaro.org> <1434386038-9246-5-git-send-email-eric.auger@linaro.org> In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RESEND PATCH v16 4/6] intc: arm_gic_kvm: set the qemu_irq/gsi mapping List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: b.reynal@virtualopensystems.com, Peter Crosthwaite , eric.auger@st.com, vikrams@codeaurora.org, Patch Tracking , QEMU Developers , Alex Williamson , Paolo Bonzini , Christoffer Dall On 06/26/2015 01:43 PM, Peter Maydell wrote: > On 15 June 2015 at 17:33, Eric Auger wrote: >> The arm_gic_kvm now calls kvm_irqchip_set_qemuirq_gsi to build >> the hash table storing qemu_irq/gsi mappings. From that point on >> irqfd can be setup directly from the qemu_irq using >> kvm_irqchip_add_irqfd_notifier. >> >> Signed-off-by: Eric Auger >> Tested-by: Vikram Sethi >> >> --- >> v15 -> v16: >> - added Vikram's T-b >> - Resolve rebase conflict >> >> v2 -> v3: >> - kvm_irqchip_add_qemuirq_irqfd_notifier renamed into >> kvm_irqchip_add_irqfd_notifier >> --- >> hw/intc/arm_gic_kvm.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c >> index 2cb7d25..f56bff1 100644 >> --- a/hw/intc/arm_gic_kvm.c >> +++ b/hw/intc/arm_gic_kvm.c >> @@ -570,6 +570,12 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp) >> */ >> i += (GIC_INTERNAL * s->num_cpu); >> qdev_init_gpio_in(dev, kvm_arm_gic_set_irq, i); >> + >> + for (i = 0; i < s->num_irq - GIC_INTERNAL; i++) { >> + qemu_irq irq = qdev_get_gpio_in(dev, i); >> + kvm_irqchip_set_qemuirq_gsi(kvm_state, irq, i); >> + } >> + > > Is there documentation anywhere about what a "GSI" number is > for ARM? Is this part of the kernel ABI? Currently this is documented in kernel Documentation/virtual/kvm/api.txt in the KVM_IRQFD part. With current irqfd/arm implementation this GSI number matches an SPI index. Now we are also working on GSI routing support which will extend that meaning. The related RFC also documents ths gsi in the api.txt Thanks Eric > > thanks > -- PMM >